CN104298315A - Intelligent serial port communication card and Baud rate collocation method thereof - Google Patents
Intelligent serial port communication card and Baud rate collocation method thereof Download PDFInfo
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- CN104298315A CN104298315A CN201410524614.XA CN201410524614A CN104298315A CN 104298315 A CN104298315 A CN 104298315A CN 201410524614 A CN201410524614 A CN 201410524614A CN 104298315 A CN104298315 A CN 104298315A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
- G06F13/4291—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol
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Abstract
The invention provides an intelligent serial port communication card and a Baud rate collocation method thereof. The intelligent serial port communication card comprises a plurality of programmable clocks, a controller and an intelligent serial port communication chip, wherein a local lock is connected with the plurality of programmable clocks, the controller is connected with each programmable clock and is used for controlling the same and providing configuration parameters to the programmable clock; the plurality of programmable clocks are used for performing frequency multiplication on the frequency of the local lock to form a frequency multiplication clock, and generating output signals in accordance with the frequency multiplication clock and the configuration parameters. According to the intelligent serial port communication card and a preparation method provided by the invention, a level of programmable clock is arranged between a local crystal oscillator and a controller, and a configuration loop can be realized with the controller, therefore the Baud rates in the scope of 2bps to 10Mbps can be arbitrarily configured.
Description
Technical Field
The invention relates to the field of serial communication cards, in particular to an intelligent serial communication card and a baud rate configuration method thereof.
Background
Baud rate (modulation rate) refers to the change of a signal in a unit time after being modulated, i.e., the number of times a carrier parameter changes in the unit time. Baud rate is a very important indicator in serial communication. At present, the types of the serial port cards on the market are more, most of the serial port cards are based on the standard baud rate, the range of the baud rate is less than 3Mbps (Mbps: megabit/second), the precision under the standard baud rate can reach 0.01%, the nonstandard baud rate can only reach 1%, most of the serial port cards on the market are realized by a method of firstly multiplying the frequency of a clock and then dividing the frequency of the clock in a controller, and therefore the problem that some frequencies cannot be accurately generated exists.
Disclosure of Invention
The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. It should be understood that this summary is not an exhaustive overview of the invention. It is not intended to determine the key or critical elements of the present invention, nor is it intended to limit the scope of the present invention. Its sole purpose is to present some concepts in a simplified form as a prelude to the more detailed description that is discussed later.
The invention provides an intelligent serial port communication card, comprising: a plurality of programmable clocks, a controller and a serial communication chip;
wherein,
the local clock is connected with the plurality of programmable clocks, and the controller is connected with each programmable clock and used for controlling the programmable clocks and providing configuration parameters for the programmable clocks;
the programmable clocks are used for carrying out frequency multiplication on the frequency of the local clock to form a frequency multiplication clock, and generating output signals according to the frequency multiplication clock and the configuration parameters.
The invention also provides a baud rate configuration method based on the intelligent serial port communication card, which comprises the following steps:
introducing a local clock into a plurality of programmable clocks, wherein the plurality of programmable clocks multiply the local clock to form a multiplied clock;
setting the baud rate of the output signal, and calculating the configuration parameters of the plurality of programmable clocks by the controller according to the baud rate requirement of the set output signal;
and generating an output signal according to the frequency multiplication clock and the configuration parameters.
The intelligent serial port communication card and the preparation method of the invention increase a first-level programmable clock between the local crystal oscillator and the controller, realize a configuration loop with the controller, and can arbitrarily configure the baud rate in the range of 2 bps-10 Mbps.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a hardware diagram of an intelligent serial port communication card according to the present invention;
FIG. 2 is a flow chart of a baud rate configuration method based on an intelligent serial communication card according to the present invention;
FIG. 3 is a flow chart of the present invention for calculating configuration parameters;
fig. 4 is an algorithm diagram for calculating the division coefficient in the present invention.
Reference numerals:
10-a local clock; 20-a programmable clock; 30-a controller; 40-serial communication chip.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. Elements and features depicted in one drawing or one embodiment of the invention may be combined with elements and features shown in one or more other drawings or embodiments. It should be noted that the figures and description omit representation and description of components and processes that are not relevant to the present invention and that are known to those of ordinary skill in the art for the sake of clarity. All other embodiments, which can be obtained by a person skilled in the art without inventive effort based on the embodiments of the present invention, are within the scope of the present invention.
The first embodiment is as follows:
as shown in fig. 1, the present invention provides an intelligent serial port communication card, including: a plurality of programmable clocks 20, a controller 30 and a serial communication chip 40,
wherein,
the local clock 10 is connected to the plurality of programmable clocks 20, and the controller 30 is connected to each of the programmable clocks 20, and is configured to control the programmable clocks 20 and provide configuration parameters for the programmable clocks 20;
the plurality of programmable clocks 20 are configured to multiply the frequency of the local clock 10 to form a frequency-multiplied clock, and generate an output signal according to the frequency-multiplied clock and the configuration parameter.
Aiming at the problem that the baud rate of certain frequency cannot be accurately generated by a method that most serial port cards in the current market firstly multiply frequency and then divide frequency for a clock in a controller, the intelligent serial port communication card adds a first-level programmable clock between a local crystal oscillator and the controller, realizes a configuration loop with the controller, can arbitrarily configure the baud rate in the range of 2 bps-10 Mbps, and has the baud rate precision of 0.01 percent. Firstly, a local 50MHz clock is led into a plurality of programmable clocks, a controller calculates parameters to be configured to the programmable clocks according to the baud rate of the final output signal and feeds back the configured parameters to the programmable clocks, the programmable clocks multiply the frequency of the local clock to 2.5GHz, and output signals are generated according to the frequency multiplication clock of the 2.5GH and the configuration parameters.
Optionally, the controller 40 further includes a determining module and a parameter configuring module;
the judgment module is used for judging whether the baud rate of the output signal is not less than 1Mbps,
if yes, the parameter configuration module sets calSampleRate to be a fixed value of 16, calSampleRate is a numerical value which is in integral multiple relation with fbaud, and fbaud is the baud rate of the output signal;
otherwise, the parameter configuration module performs frequency division and calculates a frequency division coefficient, where the frequency division coefficient divider is 2Mbps/(32 fbaud), the frequency division coefficient divider needs to be converted into unsigned long integer data and rounded up, and the calsamplerrate needs to be obtained through calculation.
When the baud rate is greater than or equal to 1Mbps, frequency division is not needed, and the parameter configuration module sets the calSampleRate to be a fixed value, namely 16 times of the baud rate of the output signal;
because the minimum clock of the programmable clock output is limited, frequency division needs to be performed inside the controller under the condition of low baud rate, namely when the baud rate is less than 1Mbps, frequency division needs to be performed, the frequency division coefficient divider is 2Mbps/(32 fbaud), the calculated frequency division coefficient is converted into unsigned long integer data and is rounded upwards, the calsamplerrate needs to be obtained through calculation, and the calsamplerrate is fbaud 32 divider.
After calculating the calsamplerrate, the configuration parameter CAL _ NUM is calculated to be 2.5 GHz/calsamplerrate. And calculating the configuration parameters according to the formula of the configuration parameters, and providing the configuration parameters to the programmable controller through the controller.
The configuration parameter CAL _ NUM is equivalent to the form of A + B/C, wherein A is an integer part, and C is a fixed value of 230-1, B is the fractional part of the corresponding calculated molecule.
Optionally, the controller further includes three registers, and the three registers are respectively used for storing A, B, C partial values of the configuration parameters. And setting the stored A, B, C numerical value and the calculated frequency division coefficient divider to a controller, and configuring the baud rate by the controller according to the parameters.
Optionally, the controller is further connected to the serial communication chip 40, and outputs data to the serial communication chip 40 according to the baud rate. The programmable controller is a Field Programmable Gate Array (FPGA) and is used as a semi-custom circuit in the field of application-specific integrated circuits, the defects of the custom circuit are overcome, the defect that the number of gate circuits of an original programmable device is limited is overcome, the plurality of high-precision programmable clocks are controlled through the FPGA, a local clock is firstly introduced into the programmable clocks, the frequency of the programmable clocks is multiplied, then configuration parameters are calculated according to the needs of baud rate until the baud rate is finally output to a serial communication chip, and the advantages of flexible configuration and strong time sequence control capability of the programmable controller can be exerted.
Example two:
as shown in fig. 2, the present invention further provides a baud rate configuration method based on an intelligent serial communication card, including:
step 10: introducing a local clock into a plurality of programmable clocks, wherein the plurality of programmable clocks are multiplied to form a frequency multiplication clock;
step 20: setting the baud rate of the output signal, and calculating the configuration parameters of the plurality of programmable clocks by the controller according to the baud rate requirement of the set output signal;
step 30: and generating an output signal according to the frequency multiplication clock and the configuration parameters.
The invention adds a plurality of programmable clocks between the local clock and the controller, and the programmable clocks and the controller form a configuration loop, thereby realizing high-precision baud rate output.
Firstly, a local 50MHz clock is introduced into a plurality of programmable clocks, the frequency of the programmable clocks is multiplied to 2.5GHz, and then configuration parameters are calculated according to the baud rate requirement of a set output signal.
Optionally, as shown in fig. 3, the step of calculating, by the controller, the configuration parameters of the plurality of programmable clocks according to the baud rate requirement of the set output signal includes:
judging whether the Baud rate of the set output signal is not less than 1 Mbps;
if yes, frequency division is not needed, and calSampleRate is set to be a fixed value of 16, is a numerical value which is in integral multiple relation with fbaud, and is the baud rate of the output signal;
otherwise, frequency division is performed and a frequency division coefficient is calculated, the frequency division coefficient divider is 2Mbps/(32 fbaud), the frequency division coefficient divider is not required to be converted into unsigned long integer data and rounded up, and the calsamplerrate is calculated.
Optionally, when the division coefficient needs to be calculated, the calSampleRate is fbaud 32 divider.
The calculated frequency division coefficient is obtained by calculating a baud rate frequency division algorithm in an upper computer, as shown in fig. 4, so that accurate output of the baud rate can be realized within the range of 2bps to 10 Mbps. When frequency division is not needed, calsamplerrate is fbaud 16; when frequency division is needed, the frequency division coefficient divider is 2Mbps/(32 fbaud), and the calculated frequency division coefficient is converted into unsigned long integer data, and rounded up, and calsamplerrate is fbaud 32 divider.
Optionally, the configuration parameter is CAL _ NUM, where CAL _ NUM is 2.5GHz/calSampleRate, and the configuration parameter CAL _ NUM needs to be equivalent to a form of a + B/C, where a is an integer part, and C is a fixed value 230-1, B is the fractional part of the corresponding calculated molecule; the values of the A, B, C portion of the configuration parameters are stored in three registers of the controller, respectively.
The CAL _ NUM calculated from the formula is a floating point number, and thus can be equivalent to the form A + B/C, where A is the integer part and C is a fixed value of 230And-1 and B are numerators correspondingly calculated by the decimal part, so that corresponding numerical values are respectively configured into A, B and C registers of the programmable clock, and the controller finally determines the baud rate to be output according to CAL _ NUM and divider, thereby realizing high-precision baud rate configuration from 2pbs to 10 Mbps.
Optionally, the controller outputs the data to the serial communication chip according to the baud rate.
First, the baud rate to be set by the user is 9600bps, and the upper computer judges that the baud rate belongs to a range less than 1000000bps according to a frequency division algorithm, so that frequency division is needed;
calculating the obtained divider to be 7 according to a formula for calculating the frequency division coefficient, then calculating the calSampleRate to be 2150400Hz, and then calculating the CAL _ NUM to be 1162.5744047619047619047619047619;
the method is divided into A, B and C, wherein A is 1162, B is 616762416, and C is 1073741823, so that A, B, C and divider are set to a controller FPGA, the FPGA configures a programmable clock according to A, B and C, then a clock signal generated by the programmable clock is divided in the FPGA according to the value of the divider, the baud rate finally output to a serial communication chip is 9600bps, and one baud rate configuration is completed.
The 50MHz active clock crystal oscillator uses 50ppm temperature range, 1ppm high precision programmable clock step, thus ensuring the output baud rate precision to reach 0.01%.
In the above embodiments of the present invention, the sequence numbers and/or the sequence orders of the embodiments are only convenient for description, and do not represent the advantages or the disadvantages of the embodiments. The description of each embodiment has different emphasis, and for parts which are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments of the apparatus and method of the present invention, it is apparent that the components or steps may be disassembled, combined, and/or reassembled after disassembly. These decompositions and/or recombinations are to be regarded as equivalents of the present invention. Also, in the above description of specific embodiments of the invention, features described and/or illustrated with respect to one embodiment may be used in the same way or in a similar way in one or more other embodiments, in combination with or instead of the features in the other embodiments.
Finally, it should be noted that: although the present invention and its advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims. Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure of the present invention, processes, machines, means, methods, or steps, presently existing or later to be developed that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present invention. Accordingly, the appended claims are intended to include within their scope such processes, devices, means, methods, or steps.
Claims (14)
1. An intelligent serial port communication card, comprising: a plurality of programmable clocks, a controller and a serial communication chip;
wherein,
the local clock is connected with the plurality of programmable clocks, and the controller is connected with each programmable clock and used for controlling the programmable clocks and providing configuration parameters for the programmable clocks;
the programmable clocks are used for carrying out frequency multiplication on the frequency of the local clock to form a frequency multiplication clock, and generating output signals according to the frequency multiplication clock and the configuration parameters.
2. The intelligent serial port communication card according to claim 1, wherein the controller further comprises a judgment module and a parameter configuration module;
the judgment module is used for judging whether the baud rate of the output signal is not less than 1Mbps,
if yes, the parameter configuration module sets calSampleRate to be a fixed value of 16, calSampleRate is a numerical value which is in integral multiple relation with fbaud, and fbaud is the baud rate of the output signal;
otherwise, the parameter configuration module performs frequency division and calculates a frequency division coefficient, where the frequency division coefficient divider is 2Mbps/(32 fbaud), the frequency division coefficient divider needs to be converted into unsigned long integer data and rounded up, and the calsamplerrate needs to be obtained through calculation.
3. The smart serial communication card according to claim 2, wherein when the division factor needs to be calculated, the calSampleRate is fbaud 32 divider.
4. The smart serial-port communication card according to claim 2 or 3, wherein the configuration parameters are: CAL _ NUM, CAL _ NUM ═ 2.5 GHz/calSampleRate.
5. The intelligent serial port communication card according to claim 4, wherein the configuration parameter CAL _ NUM is equivalent to A + B/C, A is an integer part, and C is a fixed value of 230-1, B is the fractional part of the corresponding calculated molecule.
6. The smart serial-port communication card according to claim 5, wherein the controller further comprises three registers, each of the three registers storing A, B, C partial values of the configuration parameters.
7. The smart serial communication card of claim 1, wherein the controller is further connected to the serial communication chip for outputting data to the serial communication chip according to a baud rate.
8. A baud rate configuration method based on an intelligent serial port communication card is characterized by comprising the following steps:
introducing a local clock into a plurality of programmable clocks, wherein the plurality of programmable clocks multiply the local clock to form a multiplied clock;
setting the baud rate of the output signal, and calculating the configuration parameters of the plurality of programmable clocks by the controller according to the baud rate requirement of the set output signal;
and generating an output signal according to the frequency multiplication clock and the configuration parameters.
9. The baud rate configuration method based on the intelligent serial port communication card of claim 8, wherein the step of calculating the configuration parameters of the plurality of programmable clocks by the controller according to the baud rate requirement of the set output signal comprises the following steps:
judging whether the Baud rate of the set output signal is not less than 1 Mbps;
if yes, frequency division is not needed, and calSampleRate is set to be a fixed value of 16, is a numerical value which is in integral multiple relation with fbaud, and is the baud rate of the output signal;
otherwise, frequency division is performed and a frequency division coefficient is calculated, the frequency division coefficient divider is 2Mbps/(32 fbaud), the frequency division coefficient divider is not required to be converted into unsigned long integer data and rounded up, and the calsamplerrate is calculated.
10. The baud rate configuration method based on the smart serial communication card according to claim 9, wherein when the frequency division coefficient needs to be calculated, the calsamplerrate is fbaud 32 dvider.
11. The baud rate configuration method based on the intelligent serial port communication card according to claim 9 or 10, wherein the configuration parameter is CAL _ NUM, and CAL _ NUM is 2.5GHz/CAL samplerate.
12. The baud rate configuration method based on the intelligent serial port communication card according to claim 11, further comprising:
the configuration parameter CAL _ NUM is equivalent to the form of A + B/C, wherein A is an integer part, and C is a fixed value 230-1, B is the fractional part of the corresponding calculated molecule.
13. The baud rate configuration method based on the intelligent serial port communication card of claim 12, wherein the "equating the configuration parameter CAL _ NUM to a form of a + B/C" specifically includes:
the values of the A, B, C portion of the configuration parameters are stored in three registers of the controller, respectively.
14. The baud rate configuration method based on the intelligent serial port communication card according to claim 8, further comprising:
the controller outputs the data to the serial communication chip according to the baud rate.
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| CN102088374A (en) * | 2010-11-25 | 2011-06-08 | 中国航空无线电电子研究所 | Stimulating module for testing universal performance of serial interface |
| CN103684949A (en) * | 2013-12-19 | 2014-03-26 | 北京遥测技术研究所 | High-precision Baud rate universal serial port |
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- 2014-10-08 CN CN201410524614.XA patent/CN104298315A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6263033B1 (en) * | 1998-03-09 | 2001-07-17 | Advanced Micro Devices, Inc. | Baud rate granularity in single clock microcontrollers for serial port transmissions |
| CN2750581Y (en) * | 2004-12-03 | 2006-01-04 | 中国电子科技集团公司第五十研究所 | Serial interface card with randomly set communication baud rate |
| CN101217416A (en) * | 2007-12-27 | 2008-07-09 | 重庆大学 | A network synthesis integrated debugging and testing system |
| CN102088374A (en) * | 2010-11-25 | 2011-06-08 | 中国航空无线电电子研究所 | Stimulating module for testing universal performance of serial interface |
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