CN104294354B - A kind of GaN epitaxy technique method - Google Patents

A kind of GaN epitaxy technique method Download PDF

Info

Publication number
CN104294354B
CN104294354B CN201310304608.9A CN201310304608A CN104294354B CN 104294354 B CN104294354 B CN 104294354B CN 201310304608 A CN201310304608 A CN 201310304608A CN 104294354 B CN104294354 B CN 104294354B
Authority
CN
China
Prior art keywords
cushion
gexcy
sic
gan
growth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201310304608.9A
Other languages
Chinese (zh)
Other versions
CN104294354A (en
Inventor
刘继全
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Huahong Grace Semiconductor Manufacturing Corp
Original Assignee
Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Huahong Grace Semiconductor Manufacturing Corp filed Critical Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority to CN201310304608.9A priority Critical patent/CN104294354B/en
Publication of CN104294354A publication Critical patent/CN104294354A/en
Application granted granted Critical
Publication of CN104294354B publication Critical patent/CN104294354B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention discloses a kind of GaN epitaxy process, the method comprises the following steps: 1) grow Si on a silicon substrate(1‑x‑y)GexCy cushion;2) Si is gradually reduced(1‑x‑y)The content of Ge in GexCy cushion, until being 0, thus grows Si(1‑x‑y)GexCy and SiC cushion;3) at Si(1‑x‑y)SiC cushion is grown on GexCy and SiC cushion;4) on SiC cushion, carry out GaN epitaxy growth, form GaN epitaxial layer.The present invention utilizes the cushion high-quality GaN epitaxial layer of length in next life that lattice paprmeter gradually changes, and the method can prevent GaN defect, improves the quality of GaN epitaxy.

Description

A kind of GaN epitaxy technique method
Technical field
The invention belongs to semiconductor integrated circuit manufacturing process, relate to a kind of epitaxy technique method, particularly relate to a kind of GaN epitaxy process.
Background technology
GaN belongs to semiconductor material with wide forbidden band, it has physics and the chemical property of excellence, as big in energy gap, breakdown field strength is high, saturated electron drift velocity is big, thermal conductivity is high and anti-radiation performance is strong, thermal conductivity and dielectric constant big, chemical characteristic is stable, is particularly suitable for making the semiconductor device used under high pressure, high temperature, high frequency, high power, strong radiation environment.Specifically, the energy gap of GaN is bigger than Si material, and intrinsic carrier concentration is lower than Si, and the limit of working temperature thus determining GaN base device is higher than Si base device.From the standpoint of heat stability, the bond energy of III-V compounds of group is bigger than Si material, at high temperature has higher stability.But, current GaN single crystal growth more difficulty, it is difficult to obtain high-quality, large scale, the GaN single crystal of low cost.GaN is difficult to grow on a si substrate mainly two aspects, and first is lattice mismatch, and the chances are 17% for the mismatch of the two;Two is that the difference of thermal coefficient of expansion is the biggest, causes the stress between GaN and Si very big, and GaN is easy to be full of cracks.
Lattice is adaptive generally uses increase cushion to solve, and conventional cushion has AlN, SiC, Al2O3Deng.The feature of cushion be lattice paprmeter and GaN close, the two fit is relatively low.But the differences between lattice constant of cushion and Si is relatively big, the two fit is very big, so causes cushion having more lattice defect close to the position of Si substrate, and so lattice defect is diffused into (see figure 1) in GaN epitaxial layer, thus affects the quality of GaN epitaxy.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of GaN epitaxy process, utilizes the cushion high-quality GaN epitaxial layer of length in next life that lattice paprmeter gradually changes, and the method can prevent GaN defect, improves the quality of GaN epitaxy.
For solving above-mentioned technical problem, the present invention provides a kind of GaN epitaxy process, and the method comprises the following steps:
1) Si is grown on a silicon substrate(1-x-y)GexCy cushion;
2) Si is gradually reduced(1-x-y)The content of Ge in GexCy cushion, until being 0, thus grows Si(1-x-y)GexCy and SiC cushion;
3) at Si(1-x-y)SiC cushion is grown on GexCy and SiC cushion;
4) on SiC cushion, carry out GaN epitaxy growth, form GaN epitaxial layer.
Further, the surface orientation of described step 1) silicon substrate is (111), described Si(1-x-y)GexCy cushion meets: 8.2%≤x/y≤10.7%, and its thickness is 1-100nm.Described step 1) uses vapour phase epitaxy or ultra-high vacuum CVD method growth Si(1-x-y)GexCy cushion, growth temperature is at 500-1000 degree Celsius, and reactant gas source is SiH4Or DCS, GeH4, SiH3CH3And H2
Further, described step 2) in Si(1-x-y)The content of the Ge in GexCy and SiC cushion is less than Si(1-x-y)Ge content in GexCy cushion, and its in a longitudinal direction Ge content be gradually lowered, at Si(1-x-y)GexCy and SiC breaker topping Ge content is 0, is SiC, Si(1-x-y)The thickness of GexCy and SiC cushion is 10-100nm.Described step 2) in Si(1-x-y)GexCy and SiC cushion uses Si in step 1)(1-x-y)The growth technique that GexCy cushion is same, i.e. uses vapour phase epitaxy or the growth of ultra-high vacuum CVD method, and growth temperature is at 500-1000 degree Celsius, and reactant gas source is SiH4Or DCS, GeH4, SiH3CH3And H2, by being gradually lowered GeH4Flow is gradually lowered Si(1-x-y)The concentration of Ge in GexCy and SiC cushion;Si in step 1)(1-x-y)GexCy cushion and step 2) in Si(1-x-y)GexCy and SiC cushion or completed by one step growth technique, or separately complete.
Further, in described step 3), the thickness of SiC cushion is 5-10000nm, and its growth technique uses vapour phase epitaxy or the growth of ultra-high vacuum CVD method, and growth temperature is at 500-1000 degree Celsius, and reactant gas source is SiH4Or DCS, SiH3CH3And H2;SiC buffer growth and step 2 in step 3)) in Si(1-x-y)GexCy and SiC buffer growth or synchronously complete, or separately complete.
Further, in described step 4), the thickness of GaN epitaxial layer is 0.01-100 micron.In described step 4), GaN epitaxial layer uses metallo-organic compound chemical gaseous phase deposition, molecular beam epitaxy or vapor phase epitaxy method to grow, and growth temperature is 800-1300 degree Celsius, and growth gasses is trimethyl gallium and NH3
Compare with existing method, the beneficial effects of the present invention is: the present invention is by changing Si(1-x-y)Ge content in GexCy cushion and gradually change the lattice paprmeter of cushion, and then grow high-quality GaN epitaxial layer thereon.The method can effectively alleviate the lattice mismatch between GaN and silicon substrate, reduces lattice defect, improves epitaxial quality.
Accompanying drawing explanation
Fig. 1 is the GaN epitaxy schematic diagram that tradition GaN growth technique is formed;
Fig. 2-Fig. 5 is the technological process generalized section of the present invention;Wherein, Fig. 2 is the generalized section after the step 1) of the present invention completes;Fig. 3 is the step 2 of the present invention) complete after generalized section;Fig. 4 is the generalized section after the step 3) of the present invention completes;Fig. 5 is the generalized section after the step 4) of the present invention completes.
In figure, description of reference numerals is as follows:
10 is silicon substrate, and 11 is Si(1-x-y)GexCy cushion, 12 is Si(1-x-y)GexCy and SiC cushion, 13 is SiC cushion, and 14 is GaN epitaxial layer.
Detailed description of the invention
The present invention is further detailed explanation with embodiment below in conjunction with the accompanying drawings.
As Figure 2-Figure 5, one GaN epitaxy process of the present invention, specifically include following steps:
1) as in figure 2 it is shown, grow Si on the silicon substrate 10 that crystal orientation is (111)(1-x-y)GexCy cushion 11;The surface orientation of silicon substrate 10 is (111), Si(1-x-y)GexCy cushion 11 meets: 8.2%≤x/y≤10.7%, and the thickness of cushion 11 is 1-100nm.Using vapour phase epitaxy or the growth of ultra-high vacuum CVD method, growth temperature is at 500-1000 degree Celsius, and reactant gas source is SiH4Or DCS (dichlorosilane), GeH4, SiH3CH3And H2
2) as it is shown on figure 3, gradually reduce Si(1-x-y)The content of Ge in GexCy cushion 11, until being 0, thus grows Si(1-x-y)GexCy and SiC cushion 12;Si in cushion 12(1-x-y)The Ge content of GexCy is less than Si(1-x-y)Ge content in GexCy cushion 11, and its in a longitudinal direction Ge content be gradually lowered, at cushion 12 top, Ge content is 0, is SiC.The thickness of cushion 12 is 10-100nm.Cushion 12 uses the same growth technique of cushion 11, and (can use vapour phase epitaxy or the growth of ultra-high vacuum CVD method, growth temperature is at 500-1000 degree Celsius, and reactant gas source is SiH4Or DCS (dichlorosilane), GeH4, SiH3CH3And H2), by being gradually lowered GeH4Flow is gradually lowered the concentration of Ge in cushion 12.Cushion 11 and cushion 12 can be completed by one step growth technique, it is also possible to separately complete.
3) as shown in Figure 4, at Si(1-x-y)SiC cushion 13 is grown on GexCy and SiC cushion 12;The thickness of SiC cushion 13 is 5-10000nm, and its growth technique can use the technique of cushion 11 and 12 to grow, and simply removes GeH4Gas.I.e. reactant gas source is SiH4Or DCS (dichlorosilane), SiH3CH3And H2.Cushion 13 can synchronously complete with cushion 12, it is also possible to separately completes.
4) as it is shown in figure 5, carry out GaN epitaxy growth on SiC cushion 13, GaN epitaxial layer 14 is formed;GaN epitaxial layer 14 can use MOCVD(metallo-organic compound chemical gaseous phase deposition), molecular beam epitaxy, the method such as vapour phase epitaxy grow, growth temperature is 800-1300 degree Celsius, and growth gasses is TMGa(trimethyl gallium) and NH3, growth thickness is 0.01-100 micron.
At Si(1-x-y)In GexCy, owing to the lattice paprmeter of Ge is bigger than Si, and the lattice paprmeter of C (see Table 1) less than Si, can release, when the ratio of Ge and C is suitable, Si(1-x-y)The lattice paprmeter of GexCy can equal with Si or approximation, through calculate, when 8.2%≤x/y≤10.7%, Si(1-x-y)The lattice paprmeter of GexCy and Si closest to, on silicon substrate 10, grow Si with this condition(1-x-y)GexCy cushion 11, lattice mismatch is minimum.Si and Si(1-x-y)Will not defective produce between GexCy.Hereafter the content of Ge it is gradually lowered, until being 0.Owing to Ge concentration is gradually lowered, Si(1-x-y)The lattice paprmeter of GexCy is gradually lowered, and reduces the stress produced due to lattice mismatch to greatest extent.When Ge concentration is 0, grow out is SiC cushion 13, and the lattice paprmeter of SiC and GaN very close to, lattice structure is the most similar, it is possible to grow high-quality GaN epitaxial layer 14 on SiC cushion 13.
The present invention is by changing Si(1-x-y)Ge content in GexCy and gradually change the lattice paprmeter of cushion, and then grow the extension of high-quality GaN thereon.
Table 1: the lattice paprmeter of each material
Material Lattice paprmeter
Si 5.43
Ge 5.66
C 3.57
Si(1-x-y)GexCy 3.08-5.43
SiC 3.08
GaN 3.18

Claims (7)

1. a GaN epitaxy process, is characterized by, the method comprises the following steps:
1) Si is grown on a silicon substrate(1-x-y)GexCy cushion;The surface orientation of described silicon substrate is (111), described Si(1-x-y)GexCy cushion meets: 8.2%≤x/y≤10.7%, and its thickness is 1-100nm;
2) Si is gradually reduced(1-x-y)The content of Ge in GexCy cushion, until being 0, thus grows Si(1-x-y)GexCy and SiC cushion;
3) at Si(1-x-y)SiC cushion is grown on GexCy and SiC cushion;
4) on SiC cushion, carry out GaN epitaxy growth, form GaN epitaxial layer.
2. a kind of GaN epitaxy process as claimed in claim 1, is characterized by, described step 1) use vapour phase epitaxy Or ultra-high vacuum CVD method growth Si(1-x-y)GexCy cushion, growth temperature, at 500-1000 degree Celsius, is reacted Source of the gas is SiH4Or DCS, GeH4, SiH3CH3And H2
3. GaN epitaxy process as claimed in claim 1 a kind of, is characterized by, described step 2) in Si(1-x-y)GexCy It is less than Si with the content of the Ge in SiC cushion(1-x-y)Ge content in GexCy cushion, and its Ge in a longitudinal direction Content is gradually lowered, at Si(1-x-y)GexCy and SiC breaker topping Ge content is 0, is SiC, Si(1-x-y)GexCy and The thickness of SiC cushion is 10-100nm.
4. a kind of GaN epitaxy process as described in claim 1 or 3, is characterized by, described step 2) in Si(1-x-y)GexCy With SiC cushion use step 1) in Si(1-x-y)The growth technique that GexCy cushion is same, i.e. uses vapour phase epitaxy or superelevation Chemical vapor deposition method grows, and growth temperature is at 500-1000 degree Celsius, and reactant gas source is SiH4Or DCS, GeH4, SiH3CH3And H2, by being gradually lowered GeH4Flow is gradually lowered Si(1-x-y)The concentration of Ge in GexCy and SiC cushion; Step 1) in Si(1-x-y)GexCy cushion and step 2) in Si(1-x-y)GexCy and SiC cushion or by one step growth technique Complete, or separately complete.
5. GaN epitaxy process as claimed in claim 1 a kind of, is characterized by, described step 3) in SiC cushion Thickness be 5-10000nm, its growth technique use vapour phase epitaxy or ultra-high vacuum CVD method growth, growth temperature Degree is at 500-1000 degree Celsius, and reactant gas source is SiH4Or DCS, SiH3CH3And H2;Step 3) in SiC cushion raw Long and step 2) in Si(1-x-y)GexCy and SiC buffer growth or synchronously complete, or separately complete.
6. GaN epitaxy process as claimed in claim 1 a kind of, is characterized by, described step 4) in GaN epitaxy The thickness of layer is 0.01-100 micron.
7. a kind of GaN epitaxy process as described in claim 1 or 6, is characterized by, described step 4) in outside GaN Prolonging layer uses metallo-organic compound chemical gaseous phase deposition, molecular beam epitaxy or vapor phase epitaxy method to grow, and growth temperature is 800-1300 degree Celsius, growth gasses is trimethyl gallium and NH3
CN201310304608.9A 2013-07-19 2013-07-19 A kind of GaN epitaxy technique method Active CN104294354B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201310304608.9A CN104294354B (en) 2013-07-19 2013-07-19 A kind of GaN epitaxy technique method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201310304608.9A CN104294354B (en) 2013-07-19 2013-07-19 A kind of GaN epitaxy technique method

Publications (2)

Publication Number Publication Date
CN104294354A CN104294354A (en) 2015-01-21
CN104294354B true CN104294354B (en) 2016-10-19

Family

ID=52314295

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201310304608.9A Active CN104294354B (en) 2013-07-19 2013-07-19 A kind of GaN epitaxy technique method

Country Status (1)

Country Link
CN (1) CN104294354B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1508843A (en) * 2002-11-25 2004-06-30 ���渮 Substrate locally with mono-crystalline gallium nitride and its preparing method
CN1535472A (en) * 2001-07-20 2004-10-06 Ħ��������˾ Epitaxial semiconductor on insulator (SOI) structures and devices
JP2005317909A (en) * 2004-04-28 2005-11-10 Samsung Electro Mech Co Ltd Method for growing nitride single crystal on silicon substrate , nitride semiconductor light emitting element using it, and its manufacturing method
JP2010037139A (en) * 2008-08-05 2010-02-18 Shin Etsu Handotai Co Ltd Method for manufacturing semiconductor substrate

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1535472A (en) * 2001-07-20 2004-10-06 Ħ��������˾ Epitaxial semiconductor on insulator (SOI) structures and devices
CN1508843A (en) * 2002-11-25 2004-06-30 ���渮 Substrate locally with mono-crystalline gallium nitride and its preparing method
JP2005317909A (en) * 2004-04-28 2005-11-10 Samsung Electro Mech Co Ltd Method for growing nitride single crystal on silicon substrate , nitride semiconductor light emitting element using it, and its manufacturing method
JP2010037139A (en) * 2008-08-05 2010-02-18 Shin Etsu Handotai Co Ltd Method for manufacturing semiconductor substrate

Also Published As

Publication number Publication date
CN104294354A (en) 2015-01-21

Similar Documents

Publication Publication Date Title
CN110504343B (en) Gallium oxide film based on sapphire substrate and growth method and application thereof
CN111029246B (en) Method for reducing triangular defects in SiC epitaxial layer
CN109065438B (en) Preparation method of AlN thin film
RU2008145801A (en) METHOD FOR GROWING NITRIDE III SEMICONDUCTOR CRYSTAL OF GROUP III, METHOD FOR PRODUCING NITRIDE III SEMICONDUCTOR CRYSTAL FROM NITRIDE III GROUP AND NITRIDE III SEMICONDUCTOR CRYSTAL SUBSTRATE
CN103682016A (en) Manufacturing method for GaN epitaxy or substrate
CN106816499B (en) A kind of preparation method of LED epitaxial slice
KR101672213B1 (en) Method for manufacturing semiconductor device
CN106229397B (en) A kind of growing method of LED epitaxial slice
CN104779141A (en) Preparation method of low-deflection angle silicon carbide homogeneous epitaxial material
CN107887255B (en) High-resistance GaN film epitaxial growth method
KR20150002066A (en) Epitaxial wafer
KR102231643B1 (en) METHOD FOR GROWIG SiC EPITAXIAL LAYER AND POWER DEVICE
CN105006427B (en) A kind of method that high-quality gallium nitride epitaxial structure is grown using low temperature buffer layer
CN105810725A (en) Silicon-based gallium nitride semiconductor wafer and manufacturing method thereof
CN104465720A (en) Semiconductor epitaxial structure and growth method thereof
KR20100104997A (en) Nitride semiconductor substrate having dislocation blocking layer and manufacturing method thereof
CN114664642B (en) HEMT structure based on III-nitride homoepitaxy, preparation method and application thereof
KR20140137795A (en) Epitaxial wafer
US11183385B2 (en) Method for passivating silicon carbide epitaxial layer
CN104294354B (en) A kind of GaN epitaxy technique method
CN113488375B (en) Method for inhibiting Crown defect of epitaxial edge
JP6527667B2 (en) Method of manufacturing nitride semiconductor substrate
KR101384071B1 (en) Nitride semiconductor substrate, method for fabricating the substrate and light emitting diode including the substrate
CN113089091A (en) Boron nitride template and preparation method thereof
CN110957354A (en) Silicon heavily-doped gallium nitride heteroepitaxy material structure and stress control method

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant