CN104270554A - Camera for high-definition CMOS endoscope - Google Patents
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- CN104270554A CN104270554A CN201410466545.1A CN201410466545A CN104270554A CN 104270554 A CN104270554 A CN 104270554A CN 201410466545 A CN201410466545 A CN 201410466545A CN 104270554 A CN104270554 A CN 104270554A
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Abstract
The invention relates to a camera for a high-definition CMOS endoscope. The camera for the high-definition CMOS endoscope comprises an image sensor, a system sequence circuit, an LVDS coding circuit, a power supply unit and SCCB control signals. The output end of the system sequence circuit is connected with the input end of the image sensor. The output end of the image sensor is connected with the input end of the LVDS coding circuit. The output end of the LVDS coding circuit outputs the signals. The SCCB control signals are input into the image sensor. The power supply unit is electrically connected with the image sensor, the system sequence circuit and the LVDS coding circuit. A CMOS sensor with the resolution ratio up to 720 P is adopted, the frame rate can reach 30fps, the size of the camera is reduced, the number pixel is increased, video signals are output by adopting an LVDS coding technology for coding, the resolution is improved, the transmission distance is increased, the control interface of the camera is opened, the exposure mode of the camera can be set through a rear end processing chip, and the light reflection problem caused during metal object observation is solved.
Description
Technical field
The invention belongs to endoscopic arts, particularly relate to a kind of camera of high definition CMOS endoscope.
Background technology
Endoscope camera head transducer has two types, and one is CCD(Charge-coupled Device, charge coupled device), one is CMOS(Complementary Metal Oxide Semiconductor, complementary metal oxide semiconductors (CMOS)).720P high definition endoscope camera head is in the market all adopt ccd sensor, and the volume of camera is comparatively large, adds the size of end of probe to a great extent, makes endoscope be difficult to apply in narrow space.And the CMOS endoscope camera head pixel of current trend is all below 440,000, pixel is too low, is difficult to the details on observed object surface, affects the diagnosis of endoscope user to fault.Except the shortcoming of pixel deficiency, traditional parameter such as CMOS endoscope camera head exposure mode, white balance is non-adjustable, and often overexposure during the observation easy reflective measured object such as metal, directly affects picture quality.
In order to tackle complicated industrial environment, camera, except meeting high-definition image collection, also needs the problem solving high-definition video signal transmission.Endoscope camera head major part directly exports AV vision signal on the market, and AV vision signal antijamming capability is comparatively strong and data volume only has 1/4th of 720P camera, and therefore the transmission problem of vision signal is easier to solve.But 1,000,000 high definition CMOS camera transmission is parallel digital image signal at a high speed, institute passes data volume greatly and the antijamming capability of digital signal is weak.In order to solve the transmission problem of high definition module image data,
Existing endoscope camera head volume is larger, power supply and data line more, cmos image sensor and LVDS encode seal will be contained in diameter and be less than the endoscope end of probe assembly difficulty of 7mm comparatively greatly, resolution is low, transmission range is near and observation metal object runs into reflective problem.
Summary of the invention
The invention provides a kind of camera of high definition CMOS endoscope, be intended to solve existing endoscope camera head volume larger, power supply and data line more, cmos image sensor and LVDS encode seal will be contained in diameter and be less than the endoscope end of probe assembly difficulty of 7mm comparatively greatly, resolution is low, transmission range is near and observation metal object runs into reflective problem.
The present invention realizes like this, a kind of camera of high definition CMOS endoscope, this camera comprises imageing sensor, system sequence circuit, LVDS coding circuit, power supply and SCCB control signal, described system sequence circuit output end connects the input of described imageing sensor, the output of described imageing sensor connects described LVDS coding circuit input, signal exports by described LVDS coding circuit output, described SCCB control signal inputs described imageing sensor, described power supply unit is electrically connected described imageing sensor respectively, system sequence circuit and LVDS coding circuit.
Further technical scheme of the present invention is: described imageing sensor adopts the cmos image sensor of resolution 720P.
Further technical scheme of the present invention is: described cmos image sensor data transmission format is 8bit RAW RGB, and frame per second is 30fps, and video bandwidth is 140.6Mbps.
Further technical scheme of the present invention is: described LVDS coding circuit input signal is pixel clock signal PCLK, field sync signal VSYNC, line synchronizing signal HREF and vision signal D [0,7], outputs signal as differential signal DATA+, DATA-.
Further technical scheme of the present invention is: described LVDS coding circuit adopts the input of support 10 bit parallel data, and system clock is input as 16 MHz ~ 45 MHz, and transmission rate is up to 450 Mbps.
Further technical scheme of the present invention is: described system sequence circuit adopts the active crystal oscillator of OSC240, and frequency is 24.576 MHz, message transmission rate 240Mbps.
The invention has the beneficial effects as follows: have employed the cmos sensor of resolution up to 720P, frame per second can reach 30fps, reduce the volume of camera, improve pixel, adopt LVDS coding techniques outputting video signal to encode, improve resolution, add transmission range, opened camera control interface, make back-end processing chip can arrange the exposure mode of camera, solving observation metal object is run into reflective problem.
Accompanying drawing explanation
Fig. 1 is the camera structure block diagram that the embodiment of the present invention provides;
Fig. 2 is the CMOS peripheral circuit structure chart that the embodiment of the present invention provides;
Fig. 3 is the LVDS pointtopoint topology schematic diagram that the embodiment of the present invention provides;
Fig. 4 is the cmos image sensor that provides of the embodiment of the present invention and coding chip interface diagram;
Fig. 5 is the wiring schematic diagram of the cmos image sensor chip interface that the embodiment of the present invention provides.
Embodiment
Fig. 1 shows the camera of high definition CMOS endoscope provided by the invention, this camera comprises imageing sensor, system sequence circuit, LVDS coding circuit, power supply and SCCB control signal, described system sequence circuit output end connects the input of described imageing sensor, the output of described imageing sensor connects described LVDS coding circuit input, signal exports by described LVDS coding circuit output, described SCCB control signal inputs described imageing sensor, described power supply unit is electrically connected described imageing sensor respectively, system sequence circuit and LVDS coding circuit.Have employed the cmos sensor of resolution up to 720P, frame per second can reach 30fps, reduce the volume of camera, improve pixel, adopt LVDS coding techniques outputting video signal to encode, improve resolution, add transmission range, opened camera control interface, make back-end processing chip can arrange the exposure mode of camera, solving observation metal object is run into reflective problem.
Described imageing sensor adopts the cmos image sensor of resolution 720P.
Described cmos image sensor data transmission format is 8bit RAW RGB, and frame per second is 30fps, and video bandwidth is 140.6Mbps.
Described LVDS coding circuit input signal is pixel clock signal PCLK, field sync signal VSYNC, line synchronizing signal HREF and vision signal D [0,7], outputs signal as differential signal DATA+, DATA-.
Described LVDS coding circuit adopts the input of support 10 bit parallel data, and system clock is input as 16 MHz ~ 45 MHz, and transmission rate is up to 450 Mbps.
Described system sequence circuit adopts the active crystal oscillator of OSC240, and its frequency is 24.576 MHz, and package dimension is 3mm*2mm.
The OV9660 chip of what described cmos image sensor adopted is Omnivision company.
Described LVDS coding circuit have employed the MAX9235 chip of Maxim company, and its message transmission rate is up to 240 Mhz.
A kind of 720P resolution, frame per second reaches 30fps, and diameter is less than the CMOS industrial endoscope camera of 6.2mm.For the application of satisfied most of industrial environment, the transmission range of camera reaches more than 10 meters.Whole camera module includes cmos image sensor, system sequence circuit, LVDS coding circuit, power supply signal and SCCB control signal etc.
Cmos image sensor is only at the peripheral hardware circuit adapted, could normally work when the corresponding register of transducer is set up, as shown in Figure 2, for the structure chart of peripheral circuit, comprise clock circuit, power supply, digital picture output interface, SCCB (i.e. I2C) bus interface etc.
Cmos image sensor required voltage signal is: 1, analog voltage input AVDD; 2, be the DOVDD that digital output interface is powered.Add decoupling capacitor near the plant-grid connection pin, the Digital and analog internal reference voltage of chip to be connected to digitally by 0.1 μ F electric capacity by corresponding pin and in analog.According to the requirement of imageing sensor, external clock is input as 24Mhz, the clock chip that selected encapsulation and integration degree is higher, and package dimension is 3.0 mm X 2.0 mm, the XVCLK pin of incoming image transducer after clock signal exports.Vision signal exports and includes pixel clock signal PCLK, field sync signal VSYNC, line synchronizing signal HREF and vision signal D [0,7], these signals are input to LVDS coding chip, and Signal coding is become LVDS signal and exports from module by LVDS coding chip.The image processing function that the mode of operation of imageing sensor and chip carry controls by SCCB interface, and data wire SOID and clock line SOIC directly draws from module, is configured by rear end by cable.
As shown in Figure 3, LVDS (Low Voltage Differential Signal) i.e. technology of Low Voltage Differential Signaling has possessed the advantage of difference signal technique.Containing the current source of a 3.5mA in lvds driver, the input impedance of receiver is very high, and produce the pressure drop of 350 mV at the two ends of the terminal resistance of lOO Ω, therefore LVDS is applicable to low-voltage system.After LVDS coding, original 11 wires just can be reduced to a pair twisted-pair feeder and just can realize transmission.Cmos image sensor resolution is 1280x800, and data transmission format is 8bit RAW RGB, and frame per second is 30fps video bandwidth is 140.6Mbps.For high definition endoscope, whole system is the corresponding image processing system of a camera head, adopt point-to-point arrangement, as shown in Figure 3, first parallel video data-signal is converted to serial data stream, unstring again after cable transmission, therefore just need to use Code And Decode chip.According to above requirement, we have selected 10 LVDS Code And Decode chips.Coding chip can support the input of 10 bit parallel data, and chip system clock input range is 16 MHz ~ 45 MHz, and its message transmission rate is up to 450 Mbps.Be the clock of pixel clock PCLK as coding chip of 24 .576MHz using frequency, its message transmission rate can reach 240 Mhz, is greater than video bandwidth 140.6 Mbz, meets the demands.
As shown in Figure 4, for cmos image sensor and coding chip interface diagram, the synchronizing signal that transducer exports and parallel data access 10 parallel-by-bit input interfaces of coding chip successively from a high position to low level, and pixel clock PCLK is as the system clock of coding chip.LVDS signal enters into rear end through twisted-pair feeder again through PCB wire and processes.
As shown in Figure 5, the VREFH of chip U1 connects foot meridian capacitor C4 ground connection, the VREFN of chip U1 connects foot meridian capacitor C5 ground connection, the D8 pin of chip U1 is vacant, the D6 pin of chip U1 connects the IN6 pin of chip U2, the D7 pin of chip U1 connects the IN7 pin of chip U2, the AGND of chip U1 connects the 6th pin of foot meridian capacitor C3 connection binding post P1, the AGND pin also ground connection of chip U1 simultaneously, the AVDD pin of chip U1 connects the 6th pin of binding post P1, the D4 pin of chip U1 connects the IN4 pin of chip U2, the D5 pin of chip U1 connects the IN5 pin of chip U2, the D2 pin of chip U1 connects the IN2 pin of chip U2, the D3 pin of chip U1 connects the IN pin of chip U2, the SIOC pin of chip U1 connects the 3rd pin of binding post P1, the SIOD pin of chip U1 connects the 4th pin of binding post P1, the D0/STRB pin of chip U1 connects the IN0 pin of chip U2, the D1 pin of chip U1 connects the IN0 pin of chip U2, the XVCLK pin of chip U1 connects the OUT pin of crystal oscillator U3, the VREFD pin of chip U1 connects the 9th pin of binding post P1, the VSYNC pin of chip U1 connects the IN8 pin of chip U2, the DOGND of chip U1 connects the 8th pin of foot meridian capacitor C2 connection binding post P1, the DOGND of chip U1 connects the 9th pin of foot meridian capacitor C1 connection binding post P1, the DOGND pin also ground connection of chip U1, the DOVDD pin of chip U1 connects the 8th pin of binding post P1, the VREFD pin of chip U1 connects the 9th pin of binding post P1, the PCLK pin of chip U1 connects the TCLK pin of chip U2, the HREF pin of chip U1 connects the IN9 pin of chip U2, the VCC pin of chip U2 connects the 7th pin of binding post P1, the GND pin of chip U2 connects the 5th pin of binding post P1, the OUT+ pin of chip U2 connects the 1st pin of binding post P1, 2nd pin of the OUT-pin splicing ear P1 of chip U2, the GND pin of chip U2 connects the 5th pin of binding post P1, the GND pin ground connection of crystal oscillator U3, the EN of crystal oscillator U3, VCC pin connects the 7th pin of binding post P1 respectively.What chip U1 adopted is the OV9660 chip of Omnivision company, and the MAX9235 chip of what chip 2 adopted is Maxim company, what crystal oscillator U3 adopted is the active crystal oscillator of OSC240.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any amendments done within the spirit and principles in the present invention, equivalent replacement and improvement etc., all should be included within protection scope of the present invention.
Claims (6)
1. the camera of a high definition CMOS endoscope, it is characterized in that: this camera comprises imageing sensor, system sequence circuit, LVDS coding circuit, power supply and SCCB control signal, described system sequence circuit output end connects the input of described imageing sensor, the output of described imageing sensor connects described LVDS coding circuit input, signal exports by described LVDS coding circuit output, described SCCB control signal inputs described imageing sensor, described power supply unit is electrically connected described imageing sensor respectively, system sequence circuit and LVDS coding circuit.
2. camera according to claim 1, is characterized in that, described imageing sensor adopts the cmos image sensor of resolution 720P.
3. camera according to claim 2, is characterized in that, described cmos image sensor data transmission format is 8bit RAW RGB, and frame per second is 30fps, and video bandwidth is 140.6Mbps.
4. camera according to claim 3, it is characterized in that, described LVDS coding circuit input signal is pixel clock signal PCLK, field sync signal VSYNC, line synchronizing signal HREF and vision signal D [0,7], outputs signal as differential signal DATA+, DATA-.
5. camera according to claim 4, is characterized in that, described LVDS coding circuit adopts the input of support 10 bit parallel data, and system clock is input as 16 MHz ~ 45 MHz, and transmission rate is up to 450 Mbps.
6. camera according to claim 4, is characterized in that, described system sequence circuit adopts the active crystal oscillator of OSC240, and frequency is 24.576 MHz, message transmission rate 240Mbps.
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| CN107576967A (en) * | 2016-07-05 | 2018-01-12 | 郑樯 | A kind of photosensitive constant current capacitance integral distance measuring sensor |
| CN111050024A (en) * | 2020-01-06 | 2020-04-21 | 华南理工大学 | Image transmission circuit based on MIPI protocol and implementation method thereof |
| CN113163113A (en) * | 2021-03-29 | 2021-07-23 | 广州安凯微电子股份有限公司 | Image sensor frame rate and exposure control system and method |
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| CN107576967A (en) * | 2016-07-05 | 2018-01-12 | 郑樯 | A kind of photosensitive constant current capacitance integral distance measuring sensor |
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| CN113163113A (en) * | 2021-03-29 | 2021-07-23 | 广州安凯微电子股份有限公司 | Image sensor frame rate and exposure control system and method |
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