CN104241377A - Radio frequency LDMOS device and preparing method thereof - Google Patents
Radio frequency LDMOS device and preparing method thereof Download PDFInfo
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- CN104241377A CN104241377A CN201410457681.4A CN201410457681A CN104241377A CN 104241377 A CN104241377 A CN 104241377A CN 201410457681 A CN201410457681 A CN 201410457681A CN 104241377 A CN104241377 A CN 104241377A
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- 238000000034 method Methods 0.000 title claims abstract description 23
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 48
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 46
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 46
- 239000010703 silicon Substances 0.000 claims abstract description 46
- 239000000758 substrate Substances 0.000 claims abstract description 46
- 229920005591 polysilicon Polymers 0.000 claims abstract description 42
- 238000002513 implantation Methods 0.000 claims description 81
- 239000012535 impurity Substances 0.000 claims description 81
- 238000002360 preparation method Methods 0.000 claims description 21
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 20
- 229910052760 oxygen Inorganic materials 0.000 claims description 20
- 239000001301 oxygen Substances 0.000 claims description 20
- 238000007669 thermal treatment Methods 0.000 claims description 20
- 230000015572 biosynthetic process Effects 0.000 claims description 6
- 230000015556 catabolic process Effects 0.000 abstract 1
- 239000002184 metal Substances 0.000 description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 5
- 230000008569 process Effects 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- 238000004088 simulation Methods 0.000 description 4
- 238000004891 communication Methods 0.000 description 3
- 230000009977 dual effect Effects 0.000 description 3
- 230000005669 field effect Effects 0.000 description 3
- INQLNSVYIFCUML-QZTLEVGFSA-N [[(2r,3s,4r,5r)-5-(6-aminopurin-9-yl)-3,4-dihydroxyoxolan-2-yl]methoxy-hydroxyphosphoryl] [(2r,3s,4r,5r)-5-(4-carbamoyl-1,3-thiazol-2-yl)-3,4-dihydroxyoxolan-2-yl]methyl hydrogen phosphate Chemical compound NC(=O)C1=CSC([C@H]2[C@@H]([C@H](O)[C@@H](COP(O)(=O)OP(O)(=O)OC[C@@H]3[C@H]([C@@H](O)[C@@H](O3)N3C4=NC=NC(N)=C4N=C3)O)O2)O)=N1 INQLNSVYIFCUML-QZTLEVGFSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
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-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66681—Lateral DMOS transistors, i.e. LDMOS transistors
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- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
The invention is suitable for the field of integrated circuit preparing and provides a radio frequency LDMOS device and a preparing method thereof. The radio frequency LDMOS device comprises a P+ silicon substrate, a P-type epitaxial region formed on the P+ silicon substrate in an epitaxial mode, a P+ sinking region, a source region, a polysilicon gate, a channel region, a drift region and a drain region. According to the radio frequency LDMOS device and the preparing method thereof, the length of the drift region of the radio frequency LDMOS device is adjusted, so that the breakdown voltage of the radio frequency LDMOS device is changed, and the performance of the radio frequency LDMOS device is optimized.
Description
Technical field
The invention belongs to IC manufacturing field, particularly relate to a kind of radio frequency LDMOS device and preparation method thereof.
Background technology
Horizontal dual pervasion field effect pipe (Lateral Double-diffused MOS, LDMOS) is the RF power device that a kind of market demand is large, development prospect is wide.In Radio-Frequency Wireless Communication field, base station and long range transmitter almost all use silica-based LDMOS high-capacity transistor; In addition, LDMOS is also widely used in radio frequency amplifier, as fields such as HF, VHF and UHF communication system, pulse radar, industry, science and medical applications, aviation electronics and WiMAXTM communication systems.Due to LDMOS have high-gain, High Linear, high withstand voltage, high-output power and easily with the advantage such as CMOS technology compatibility, silica-based ldmos transistor has become a new focus of radio frequency semiconductor power device.As compared to SiGe with GaAs technique, although the high frequency performance of SiLDMOS technology and noiseproof feature are not optimum, but its technique is the most ripe, cost is minimum, power consumption is minimum, application is also extensive, especially along with the scaled down of device feature size, frequency and the noise characteristic of ldmos transistor also improve gradually, therefore in the long run, silica-based LDMOS radio circuit will be the trend of future development.
As shown in Figure 1, be the structural representation of existing radio frequency LDMOS device; The basic structure of existing radio frequency LDMOS device comprises:
The substrate that namely P+ silicon substrate 101 mixes high concentration p type impurity and the P-epitaxial loayer 102 be formed at above described P+ silicon substrate; The resistivity of described P+ silicon substrate 101 is 0.01 ohmcm ~ 0.02 ohmcm, the thickness of described P-epitaxial loayer 102 is arranged according to the requirement of device withstand voltage is different with doping content, if device withstand voltage is 60 volts, the thickness of described P-epitaxial loayer 102 is about 5 microns ~ 8 microns.
Utilize the P+ sinking layer (P+SINKER) 103 injecting and diffuse to form, this P+ sinking layer 103 is through described P-epitaxial loayer 102 and the bottom of described P+ sinking layer 103 enters into described P+ silicon substrate 101.
P trap 104, this P trap 104 is for the formation of the channel region of device.
Grid oxic horizon and grid polycrystalline silicon 108, be covered in the top of described P trap 104, formed channel region by the described P trap 104 of described grid polycrystalline silicon 108.
Drift region 105, is made up of the N-doped region be formed in described P-epitaxial loayer 102, and the side of described drift region 105 and described grid polycrystalline silicon 108 is adjacent.
Source region 106, is made up of a N+ doped region, and the opposite side autoregistration of described grid polycrystalline silicon 108.
Drain region 107, is made up of a N+ doped region, and a segment distance of being separated by of described grid polycrystalline silicon 108, and is be connected with described P trap 104 by described drift region 105.
Source S, drain D and grid G is drawn by metallic pattern 109.Include more metal layers from drain region 107 to drain D and for the contact hole of the connection adjacent metal and through hole, wherein contact hole is used for the connection of drain region 107 and first layer metal, through hole is used for the connection between metal level.More metal layers is also included and for the contact hole of the connection between adjacent metal and through hole between source region 106 and source S, source S also can be the metal 110 of silicon chip back side, also includes more metal layers and for the contact hole of the connection between adjacent metal and through hole between grid polycrystalline silicon 108 and grid G.
Be formed with back metal 110 overleaf after described P+ silicon substrate 101 is thinning, described back metal 110 to be connected with described source S by described P+ silicon substrate 101, described P+ sinking layer 103 or as source electrode.
Puncture voltage is one of most important static parameter of LDMOS, and good voltage endurance is the important embodiment of LDMOS device reliability.Planar technique is adopted to make LDMOS device, because P-N junction surface is subject to the impact of positive charge and Si/SiO2 interfacial state in radius of curvature, oxide layer, the electric field of P-N junction surface is increased, P-N junction punctures first in surface generation, in order to the technology improving the reduction surface field that puncture voltage is taked at P-N junction edge is called knot terminal technology.The invention provides a kind of method that change by drift region implantation dosage improves radio frequency LDMOS puncture voltage, the method can be optimized major parameters such as the threshold voltage to device, puncture voltage and frequency characteristics, thus designs the RF LDMOS device with excellent properties index request.
Summary of the invention
The object of the embodiment of the present invention is to provide a kind of radio frequency LDMOS device and preparation method thereof, to solve the problem cannot optimizing radio-frequency devices puncture voltage of prior art.
The embodiment of the present invention is achieved in that a kind of radio frequency LDMOS device, and described device comprises:
Resistivity is 0.05 ~ 0.15 Ω/cm
3p+ silicon substrate;
The thickness that extension is formed on described P+ silicon substrate is 9 μm, doping content is 6*10
14cm
-3~ 8*10
14cm
-3p type epi region;
B impurity implantation dosage is 5.5*10
15cm
-2~ 7.5*10
15cm
-2, energy is 90 ~ 110Kev, 1050 DEG C of high temperature advances the times to be the P+ sunken regions of 180 ~ 220min;
Field oxygen thickness is the source region of 1.8 ~ 2.2 μm;
Gate oxide thickness is
polysilicon thickness is
polysilicon gate;
B impurity implantation dosage is 2*10
13cm
-2~ 4*10
13cm
-2, energy is 40 ~ 60Kev, 1000 ~ 1100 DEG C of high temperature advance the times to be the channel region of 40 ~ 60min;
As impurity implantation dosage is 1.1*10
12cm
-2~ 1.5*10
12cm
-2, energy is 140 ~ 160Kev, 1000 ~ 1100 DEG C of high temperature advances the time to be 40 ~ 70min, length is 2 μm ~ 4 μm drift region;
AS impurity implantation dosage is 4*10
15cm
-2~ 6*10
15cm
-2, energy is the drain region of 80 ~ 120Kev, 900 ~ 1000 DEG C of rapid thermal treatment 30min.
Another object of the embodiment of the present invention is the preparation method providing a kind of radio frequency LDMOS device, and described method comprises:
Obtain drift region length parameter;
According to the computing formula preset and described drift region length parameter, obtain the relevant parameter of described radio frequency LDMOS device;
Prepare radio frequency LDMOS device according to described drift region length parameter and described relevant parameter, comprising:
Preparation resistivity is 0.05 ~ 0.15 Ω/cm
3p+ silicon substrate;
Above described P+ silicon substrate, form that thickness is 9 μm, doping content is 6*10
14cm
-3~ 8*10
14cm
-3p type epi region;
Be 5.5*10 by implantation dosage
15cm
-2~ 7.5*10
15cm
-2, energy is 90 ~ 110Kev, 1050 DEG C of high temperature advances the times to be the B impurity of 180 ~ 220min, diffuses to form P+ sunken regions;
Form the source region that field oxygen thickness is 1.8 ~ 2.2 μm;
Formation gate oxide thickness is
polysilicon thickness is
polysilicon gate;
Be 2*10 by implantation dosage
13cm
-2~ 4*10
13cm
-2, energy is 40 ~ 60Kev, 1000 ~ 1100 DEG C of high temperature advances the times to be that the B impurity of 40 ~ 60min forms channel region;
Be 1.1*10 by implantation dosage
12cm
-2~ 1.5*10
15cm
-2, energy is 140 ~ 160Kev, 1000 ~ 1100 DEG C of high temperature advances the times to be the As impurity of 40 ~ 70min, forms the drift region that length is 2 μm ~ 4 μm;
Be 4*10 by implantation dosage
15cm
-2~ 6*10
15cm
-2, energy be 80 ~ 120Kev, 900 ~ 1000 DEG C of rapid thermal treatment 30min As impurity formed drain region.
The embodiment of the present invention, by adjusting the drift region length of radio frequency LDMOS device, making the puncture voltage of radio frequency LDMOS device be changed, optimizing the performance of radio frequency LDMOS device.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the embodiment of the present invention, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the structure chart of the radio frequency LDMOS device that prior art provides;
Fig. 2 is the structural representation of the LDMOS device obtained through ISE TCAD process simulation that the embodiment of the present invention provides.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
In order to technical solutions according to the invention are described, be described below by specific embodiment.
Embodiment one
The structural representation of the LDMOS device obtained through ISE TCAD process simulation being illustrated in figure 2 that the embodiment of the present invention provides, for convenience of explanation, only illustrates the part relevant to the embodiment of the present invention, comprising:
Resistivity is 0.05 ~ 0.15 Ω/cm
3p+ silicon substrate 201.
In embodiments of the present invention, radio frequency LDMOS (Lateral Double-diffused MOS, being called for short: horizontal dual pervasion field effect pipe) device is produced on P+ silicon substrate, and first this radio frequency LDMOS device comprises: resistivity is 0.05 ~ 0.15 Ω/cm
3p+ silicon substrate 201.
The thickness that extension is formed on described P+ silicon substrate is 9 μm, doping content is 6*10
14cm
-3~ 8*10
14cm
-3p type epi region 202.
In embodiments of the present invention, on this P+ silicon substrate 201, have that the thickness formed by extension is 9 μm, doping content is 6*10
14cm
-3~ 8*10
14cm
-3p type epi region 202.
B impurity implantation dosage is 5.5*10
15cm
-2~ 7.5*10
15cm
-2, energy is 90 ~ 110Kev, 1050 DEG C of high temperature advances the times to be the P+ sunken regions 203 of 180 ~ 220min.
In embodiments of the present invention, this radio frequency LDMOS device also comprises the B impurity implantation dosage by injecting and diffuse to form is 5.5*10
15cm
-2~ 7.5*10
15cm
-2, energy is 90 ~ 110Kev, 1050 DEG C of high temperature advances the times to be the P+ sunken regions 203 of 180 ~ 220min.
Field oxygen thickness is the source region 204 of 1.8 ~ 2.2 μm.
In embodiments of the present invention, this radio frequency LDMOS device also comprises the source region 204 that an oxygen thickness is 1.8 ~ 2.2 μm.
Gate oxide thickness is
polysilicon thickness is
polysilicon gate 205.
In embodiments of the present invention, this radio frequency LDMOS device also comprises gate oxide thickness and is
polysilicon thickness is
polysilicon gate 205.
B impurity implantation dosage is 2*10
13cm
-2~ 4*10
13cm
-2, energy is 40 ~ 60Kev, 1000 ~ 1100 DEG C of high temperature advances the times to be the channel region 206 of 40 ~ 60min.
In embodiments of the present invention, this radio frequency LDMOS device also comprises B impurity implantation dosage is 2*10
13cm
-2~ 4*10
13cm
-2, energy is 40 ~ 60Kev, 1000 ~ 1100 DEG C of high temperature advances the times to be the channel region 206 of 40 ~ 60min.
As impurity implantation dosage is 1.1*10
12cm
-2~ 1.5*10
12cm
-2, energy is 140 ~ 160Kev, 1000 ~ 1100 DEG C of high temperature advances the time to be 40 ~ 70min, length is 2 μm ~ 4 μm drift region 207.
In embodiments of the present invention, this radio frequency LDMOS device also comprises As impurity implantation dosage is 1.1*10
12cm
-2~ 1.5*10
12cm
-2, energy is 140 ~ 160Kev, 1000 ~ 1100 DEG C of high temperature advances the time to be 40 ~ 70min, length is 2 μm ~ 4 μm drift region 207.
AS impurity implantation dosage is 4*10
15cm
-2~ 6*10
15cm
-2, energy is the drain region 208 of 80 ~ 120Kev, 900 ~ 1000 DEG C of rapid thermal treatment 30min.
In embodiments of the present invention, this radio frequency LDMOS device also comprises AS impurity implantation dosage is 4*10
15cm
-2~ 6*10
15cm
-2, energy is the drain region 208 of 80 ~ 120Kev, 900 ~ 1000 DEG C of rapid thermal treatment 30min.
By simulation process, the puncture voltage of radio frequency LDMOS device provided by the invention can be 73V, and the puncture voltage of radio frequency LDMOS device is optimized.
As a preferred embodiment of the present invention, described radio frequency LDMOS device comprises:
Resistivity is 0.08 Ω/cm
3p+ silicon substrate;
Thickness is 9 μm, doping content is 7*10
14cm
-3p type epi region;
B impurity implantation dosage is 6*10
15cm
-2, energy is 100Kev, 1050 DEG C of high temperature advances the times to be the P+ sunken regions of 200min;
Field oxygen thickness is the source region of 2 μm;
Gate oxide thickness is
polysilicon thickness is
polysilicon gate;
B impurity implantation dosage is 3*10
13cm
-2, energy is 50Kev, 1050 DEG C of high temperature advance the times to be the channel region of 40 ~ 60min;
As impurity implantation dosage is 1.2*10
12cm
-2, energy is 150Kev, 1050 DEG C of high temperature advance the times to be 60min;
AS impurity implantation dosage is 5*10
15cm
-2, energy is the drain region of 100Kev, 950 DEG C of rapid thermal treatment 30min.
By implementing the present embodiment, the puncture voltage of radio frequency LDMOS device can be 72V.
As another preferred embodiment of the present invention, described radio frequency LDMOS device comprises:
Resistivity is 0.07 Ω/cm
3p+ silicon substrate;
Thickness is 9 μm, doping content is 8*10
14cm
-3p type epi region;
B impurity implantation dosage is 7*10
15cm
-2, energy is 90Kev, 1050 DEG C of high temperature advances the times to be the P+ sunken regions of 210min;
Field oxygen thickness is the source region of 2.2 μm;
Gate oxide thickness is
polysilicon thickness is
polysilicon gate;
B impurity implantation dosage is 4*10
13cm
-2, energy is 40Kev, 1100 DEG C of high temperature advance the times to be the channel region of 40min;
As impurity implantation dosage is 1.3*10
12cm
-2, energy is 160Kev, 1100 DEG C of high temperature advance the times to be 50min;
AS impurity implantation dosage is 6*10
15cm
-2, energy is the drain region of 120Kev, 1000 DEG C of rapid thermal treatment 30min.
By embodiment the present embodiment, the puncture voltage of radio frequency LDMOS device can be 68V.
As another preferred embodiment of the present invention, described radio frequency LDMOS device comprises:
Resistivity is 0.05 Ω/cm
3p+ silicon substrate;
Thickness is 9 μm, doping content is 6*10
14cm
-3p type epi region;
B impurity implantation dosage is 7.5*10
15cm
-2, energy is 110Kev, 1050 DEG C of high temperature advances the times to be the P+ sunken regions of 180min;
Field oxygen thickness is the source region of 1.8 μm;
Gate oxide thickness is
polysilicon thickness is
polysilicon gate;
B impurity implantation dosage is 2*10
13cm
-2, energy is 60Kev, 1000 DEG C of high temperature advance the times to be the channel region of 60min;
As impurity implantation dosage is 1.2*10
12cm
-2, energy is 150Kev, 1000 DEG C of high temperature advance the times to be 50min;
AS impurity implantation dosage is 4*10
15cm
-2, energy is the drain region of 80Kev, 900 DEG C of rapid thermal treatment 30min.
By implementing the present embodiment, the puncture voltage of radio frequency LDMOS device can be 71V.
Embodiment two
The embodiment of the present invention also provides a kind of radio frequency LDMOS device preparation method, said method comprising the steps of:
First the present embodiment obtains drift region length parameter, according to the computing formula preset and the drift region length parameter of acquisition, obtain the relevant parameter of radio frequency LDMOS device, finally prepare radio frequency LDMOS device according to drift region length parameter and described relevant parameter, its preparation process specifically comprises:
In step S301, preparation resistivity is 0.05 ~ 0.15 Ω/cm
3p+ silicon substrate.
In embodiments of the present invention, radio frequency LDMOS (Lateral Double-diffused MOS, being called for short: horizontal dual pervasion field effect pipe) device is produced on P+ silicon substrate, and first this radio frequency LDMOS device needs: preparation resistivity is 0.05 ~ 0.15 Ω/cm
3p+ silicon substrate 201.
In step s 302, above described P+ silicon substrate, form that thickness is 9 μm, doping content is 6*10
14cm
-3~ 8*10
14cm
-3p type epi region.
In embodiments of the present invention, after having prepared P+ silicon substrate, need to be formed above described P+ silicon substrate by extension that thickness is 9 μm, doping content is 6*10
14cm
-3~ 8*10
14cm
-3p type epi region.
In step S303, be 5.5*10 by implantation dosage
15cm
-2~ 7.5*10
15cm
-2, energy is 90 ~ 110Kev, 1050 DEG C of high temperature advances the times to be the B impurity of 180 ~ 220min, diffuses to form P+ sunken regions.
In embodiments of the present invention, after the step forming P type epi region, be 5.5*10 by implantation dosage
15cm
-2~ 7.5*10
15cm
-2, energy is 90 ~ 110Kev, 1050 DEG C of high temperature advances the times to be the B impurity of 180 ~ 220min, diffuses to form P+ sunken regions.
In step s 304, the source region that field oxygen thickness is 1.8 ~ 2.2 μm is formed.
In embodiments of the present invention, after the step by diffuseing to form P+ sunken regions, form the source region that field oxygen thickness is 1.8 ~ 2.2 μm.
In step S305, forming gate oxide thickness is
polysilicon thickness is
polysilicon gate.
In embodiments of the present invention, after the step forming source region, this preparation method forms gate oxide thickness and is
polysilicon thickness is
polysilicon gate.
In step S306, be 2*10 by implantation dosage
13cm
-2~ 4*10
13cm
-2, energy is 40 ~ 60Kev, 1000 ~ 1100 DEG C of high temperature advances the times to be that the B impurity of 40 ~ 60min forms channel region.
In embodiments of the present invention, after the step forming polysilicon, be 2*10 by implantation dosage
13cm
-2~ 4*10
13cm
-2, energy is 40 ~ 60Kev, 1000 ~ 1100 DEG C of high temperature advances the times to be that the B impurity of 40 ~ 60min forms channel region.
In step S307, be 1.1*10 by implantation dosage
12cm
-2~ 1.5*10
15cm
-2, energy is 140 ~ 160Kev, 1000 ~ 1100 DEG C of high temperature advances the times to be the As impurity of 40 ~ 70min, forms the drift region that length is 2 μm ~ 4 μm.
In embodiments of the present invention, after the step forming channel region, be 1.1*10 by implantation dosage
12cm
-2~ 1.5*10
15cm
-2, energy is 140 ~ 160Kev, 1000 ~ 1100 DEG C of high temperature advances the times to be the As impurity of 40 ~ 70min, forms the drift region that length is 2 μm ~ 4 μm.
In step S308, be 4*10 by implantation dosage
15cm
-2~ 6*10
15cm
-2, energy be 80 ~ 120Kev, 900 ~ 1000 DEG C of rapid thermal treatment 30min As impurity formed drain region.
In embodiments of the present invention, after the step forming drift region, be 4*10 by implantation dosage
15cm
-2~ 6*10
15cm
-2, energy be 80 ~ 120Kev, 900 ~ 1000 DEG C of rapid thermal treatment 30min As impurity formed drain region.
By simulation process, the preparation method of the radio frequency LDMOS device provided by the present embodiment, can prepare the radio frequency LDMOS device that puncture voltage is 73V, the puncture voltage of the radio frequency LDMOS device being is optimized.
As a preferred embodiment of the present invention, the described method preparing radio frequency LDMOS device, comprises the following steps:
1, preparing resistivity is 0.08 Ω/cm
3p+ silicon substrate;
2, above described P+ silicon substrate, form that thickness is 9 μm, doping content is 7*10
14cm
-3p type epi region;
3, be 6*10 by implantation dosage
15cm
-2, energy is 100Kev, 1050 DEG C of high temperature advances the times to be the B impurity of 200min, diffuses to form P+ sunken regions;
4, the source region that field oxygen thickness is 2 μm is formed;
5, forming gate oxide thickness is
polysilicon thickness is
polysilicon gate;
6, be 3*10 by implantation dosage
13cm
-2, energy is 50Kev, 1050 DEG C of high temperature advances the times to be that the B impurity of 40 ~ 60min forms channel region;
7, be 1.2*10 by implantation dosage
12cm
-2, energy is 150Kev, 1050 DEG C of high temperature advances the times to be the As impurity of 60min;
8, be 5*10 by implantation dosage
15cm
-2, energy be 100Kev, 950 DEG C of rapid thermal treatment 30min As impurity formed drain region.
By the preparation method using the present embodiment to provide, the radio frequency LDMOS device that puncture voltage is 72V can be prepared.
As another preferred embodiment of the present invention, the preparation method of described radio frequency LDMOS device, comprises the following steps:
1, preparing resistivity is 0.07 Ω/cm
3p+ silicon substrate;
2, above described P+ silicon substrate, form that thickness is 9 μm, doping content is 8*10
14cm
-3p type epi region;
3, be 7*10 by implantation dosage
15cm
-2, energy is 90Kev, 1050 DEG C of high temperature advances the times to be the B impurity of 210min, diffuses to form P+ sunken regions;
4, the source region that field oxygen thickness is 2.2 μm is formed;
5, forming gate oxide thickness is
polysilicon thickness is
polysilicon gate;
6, be 4*10 by implantation dosage
13cm
-2, energy is 40Kev, 1100 DEG C of high temperature advances the times to be that the B impurity of 40min forms channel region;
7, be 1.3*10 by implantation dosage
12cm
-2, energy is 160Kev, 1100 DEG C of high temperature advances the times to be the As impurity of 50min;
8, be 6*10 by implantation dosage
15cm
-2, energy be 120Kev, 1000 DEG C of rapid thermal treatment 30min As impurity formed drain region.
By the preparation method using the present embodiment to provide, the radio frequency LDMOS device that puncture voltage is 68V can be prepared.
As another preferred embodiment of the present invention, the preparation method of described radio frequency LDMOS device, comprises the following steps:
1, preparing resistivity is 0.05 Ω/cm
3p+ silicon substrate;
2, above described P+ silicon substrate, form that thickness is 9 μm, doping content is 6*10
14cm
-3p type epi region;
3, be 7.5*10 by implantation dosage
15cm
-2, energy is 110Kev, 1050 DEG C of high temperature advances the times to be the B impurity of 180min, diffuses to form P+ sunken regions;
4, the source region that field oxygen thickness is 1.8 μm is formed;
5, forming gate oxide thickness is
polysilicon thickness is
polysilicon gate;
6, be 2*10 by implantation dosage
13cm
-2, energy is 60Kev, 1000 DEG C of high temperature advances the times to be that the B impurity of 60min forms channel region;
7, be 1.2*10 by implantation dosage
12cm
-2, energy is 150Kev, 1000 DEG C of high temperature advances the times to be the As impurity of 50min;
8, be 4*10 by implantation dosage
15cm
-2, energy be 80Kev, 900 DEG C of rapid thermal treatment 30min As impurity formed drain region.
By the preparation method using the present embodiment to provide, the radio frequency LDMOS device that puncture voltage is 71V can be prepared.
Those of ordinary skill in the art it is also understood that, the all or part of step realized in above-described embodiment method is that the hardware that can carry out instruction relevant by program has come, described program can be stored in a computer read/write memory medium, described storage medium, comprises ROM/RAM, disk, CD etc.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any amendments done within the spirit and principles in the present invention, equivalent replacement and improvement etc., all should be included within protection scope of the present invention.
Claims (8)
1. a radio frequency LDMOS device, is characterized in that, described device comprises:
Resistivity is 0.05 ~ 0.15 Ω/cm
3p+ silicon substrate;
The thickness that extension is formed on described P+ silicon substrate is 9 μm, doping content is 6*10
14cm
-3~ 8*10
14cm
-3p type epi region;
B impurity implantation dosage is 5.5*10
15cm
-2~ 7.5*10
15cm
-2, energy is 90 ~ 110Kev, 1050 DEG C of high temperature advances the times to be the P+ sunken regions of 180 ~ 220min;
Field oxygen thickness is the source region of 1.8 ~ 2.2 μm;
Gate oxide thickness is
polysilicon thickness is
polysilicon gate;
B impurity implantation dosage is 2*10
13cm
-2~ 4*10
13cm
-2, energy is 40 ~ 60Kev, 1000 ~ 1100 DEG C of high temperature advance the times to be the channel region of 40 ~ 60min;
As impurity implantation dosage is 1.1*10
12cm
-2~ 1.5*10
12cm
-2, energy is 140 ~ 160Kev, 1000 ~ 1100 DEG C of high temperature advances the time to be 40 ~ 70min, length is 2 μm ~ 4 μm drift region;
AS impurity implantation dosage is 4*10
15cm
-2~ 6*10
15cm
-2, energy is the drain region of 80 ~ 120Kev, 900 ~ 1000 DEG C of rapid thermal treatment 30min.
2. device as claimed in claim 1, it is characterized in that, described device comprises:
Resistivity is 0.08 Ω/cm
3p+ silicon substrate;
Thickness is 9 μm, doping content is 7*10
14cm
-3p type epi region;
B impurity implantation dosage is 6*10
15cm
-2, energy is 100Kev, 1050 DEG C of high temperature advances the times to be the P+ sunken regions of 200min;
Field oxygen thickness is the source region of 2 μm;
Gate oxide thickness is
polysilicon thickness is
polysilicon gate;
B impurity implantation dosage is 3*10
13cm
-2, energy is 50Kev, 1050 DEG C of high temperature advance the times to be the channel region of 40 ~ 60min;
As impurity implantation dosage is 1.2*10
12cm
-2, energy is 150Kev, 1050 DEG C of high temperature advance the times to be 60min;
AS impurity implantation dosage is 5*10
15cm
-2, energy is the drain region of 100Kev, 950 DEG C of rapid thermal treatment 30min.
3. device as claimed in claim 1, it is characterized in that, described device comprises:
Resistivity is 0.07 Ω/cm
3p+ silicon substrate;
Thickness is 9 μm, doping content is 8*10
14cm
-3p type epi region;
B impurity implantation dosage is 7*10
15cm
-2, energy is 90Kev, 1050 DEG C of high temperature advances the times to be the P+ sunken regions of 210min;
Field oxygen thickness is the source region of 2.2 μm;
Gate oxide thickness is
polysilicon thickness is
polysilicon gate;
B impurity implantation dosage is 4*10
13cm
-2, energy is 40Kev, 1100 DEG C of high temperature advance the times to be the channel region of 40min;
As impurity implantation dosage is 1.3*10
12cm
-2, energy is 160Kev, 1100 DEG C of high temperature advance the times to be 50min;
AS impurity implantation dosage is 6*10
15cm
-2, energy is the drain region of 120Kev, 1000 DEG C of rapid thermal treatment 30min.
4. device as claimed in claim 1, it is characterized in that, described device comprises:
Resistivity is 0.05 Ω/cm
3p+ silicon substrate;
Thickness is 9 μm, doping content is 6*10
14cm
-3p type epi region;
B impurity implantation dosage is 7.5*10
15cm
-2, energy is 110Kev, 1050 DEG C of high temperature advances the times to be the P+ sunken regions of 180min;
Field oxygen thickness is the source region of 1.8 μm;
Gate oxide thickness is
polysilicon thickness is
polysilicon gate;
B impurity implantation dosage is 2*10
13cm
-2, energy is 60Kev, 1000 DEG C of high temperature advance the times to be the channel region of 60min;
As impurity implantation dosage is 1.2*10
12cm
-2, energy is 150Kev, 1000 DEG C of high temperature advance the times to be 50min;
AS impurity implantation dosage is 4*10
15cm
-2, energy is the drain region of 80Kev, 900 DEG C of rapid thermal treatment 30min.
5. a preparation method for radio frequency LDMOS device, is characterized in that, described method comprises:
Obtain drift region length parameter;
According to the computing formula preset and described drift region length parameter, obtain the relevant parameter of described radio frequency LDMOS device;
Prepare radio frequency LDMOS device according to described drift region length parameter and described relevant parameter, comprising:
Preparation resistivity is 0.05 ~ 0.15 Ω/cm
3p+ silicon substrate;
Above described P+ silicon substrate, form that thickness is 9 μm, doping content is 6*10
14cm
-3~ 8*10
14cm
-3p type epi region;
Be 5.5*10 by implantation dosage
15cm
-2~ 7.5*10
15cm
-2, energy is 90 ~ 110Kev, 1050 DEG C of high temperature advances the times to be the B impurity of 180 ~ 220min, diffuses to form P+ sunken regions;
Form the source region that field oxygen thickness is 1.8 ~ 2.2 μm;
Formation gate oxide thickness is
polysilicon thickness is
polysilicon gate;
Be 2*10 by implantation dosage
13cm
-2~ 4*10
13cm
-2, energy is 40 ~ 60Kev, 1000 ~ 1100 DEG C of high temperature advances the times to be that the B impurity of 40 ~ 60min forms channel region;
Be 1.1*10 by implantation dosage
12cm
-2~ 1.5*10
15cm
-2, energy is 140 ~ 160Kev, 1000 ~ 1100 DEG C of high temperature advances the times to be the As impurity of 40 ~ 70min, forms the drift region that length is 2 μm ~ 4 μm;
Be 4*10 by implantation dosage
15cm
-2~ 6*10
15cm
-2, energy be 80 ~ 120Kev, 900 ~ 1000 DEG C of rapid thermal treatment 30min As impurity formed drain region.
6. method as claimed in claim 5, it is characterized in that, described method comprises:
Obtain drift region length parameter;
According to the computing formula preset and described drift region length parameter, obtain the relevant parameter of described radio frequency LDMOS device;
Prepare radio frequency LDMOS device according to described drift region length parameter and described relevant parameter, comprising:
Preparation resistivity is 0.08 Ω/cm
3p+ silicon substrate;
Above described P+ silicon substrate, form that thickness is 9 μm, doping content is 7*10
14cm
-3p type epi region;
Be 6*10 by implantation dosage
15cm
-2, energy is 100Kev, 1050 DEG C of high temperature advances the times to be the B impurity of 200min, diffuses to form P+ sunken regions;
Form the source region that field oxygen thickness is 2 μm;
Formation gate oxide thickness is
polysilicon thickness is
polysilicon gate;
Be 3*10 by implantation dosage
13cm
-2, energy is 50Kev, 1050 DEG C of high temperature advances the times to be that the B impurity of 40 ~ 60min forms channel region;
Be 1.2*10 by implantation dosage
12cm
-2, energy is 150Kev, 1050 DEG C of high temperature advances the times to be the As impurity of 60min;
Be 5*10 by implantation dosage
15cm
-2, energy be 100Kev, 950 DEG C of rapid thermal treatment 30min As impurity formed drain region.
7. method as claimed in claim 5, it is characterized in that, described method comprises:
Obtain drift region length parameter;
According to the computing formula preset and described drift region length parameter, obtain the relevant parameter of described radio frequency LDMOS device;
Prepare radio frequency LDMOS device according to described drift region length parameter and described relevant parameter, comprising:
Preparation resistivity is 0.07 Ω/cm
3p+ silicon substrate;
Above described P+ silicon substrate, form that thickness is 9 μm, doping content is 8*10
14cm
-3p type epi region;
Be 7*10 by implantation dosage
15cm
-2, energy is 90Kev, 1050 DEG C of high temperature advances the times to be the B impurity of 210min, diffuses to form P+ sunken regions;
Form the source region that field oxygen thickness is 2.2 μm;
Formation gate oxide thickness is
polysilicon thickness is
polysilicon gate;
Be 4*10 by implantation dosage
13cm
-2, energy is 40Kev, 1100 DEG C of high temperature advances the times to be that the B impurity of 40min forms channel region;
Be 1.3*10 by implantation dosage
12cm
-2, energy is 160Kev, 1100 DEG C of high temperature advances the times to be the As impurity of 50min;
Be 6*10 by implantation dosage
15cm
-2, energy be 120Kev, 1000 DEG C of rapid thermal treatment 30min As impurity formed drain region.
8. method as claimed in claim 5, it is characterized in that, described method comprises:
Obtain drift region length parameter;
According to the computing formula preset and described drift region length parameter, obtain the relevant parameter of described radio frequency LDMOS device;
Prepare radio frequency LDMOS device according to described drift region length parameter and described relevant parameter, comprising:
Preparation resistivity is 0.05 Ω/cm
3p+ silicon substrate;
Above described P+ silicon substrate, form that thickness is 9 μm, doping content is 6*10
14cm
-3p type epi region;
Be 7.5*10 by implantation dosage
15cm
-2, energy is 110Kev, 1050 DEG C of high temperature advances the times to be the B impurity of 180min, diffuses to form P+ sunken regions;
Form the source region that field oxygen thickness is 1.8 μm;
Formation gate oxide thickness is
polysilicon thickness is
polysilicon gate;
Be 2*10 by implantation dosage
13cm
-2, energy is 60Kev, 1000 DEG C of high temperature advances the times to be that the B impurity of 60min forms channel region;
Be 1.2*10 by implantation dosage
12cm
-2, energy is 150Kev, 1000 DEG C of high temperature advances the times to be the As impurity of 50min;
Be 4*10 by implantation dosage
15cm
-2, energy be 80Kev, 900 DEG C of rapid thermal treatment 30min As impurity formed drain region.
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