CN104241161A - Method for detecting gate oxide deficiency defects of wafers - Google Patents
Method for detecting gate oxide deficiency defects of wafers Download PDFInfo
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- CN104241161A CN104241161A CN201410520762.4A CN201410520762A CN104241161A CN 104241161 A CN104241161 A CN 104241161A CN 201410520762 A CN201410520762 A CN 201410520762A CN 104241161 A CN104241161 A CN 104241161A
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- gate oxide
- disappearance
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- wafer
- method detecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
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- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Sampling And Sample Adjustment (AREA)
Abstract
The invention provides a method for detecting gate oxide deficiency defects of wafers. The method includes utilizing gate oxide layers on the wafers as hard masks after the gate oxide layers grow; performing a silicon etching process; judging particular locations with gate oxide layer deficiency defects caused in a gate oxide layer growing process by the aid of locations of holes formed in semiconductor silicon substrates after the etching process is performed. Compared with the prior art, the method for detecting the gate oxide deficiency defects of the wafers has the advantages that the detection periods can be shortened, and the detection ranges are broad. Besides, the method is simple, and real-time and effective process parameters with reference value can be provided for process windows.
Description
Technical field
The present invention relates to a kind of detection method, particularly a kind of method detecting wafer gate oxide disappearance defect.
Background technology
Along with the development of integrated circuit technology, the critical size of chip is constantly scaled, improve constantly the requirement of CMOS (Complementary Metal Oxide Semiconductor) device performance, the preparation technology of gate oxide is subject to increasing challenge.If some process window is optimized not, easily produce serious systematic defect, the disappearance defect as gate oxide can cause serious electric leakage, makes complete device failure, and causes the decline of the yield of cmos device.
One of the difficult problem that current industry is generally acknowledged to the detection of gate oxide disappearance defect.Current industry finds that gate oxide disappearance defect is normally at the yield test phase that MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) device fabrication process flow all completes, and use ESEM in physical failure analysis, the analytical methods such as transmission electron microscope just can detect.
Disclose in prior art and a kind ofly measure the whether complete test structure of gate oxide, comprise the gate oxide be positioned at successively on substrate, gate electrode, connect the first connection gasket of substrate, connect gate electrode the second connection gasket and and spaced 3rd connection gasket of equal tool between described first connection gasket and the second connection gasket, by the first weld pad and the second weld pad, gate oxide integrity is tested, then test testing place the second weld pad of not passing through and the 3rd weld pad or the first weld pad and the 3rd weld pad, the bad eliminating of test that the defect of metal interconnection layer is caused, just obtain due to gate oxide disappearance defect part.But the test of this method is consuming time long, and program is loaded down with trivial details, be unfavorable for shortening the R&D cycle, detection range is little, and is difficult to online process window optimization and provides effective reference value.
Summary of the invention
The invention provides a kind of method detecting the gate oxide disappearance defect of wafer, comprise the following steps:
Step 1: grow gate oxide on wafer;
Step 2: gate oxide step 1 grown, as oxide hardmask, adopts silicon etching process to corrode described gate oxide, and the bulk silicon substrate of gate oxide disappearance or rejected region can form hole;
Step 3: with the gate oxide surface of wafer described in deionized water rinsing, and by the hole that light microscope scanning step 2 is formed, determine the position of described gate oxide disappearance or rejected region;
Step 4: the sample of gate oxide disappearance or defect described in preparation process 3 also accurately detects gate oxide disappearance or the position of defect by Electronic Speculum.
Preferably, described gate oxide be two-layer or two-layer more than.
Preferably, the technique of described growth gate oxide is quick thermal treatment process or vertical furnace tube technique.
Preferably, the thickness range of every one deck of described gate oxide exists
between.
Preferably, described silicon etching process is dry etch process or wet-etching technology.
Preferably, described dry etch process is etching polysilicon technology.
Preferably, described etching polysilicon technology is for using HBr and O
2plasma etching technology.
Preferably, described wet-etching technology is epitaxial loayer lithographic technique.
Preferably, the etching agent that described epitaxial loayer lithographic technique adopts is tetramethyl ammonium hydroxide solution, and concentration is 2.38% or 25%.
Preferably, the etch period scope of described epitaxial loayer lithographic technique is between 5-120 second, and etching temperature is room temperature 25 DEG C.
Preferably, the sample of described gate oxide disappearance or defect accurately controls focused ion beam with ESEM to carry out cutting preparing in the position of gate oxide disappearance or defect.
Preferably, the position of described accurate detection gate oxide disappearance or defect is accurately detected by transmission electron microscope.
Compared with prior art, the invention has the beneficial effects as follows: by growth gate oxide after wafer on using gate oxide as mask, carry out silicon etching process, the particular location of the gate oxide disappearance defect caused in growth of gate oxide layer technique is judged by the position etching the hole that rear bulk silicon substrate produces, compared with prior art, this detection method has shortening sense cycle, the advantage that detection range is larger, and method is simple, can provides effective in real time to process window and there is the technological parameter of reference value.
Accompanying drawing explanation
Fig. 1 is detection method flow chart provided by the invention;
Fig. 2 is without gate oxide disappearance fault location cross section structure figure before detection method provided by the invention uses;
Fig. 3 is gate oxide disappearance fault location cross section structure figure before detection method provided by the invention uses;
Fig. 4 is detection method schematic diagram provided by the invention;
Fig. 5 is gate oxide disappearance fault location cross section structure figure after detection method provided by the invention uses.
In figure: 1-bulk silicon substrate, 2-gate oxide disappearance place, 3-thick grating oxide layer, 4-thin gate oxide, 5-hole, 6-isolates filler.
Embodiment
For enabling above-mentioned purpose of the present invention, feature and advantage become apparent more, are described in detail the specific embodiment of the present invention below in conjunction with accompanying drawing.
Embodiment one
The invention provides a kind of method detecting the gate oxide disappearance of wafer, as shown in Figure 1, comprise the following steps:
Step 1: grow gate oxide on wafer, due to Problems existing in growth gate oxide technique, appearance gate oxide disappearance place 2 as shown in Figure 3, crystal column surface somewhere can be made, the place complete relative to gate oxide as shown in Figure 2, as thick grating oxide layer 3 and thin gate oxide 4, gate oxide disappearance place 2 can make the bulk silicon substrate 1 of wafer be exposed in air;
Step 2: the thick grating oxide layer 3 step 1 grown and thin gate oxide 4 are as oxide hardmask, adopt etching polysilicon technology etch silicon surface, HBr+O2 is wherein as the gas of corrosion silicon, the surface of continuous bombardment wafer, as shown in Figure 4, the bulk silicon substrate that described gate oxide disappearance place 2 is come out is corroded, and described bulk silicon substrate 1 can form hole 5, as shown in Figure 5;
Step 3: with the gate oxide surface of wafer described in deionized water rinsing, and by the hole 5 that light microscope scanning step 2 is formed, determine the position at described gate oxide disappearance place 2;
Step 4: the sample of gate oxide disappearance described in preparation process 3 also accurately detects the position at gate oxide disappearance place 2 by transmission electron microscope.
As preferably, described gate oxide be two-layer or two-layer more than.
As preferably, the technique of described growth gate oxide is quick thermal treatment process or vertical furnace tube technique.
As preferably, the thickness range of every one deck of described gate oxide exists
between.
As preferably, the sample of described gate oxide disappearance accurately controls focused ion beam with ESEM to carry out cutting preparing in the position that gate oxide lacks.
Embodiment two
The difference of the present embodiment and embodiment one is that the silicon etching technology in step 2 adopts epitaxial loayer lithographic technique, etching agent is wherein tetramethyl ammonium hydroxide solution, concentration is 2.38% or 25%, and etch period scope is between 5-120 second, and etching temperature is room temperature 25 DEG C.
Embodiment three
If gate oxide disappearance place 2 is gate oxide defect in Fig. 3, it detects the detection method being suitable for equally embodiment one or embodiment two and using.
Obviously, those skilled in the art can carry out various change and modification to invention and not depart from the spirit and scope of the present invention.If these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification.
Claims (10)
1. detect a method for the gate oxide disappearance defect of wafer, it is characterized in that, comprise the following steps:
Step 1: grow gate oxide on wafer;
Step 2: gate oxide step 1 grown, as oxide hardmask, adopts silicon etching process to corrode described gate oxide, and the bulk silicon substrate of gate oxide disappearance or rejected region can form hole;
Step 3: with the gate oxide surface of wafer described in deionized water rinsing, and by the hole that light microscope scanning step 2 is formed, determine the position of described gate oxide disappearance or defect;
Step 4: the sample of gate oxide disappearance or defect described in preparation process 3 also accurately detects gate oxide disappearance or the position of defect by Electronic Speculum.
2. as claimed in claim 1 a kind of detect wafer gate oxide disappearance defect method, it is characterized in that, described gate oxide be two-layer or two-layer more than.
3. a kind of method detecting wafer gate oxide disappearance defect as claimed in claim 1, it is characterized in that, the technique of described growth gate oxide is quick thermal treatment process or vertical furnace tube technique.
4. a kind of method detecting wafer gate oxide disappearance defect as claimed in claim 1, it is characterized in that, the thickness range of every one deck of described gate oxide exists
between.
5. a kind of method detecting wafer gate oxide disappearance defect as claimed in claim 1, it is characterized in that, described silicon etching process is dry etch process.
6. a kind of method detecting wafer gate oxide disappearance defect as claimed in claim 5, it is characterized in that, described dry etch process is for using HBr and O
2plasma etching technology.
7. a kind of method detecting wafer gate oxide disappearance defect as claimed in claim 1, it is characterized in that, described silicon etching process is wet-etching technology.
8. a kind of method detecting wafer gate oxide disappearance defect as claimed in claim 7, it is characterized in that, the etching agent that described wet-etching technology adopts is tetramethyl ammonium hydroxide solution, concentration is 2.38% or 25%, etch period scope is between 5-120 second, and etching temperature is room temperature 25 DEG C.
9. a kind of method detecting wafer gate oxide disappearance defect as claimed in claim 8, it is characterized in that, the sample of described gate oxide disappearance or defect accurately controls focused ion beam with ESEM to carry out cutting preparing in the position of gate oxide disappearance or defect.
10. a kind of method detecting wafer gate oxide disappearance defect as claimed in claim 1, is characterized in that, the position of described accurate detection gate oxide disappearance or defect is accurately detected by transmission electron microscope.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201410520762.4A CN104241161A (en) | 2014-09-30 | 2014-09-30 | Method for detecting gate oxide deficiency defects of wafers |
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| CN201410520762.4A CN104241161A (en) | 2014-09-30 | 2014-09-30 | Method for detecting gate oxide deficiency defects of wafers |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104701209A (en) * | 2015-03-30 | 2015-06-10 | 上海华力微电子有限公司 | Gate-oxide layer defect detection method and device failure positioning method |
| CN104733343A (en) * | 2015-03-30 | 2015-06-24 | 上海华力微电子有限公司 | Gate-oxide layer defect detecting method and device electric leakage detection method |
| CN107331633A (en) * | 2017-08-07 | 2017-11-07 | 上海华力微电子有限公司 | A kind of atomic layer oxide deposits needle pore defect detection method |
| CN108091585A (en) * | 2017-12-15 | 2018-05-29 | 德淮半导体有限公司 | The monitoring method of the etching technics of oxide |
| CN111599707A (en) * | 2020-05-27 | 2020-08-28 | 广州粤芯半导体技术有限公司 | Method for detecting micro-cracks of passivation layer |
| CN113745125A (en) * | 2020-05-29 | 2021-12-03 | 中芯国际集成电路制造(上海)有限公司 | Measurement structure and forming method thereof |
| TWI816513B (en) * | 2021-12-27 | 2023-09-21 | 大陸商西安奕斯偉材料科技股份有限公司 | A method and system for measuring wafer surface damage depth |
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| CN102044461A (en) * | 2009-10-20 | 2011-05-04 | 中芯国际集成电路制造(上海)有限公司 | Detection method used for failure analysis of semiconductor device |
| CN102110625A (en) * | 2009-12-24 | 2011-06-29 | 中芯国际集成电路制造(上海)有限公司 | Method for detecting pinhole type growth defect |
| CN103745923A (en) * | 2013-12-30 | 2014-04-23 | 上海新傲科技股份有限公司 | Method for growing gate dielectric on gallium nitride substrate and electrical performance testing method |
-
2014
- 2014-09-30 CN CN201410520762.4A patent/CN104241161A/en active Pending
Patent Citations (5)
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| JPH06260544A (en) * | 1993-03-04 | 1994-09-16 | Kawasaki Steel Corp | Evaluation of quality of oxide film |
| TW381317B (en) * | 1998-08-11 | 2000-02-01 | Taiwan Semiconductor Mfg | Detection method for abnormal via holes |
| CN102044461A (en) * | 2009-10-20 | 2011-05-04 | 中芯国际集成电路制造(上海)有限公司 | Detection method used for failure analysis of semiconductor device |
| CN102110625A (en) * | 2009-12-24 | 2011-06-29 | 中芯国际集成电路制造(上海)有限公司 | Method for detecting pinhole type growth defect |
| CN103745923A (en) * | 2013-12-30 | 2014-04-23 | 上海新傲科技股份有限公司 | Method for growing gate dielectric on gallium nitride substrate and electrical performance testing method |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104701209A (en) * | 2015-03-30 | 2015-06-10 | 上海华力微电子有限公司 | Gate-oxide layer defect detection method and device failure positioning method |
| CN104733343A (en) * | 2015-03-30 | 2015-06-24 | 上海华力微电子有限公司 | Gate-oxide layer defect detecting method and device electric leakage detection method |
| CN107331633A (en) * | 2017-08-07 | 2017-11-07 | 上海华力微电子有限公司 | A kind of atomic layer oxide deposits needle pore defect detection method |
| CN108091585A (en) * | 2017-12-15 | 2018-05-29 | 德淮半导体有限公司 | The monitoring method of the etching technics of oxide |
| CN111599707A (en) * | 2020-05-27 | 2020-08-28 | 广州粤芯半导体技术有限公司 | Method for detecting micro-cracks of passivation layer |
| CN113745125A (en) * | 2020-05-29 | 2021-12-03 | 中芯国际集成电路制造(上海)有限公司 | Measurement structure and forming method thereof |
| CN113745125B (en) * | 2020-05-29 | 2024-03-08 | 中芯国际集成电路制造(上海)有限公司 | Measuring structure and forming method thereof |
| TWI816513B (en) * | 2021-12-27 | 2023-09-21 | 大陸商西安奕斯偉材料科技股份有限公司 | A method and system for measuring wafer surface damage depth |
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