CN104217766A - System for testing resistance change memory array - Google Patents
System for testing resistance change memory array Download PDFInfo
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- CN104217766A CN104217766A CN201310218444.8A CN201310218444A CN104217766A CN 104217766 A CN104217766 A CN 104217766A CN 201310218444 A CN201310218444 A CN 201310218444A CN 104217766 A CN104217766 A CN 104217766A
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Abstract
The invention discloses a system for testing a resistance change memory array, and the system comprises a probe station, used for carrying the to-be-tested resistance change memory array; a probe card, used to implement the good connection between a hardware address circuit and the to-be-tested resistance change memory array; a hardware address selection circuit, used to complete the address decoding and gating work of a specified port of the to-be-tested resistance change memory array; a constant voltage source meter, used to provide DC voltage to the hardware address selection circuit; a measuring source meter, used to provide operating voltage needed by device testing; and a control host, used to control the different types of test operation of the whole system and to complete the output and the statistical analysis of the data of test results. Aiming at the problem that the performance of the resistance change memory array with a special structure cannot be assessed, the system utilizes the existing experiment equipment, low cost testing and evaluation of the performance of a device can be realized, and the system provides a thought and method for test and detection of subsequent a train of array structure devices.
Description
Technical field
The present invention relates to the semiconductor test technical field in microelectronics, especially a kind of system that the novel resistance-variable storing device array had as CrossBar, 1T1R structure is tested.
Background technology
The arriving in massive store epoch, makes memory technology become the main drive of semiconductor technology progress and the global semi-conductor market in left and right.Semiconductor memory product also has irreplaceable status in China, occupies the maximum capture of whole integrated circuit industry.
Resistance-variable storing device will have very large development space as a kind of storer of non-charge-storage mechanism that adopts below 32nm process node, the resistance-variable storing device array that design meets large-scale production and application demand then seems very crucial, and how to carry out testing for resistance-variable storing device array is also the problem needing constantly research and explore simultaneously.
The array test machine now commercially carrying out testing for resistance-variable storing device array is expensive, and there is no the special integrated test facility with the novel resistance-variable storing device array of special construction for development, the technical problem underlying faced has: how to meet novel memory technology from material, device to the demand of the multifunctional integrated test of array; How design software to be embedded in system the automatic conversion etc. of automatic addressing and the array test pattern completing storage unit in storage array in software and hardware controls.
Therefore, need for resistance-variable storing device array, set up a set of effective test and measuring method, to ensure to carry out reliably performance evaluation and assessment to it.
Summary of the invention
(1) technical matters that will solve
The present invention, in order to meet the demand of above-mentioned memory array devices test, particularly discloses a kind of system of testing resistance-variable storing device array, particularly about the system of testing the resistance-variable storing device array with special construction.
(2) technical scheme
For achieving the above object, the invention provides a kind of system of testing resistance-variable storing device array, this system comprises: probe station, for carrying resistance-variable storing device array to be measured; Probe, is connected with the good of resistance-variable storing device array to be measured for realizing hardware address circuit; Hardware address selection circuit, for completing address decoding and the gating work of resistance-variable storing device array designated port to be measured; Constant pressure source table, for providing DC voltage to hardware address selection circuit; Measurement source is shown, for providing the operating voltage of device detection; And main control system, carry out dissimilar test operation for controlling whole system, and complete output and the statistical study of test result data.
In such scheme, described probe station inside has wafer-supporting platform, and outside supporting have vacuum pump, CCD camera and probe station controller, and wherein, wafer-supporting platform is for carrying resistance-variable storing device array to be measured; Vacuum pump contacts the good adsorption of resistance-variable storing device array to be measured for realizing; CCD camera is used for the image information of probe and resistance-variable storing device array contact to be measured to pass to main control system, conveniently positions resistance-variable storing device array to be measured and adjusts; Probe station controller is for realizing movement and the fine setting of probe station inside wafer-supporting platform being carried out to X, Y and Z-direction.The positioning precision of described wafer-supporting platform is less than 2.5 μm.
In such scheme, described probe meets the electric leakage requirement of the 10nA level in test process.
In such scheme, described hardware address selection circuit is the array structure with multiple lines and multiple rows address, can carry out gating and operation to designated port.
In such scheme, the DC voltage that described constant pressure source table provides to hardware address selection circuit is ± 6V to ± 25V within DC voltage, simultaneously for preventing electric current excessive, can current-limiting protection be carried out.
In such scheme, described measurement source table, while providing the operating voltage required for device detection, is also measured the electric current by resistance-variable storing device array itself, is carried out electricity I-V characteristic test, and can carry out current-limiting protection.
In such scheme, the software that described main control system utilizes it to install writes control program voluntarily, realize control survey source table output voltage, measurement electric current, output current, measuring voltage, control survey source table output logic low and high level, and control whole system and carry out dissimilar test operation, complete output and the statistical study of test result data simultaneously.
(3) beneficial effect
As can be seen from technique scheme, the present invention has following beneficial outcomes:
1, the system that resistance-variable storing device array is tested provided by the invention, when performance for the novel resistance-variable storing device array with special construction (as CrossBar, 1T1R structure) cannot be assessed, utilize existing experimental facilities, in conjunction with peripheral circuit and the software of design, successfully achieve test and the assessment of novel resistance-variable storing device array device performance.
2, purchase external professional array test machine under prevailing conditions, not only price and costliness thereof, and it is specifically applied in exploitation, the cycle is longer; And the system that resistance-variable storing device array is tested provided by the invention, then meet the test request of novel storage array well.
3, the system that resistance-variable storing device array is tested provided by the invention, electrical performance testing and assessment can be carried out, as the I-V characteristic, Id-Vd characteristic, Id-Vg characteristic, resistance state variation characteristic etc. of device for the novel memory array devices of special construction (as CrossBar, 1T1R structure).
4, system of testing resistance-variable storing device array provided by the invention is also that test and the detection of other array structure device follow-up provides a kind of thinking and countermeasure.
Accompanying drawing explanation
Fig. 1 is the structural representation to the system that resistance-variable storing device array is tested provided by the invention;
Fig. 2 is the workflow diagram of system shown in Figure 1;
Fig. 3 is the schematic diagram of the probe according to the embodiment of the present invention;
Fig. 4 is the schematic diagram of the hardware address selection circuit according to the embodiment of the present invention;
Fig. 5 is the software control interface figure according to the embodiment of the present invention;
Fig. 6 is the bitsmap distribution plan of the 1kb RRAM array high-resistance resistors value according to the embodiment of the present invention;
Fig. 7 is the representative ' I ' according to the embodiment of the present invention, ' M ', the binary code distribution of ' E ' character;
Fig. 8 is the write ' I ' according to the embodiment of the present invention, ' M ', the result read after the binary code of ' E ' character.
Embodiment
For making the object, technical solutions and advantages of the present invention clearly understand, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.
The system that resistance-variable storing device array is tested provided by the invention, by design software control inerface, hardware address selection circuit and probe, measure on the basis of source table in software control, collaborative hardware address selection circuit, Integrated Probe is stuck in probe station, complete whole test process, thus reach the Performance Evaluation to memory array.
As shown in Figure 1, Fig. 1 is the structural representation to the system that resistance-variable storing device array is tested provided by the invention, this system comprises semi-automatic probe station (supporting have vacuum pump, CCD camera and probe station controller), probe, hardware address selection circuit, constant pressure source table, measures source table and main control system, wherein: probe station, for carrying resistance-variable storing device array to be measured; Probe, is connected with the good of resistance-variable storing device array to be measured for realizing hardware address circuit; Hardware address selection circuit, for completing address decoding and the gating work of resistance-variable storing device array designated port to be measured; Constant pressure source table, for providing DC voltage to hardware address selection circuit; Measurement source is shown, for providing the operating voltage of device detection; And main control system, carry out dissimilar test operation for controlling whole system, and complete output and the statistical study of test result data.
Probe station inside has wafer-supporting platform, and outside supporting have vacuum pump, CCD camera and probe station controller, and wherein, wafer-supporting platform is for carrying resistance-variable storing device array to be measured; Vacuum pump contacts the good adsorption of resistance-variable storing device array to be measured for realizing; CCD camera is used for the image information of probe and resistance-variable storing device array contact to be measured to pass to main control system, conveniently positions resistance-variable storing device array to be measured and adjusts; Probe station controller is for realizing movement and the fine setting of probe station inside wafer-supporting platform being carried out to X, Y and Z-direction.The positioning precision of wafer-supporting platform is less than 2.5 μm.Probe meets the electric leakage requirement of the 10nA level in test process.Hardware address selection circuit is the array structure with multiple lines and multiple rows address, can carry out gating and operation to designated port.The DC voltage that constant pressure source table provides to hardware address selection circuit is ± 6V to ± 25V within DC voltage, simultaneously for preventing electric current excessive, can current-limiting protection be carried out.Measurement source table, while providing the operating voltage required for device detection, is also measured the electric current by resistance-variable storing device array itself, is carried out electricity I-V characteristic test, and can carry out current-limiting protection.The software that main control system utilizes it to install writes control program voluntarily, realize control survey source table output voltage, measurement electric current, output current, measuring voltage, control survey source table output logic low and high level, and control whole system and carry out dissimilar test operation, complete output and the statistical study of test result data simultaneously.
Based on the structural representation to the system that resistance-variable storing device array is tested shown in Fig. 1, Fig. 2 shows the workflow diagram of system shown in Figure 1.First, place the wafer-supporting platform of resistance-variable storing device array to be measured to probe station inside, level need be kept, open vacuum pump absorbing elements, keep wafer-supporting platform and device good contact and do not move everywhere, secondly front and back or left and right directions move wafer-supporting platform plane, until make resistance-variable storing device array to be measured and probe good contact, then the external voltage needed for the work of hardware address selection circuit is provided by constant pressure source table, again open testing software interface and the parameter of configuration needs, the selection of address is completed by host computer control hardware address selection circuit, control test instrumentation and complete test job, final realization is to the assessment of storage array performance.
In one embodiment of the invention, the maximum sample that probe station can be placed is of a size of 8 inches, and the positioning precision of wafer-supporting platform is less than 2.5 μm, can the various probe of integrated customization.Vacuum pump, CCD camera and probe station controller are the equipment of partner probe platform, and probe station controller is to ensure that in test process, array device is stablized and good contact.Probe as shown in Figure 3, can meet the contact of different size, different structure array device, the probe that also can satisfy condition according to the structural design of device.Hardware address selection circuit as shown in Figure 4, can complete address decoding and the gating work of array device designated port; Device itself is the array structure with multiple lines and multiple rows address, needs to carry out gating and Performance Evaluation to designated port.Constant pressure source table can provide ± 6V to hardware address selection circuit in system, and any DC voltage within ± 25V prevents electric current excessive simultaneously, has current-limiting protection function.Measurement source table, while providing device detection to need operating voltage, can be measured the electric current by device itself, carry out electricity I-V characteristic test, and have current-limiting function.Testing software interface as shown in Figure 5, can be shown output voltage in control survey source, measure electric current; Output current, measuring voltage; Control survey source table output logic low and high level; Control whole system and complete dissimilar operation, complete output and the statistical study of test result data simultaneously, ensure that test and the Performance Evaluation of whole resistance-variable storing device array.
In another embodiment of the present invention, utilize the system that resistance-variable storing device array is tested provided by the invention, when 1kb resistance-variable storing device (RRAM) array is operated, specific as follows:
Read operation is carried out to the initial resistance of 1kb storage array, and the value read is exported, resistance value is greater than 1M Ω and is defined as high value, be less than 100k Ω and be defined as low resistance, Fig. 6 is the bitsmap figure of 32 × 32 RRAM unit initial resistance distributions, can find out, now all in array unit are all high value, i.e. ' 0 ' state.
Write operation is carried out to 1kb storage array, to write ' I ', ' M ', ' E ' character is example, and wherein ' I ' is by ' 01001001 ', and ' M ' is by ' 01001101 ', ' E ' is by ' 01000101 ' eight-digit binary number code representative, specify a certain row in 1kb array in a program, carry out data write operation, pre-write input as shown in Figure 7.
After having write, the assigned address operated in pair array is capable carries out read operation, read the resistance of unit, output data processed, unit resistance state being greater than 106ohm is designated as Huang, be less than being designated as of 106ohm red, result is as shown below, representative ' I ', ' M ', the binary code of ' E ' character is written correctly into, as shown in Figure 8.
Above-described specific embodiment; object of the present invention, technical scheme and beneficial effect are further described; be understood that; the foregoing is only specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any amendment made, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (8)
1. to the system that resistance-variable storing device array is tested, it is characterized in that, this system comprises:
Probe station, for carrying resistance-variable storing device array to be measured;
Probe, is connected with the good of resistance-variable storing device array to be measured for realizing hardware address circuit;
Hardware address selection circuit, for completing address decoding and the gating work of resistance-variable storing device array designated port to be measured;
Constant pressure source table, for providing DC voltage to hardware address selection circuit;
Measurement source is shown, for providing the operating voltage of device detection; And
Main control system, carries out dissimilar test operation for controlling whole system, and completes output and the statistical study of test result data.
2. the system that resistance-variable storing device array is tested according to claim 1, it is characterized in that, described probe station inside has wafer-supporting platform, and outside supporting have vacuum pump, CCD camera and probe station controller, wherein, wafer-supporting platform is for carrying resistance-variable storing device array to be measured; Vacuum pump contacts the good adsorption of resistance-variable storing device array to be measured for realizing; CCD camera is used for the image information of probe and resistance-variable storing device array contact to be measured to pass to main control system, conveniently positions resistance-variable storing device array to be measured and adjusts; Probe station controller is for realizing movement and the fine setting of probe station inside wafer-supporting platform being carried out to X, Y and Z-direction.
3. system of testing resistance-variable storing device array according to claim 2, is characterized in that, the positioning precision of described wafer-supporting platform is less than 2.5 μm.
4. system of testing resistance-variable storing device array according to claim 1, is characterized in that, described probe meets the electric leakage requirement of the 10nA level in test process.
5. system of testing resistance-variable storing device array according to claim 1, is characterized in that, described hardware address selection circuit is the array structure with multiple lines and multiple rows address, can carry out gating and operation to designated port.
6. the system that resistance-variable storing device array is tested according to claim 1; it is characterized in that; the DC voltage that described constant pressure source table provides to hardware address selection circuit is ± 6V to ± 25V within DC voltage, simultaneously for preventing electric current excessive, can current-limiting protection be carried out.
7. the system that resistance-variable storing device array is tested according to claim 1; it is characterized in that; described measurement source table is while providing the operating voltage required for device detection; also measure the electric current by resistance-variable storing device array itself; carry out electricity I-V characteristic test, and can current-limiting protection be carried out.
8. the system that resistance-variable storing device array is tested according to claim 1, it is characterized in that, the software that described main control system utilizes it to install writes control program voluntarily, realize control survey source table output voltage, measurement electric current, output current, measuring voltage, control survey source table output logic low and high level, and control whole system and carry out dissimilar test operation, complete output and the statistical study of test result data simultaneously.
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| CN114264927A (en) * | 2021-12-22 | 2022-04-01 | 中国科学院微电子研究所 | Array device testing device and testing method |
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