CN104217766B - A kind of system tested resistance-variable storing device array - Google Patents
A kind of system tested resistance-variable storing device array Download PDFInfo
- Publication number
- CN104217766B CN104217766B CN201310218444.8A CN201310218444A CN104217766B CN 104217766 B CN104217766 B CN 104217766B CN 201310218444 A CN201310218444 A CN 201310218444A CN 104217766 B CN104217766 B CN 104217766B
- Authority
- CN
- China
- Prior art keywords
- resistance
- storing device
- variable storing
- device array
- array
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Abstract
The invention discloses a kind of system tested resistance-variable storing device array, including：Probe station, for carrying resistance-variable storing device array to be measured；Probe card, for realizing the good connection of hardware address circuit and resistance-variable storing device array to be measured；Hardware address selection circuit, for completing address decoding and the gating work of resistance-variable storing device array designated port to be measured；Constant pressure source table, for providing DC voltage to hardware address selection circuit；Measurement source table, for providing the operating voltage required for device detection；Control main frame, for controlling whole system to carry out different types of test operation, and complete the output and statistical analysis of test result data.The problem of can not being assessed for the performance with special construction resistance-variable storing device array, the present invention utilizes existing experimental facilities, the test and assessment of device performance have not only been achieved at low cost, and it provides a kind of idea and method for the test and detection of follow-up other array structure devices.
Description
Technical field
The present invention relates to the semiconductor test technical field in microelectronics, it is especially a kind of to such as CrossBar,
The system that the new resistance-variable storing device array of 1T1R structures is tested.
Background technology
The arriving in massive store epoch so that memory technology has become the main drive of semiconductor technology progress
And the semi-conductor market in the left and right whole world.Semiconductor memory product also has irreplaceable status in China, occupies whole
The maximum capture of individual integrated circuit industry.
Resistance-variable storing device will have very as a kind of memory using non-charge-storage mechanism below 32nm process nodes
Big development space, and design and meet that the resistance-variable storing device array of large-scale production and application demand then seems extremely crucial, together
When how for resistance-variable storing device array carry out test and need constantly research and explore the problem of.
It is expensive that the array test machine that resistance-variable storing device array is tested is directed to currently on the market, and without special
For the integrated test facility of the new resistance-variable storing device array with special construction of development, the technical problem underlying faced
Have：How to meet new memory technology from the demand of material, the multifunctional integrated test of device to array；How in software and hardware control
Design software is embedded into system in system and completes oneself of the automatic addressing of memory cell and array test pattern in storage array
Turn is changed.
Therefore, it is necessary to be directed to resistance-variable storing device array, a set of effective test and measuring method are established, with guarantee pair
It carries out reliably performance evaluation and assessment.
The content of the invention
（One）Technical problems to be solved
The present invention particularly discloses a kind of to resistance-variable storing device battle array to meet the needs of above-mentioned memory array devices test
The system tested is arranged, especially with regard to the system tested the resistance-variable storing device array with special construction.
（Two）Technical scheme
To reach above-mentioned purpose, the invention provides a kind of system tested resistance-variable storing device array, the system
Including：Probe station, for carrying resistance-variable storing device array to be measured；Probe card, for realizing hardware address circuit and resistive to be measured
The good connection of memory array；Hardware address selection circuit, for completing the ground of resistance-variable storing device array designated port to be measured
Location decodes and gating work；Constant pressure source table, for providing DC voltage to hardware address selection circuit；Measurement source table, for carrying
For the operating voltage required for device detection；And control main frame, for controlling whole system to carry out different types of test behaviour
Make, and complete the output and statistical analysis of test result data.
In such scheme, there is wafer-supporting platform inside the probe station, outside is configured with vavuum pump, CCD camera and probe station
Control machine, wherein, wafer-supporting platform is used to carry resistance-variable storing device array to be measured；Vavuum pump is used to realize to resistance-variable storing device battle array to be measured
The good adsorption contact of row；CCD camera is used to pass to probe card and the image information of resistance-variable storing device array contact to be measured
Control main frame, it is convenient that resistance-variable storing device array to be measured is positioned and adjusted；Probe station control machine is used to realize to probe station
Internal wafer-supporting platform carries out the movement and fine setting of X, Y and Z-direction.The positioning precision of the wafer-supporting platform is less than 2.5 μm.
In such scheme, the probe card meets the electric leakage requirement of the 10nA levels in test process.
In such scheme, the hardware address selection circuit is the array structure for having multiple lines and multiple rows address, can be to referring to
Fixed end mouth is gated and operated.
In such scheme, the DC voltage that the constant pressure source table provides to hardware address selection circuit is ± 6V to ± 25V
Within DC voltage, while for preventing that electric current is excessive, current-limiting protection can be carried out.
In such scheme, for the measurement source table while operating voltage required for providing device detection, also measurement is logical
The electric current of resistance-variable storing device array in itself is crossed, carries out electricity I-V characteristic test, and current-limiting protection can be carried out.
In such scheme, the control main frame voluntarily writes control program using its software installed, and realizes control measurement
Source table output voltage, measurement electric current, output current, measurement voltage, control measurement source table output logic low and high level, and control whole
Individual system carries out different types of test operation, while completes the output and statistical analysis of test result data.
（Three）Beneficial effect
It can be seen from the above technical proposal that the present invention has following beneficial outcomes：
1st, the system provided by the invention tested resistance-variable storing device array, for special construction（Such as
CrossBar, 1T1R structure）New resistance-variable storing device array performance can not assess in the case of, using it is existing experiment set
It is standby, with reference to the peripheral circuit and software of design, successfully realize new resistance-variable storing device array device performance test and
Assess.
2nd, the professional array test machine of foreign countries is purchased under prevailing conditions, not only price and its costliness, and it is special developing it
In fixed application, the cycle is longer；And the system provided by the invention tested resistance-variable storing device array, then meet well
The test request of new storage array.
3rd, the system provided by the invention tested resistance-variable storing device array, special construction can be directed to（Such as
CrossBar, 1T1R structure）New memory array devices carry out electrical performance testing and assessment, I-V characteristic such as device,
Id-Vd characteristics, Id-Vg characteristics, resistance state variation characteristic etc..
4th, the system provided by the invention tested resistance-variable storing device array, also it is follow-up other array structure devices
Test and detection provide a kind of idea and method.
Brief description of the drawings
Fig. 1 is the structural representation of the system provided by the invention tested resistance-variable storing device array；
Fig. 2 is the workflow diagram of system shown in Figure 1；
Fig. 3 is the schematic diagram of the probe card according to the embodiment of the present invention；
Fig. 4 is the schematic diagram of the hardware address selection circuit according to the embodiment of the present invention；
Fig. 5 is the software control interface figure according to the embodiment of the present invention；
Fig. 6 is the bitsmap distribution maps of the 1kb RRAM array high-resistance resistors values according to the embodiment of the present invention；
Fig. 7 is the representative ' I ' according to the embodiment of the present invention, ' M ', the binary code distribution of ' E ' character；
Fig. 8 is the write-in ' I ' according to the embodiment of the present invention, ' M ', the result read after the binary code of ' E ' character.
Embodiment
For the object, technical solutions and advantages of the present invention are more clearly understood, below in conjunction with specific embodiment, and reference
Accompanying drawing, the present invention is described in more detail.
The system provided by the invention tested resistance-variable storing device array, it is by design software control interface, firmly
Part addressing circuit and probe card, on the basis of the table of software control measurement source, hardware address selection circuit is cooperateed with, integrates and visits
Pin is stuck in probe station, completes whole test process, so as to reach the Performance Evaluation to memory array.
As shown in figure 1, Fig. 1 is the structural representation of the system provided by the invention tested resistance-variable storing device array
Figure, the system include semi-automatic probe station（It is configured with vavuum pump, CCD camera and probe station control machine）, probe card, hardware address
Selection circuit, constant pressure source table, measurement source table and control main frame, wherein：Probe station, for carrying resistance-variable storing device array to be measured；
Probe card, for realizing the good connection of hardware address circuit and resistance-variable storing device array to be measured；Hardware address selection circuit, use
In the address decoding and gating work of completing resistance-variable storing device array designated port to be measured；Constant pressure source table, for hardware address
Selection circuit provides DC voltage；Measurement source table, for providing the operating voltage required for device detection；And control main frame,
For controlling whole system to carry out different types of test operation, and complete the output and statistical analysis of test result data.
There is wafer-supporting platform inside probe station, outside is configured with vavuum pump, CCD camera and probe station control machine, wherein, hold piece
Platform is used to carry resistance-variable storing device array to be measured；Vavuum pump is used to realize to be connect to the good adsorption of resistance-variable storing device array to be measured
Touch；CCD camera is used to the image information of probe card and resistance-variable storing device array contact to be measured passing to control main frame, convenience pair
Resistance-variable storing device array to be measured is positioned and adjusted；Probe station control machine be used for realize to probe station inside wafer-supporting platform carry out X,
Y and Z-direction movement and fine setting.The positioning precision of wafer-supporting platform is less than 2.5 μm.Probe card meets the 10nA levels in test process
Electric leakage requires.Hardware address selection circuit is the array structure for having multiple lines and multiple rows address, and designated port can be gated
And operation.The DC voltage that constant pressure source table provides to hardware address selection circuit is the DC voltage within ± 6V to ± 25V, together
When be used for prevent that electric current is excessive, current-limiting protection can be carried out.Operating voltage of the measurement source table required for device detection is provided
Meanwhile also measurement passes through the electric current of resistance-variable storing device array in itself, electricity I-V characteristic test is carried out, and current limliting guarantor can be carried out
Shield.Control main frame voluntarily writes control program using its software installed, and realizes control measurement source table output voltage, measurement electricity
Stream, output current, measurement voltage, control measurement source table output logic low and high level, and control whole system to carry out different type
Test operation, while complete the output and statistical analysis of test result data.
Based on the structural representation of the system tested resistance-variable storing device array shown in Fig. 1, Fig. 2 shows Fig. 1
The workflow diagram of shown system.First, resistance-variable storing device array to be measured is placed to the wafer-supporting platform inside probe station, need to keep water
It is flat, vavuum pump absorbing elements are opened, wafer-supporting platform and device good contact is kept and does not move around, secondly front and rear or right and left
To mobile wafer-supporting platform plane, until making resistance-variable storing device array to be measured and probe card good contact, then carried by constant pressure source table
For the external voltage needed for the work of hardware address selection circuit, it is again turned on test software interface and configures the parameter of needs, leads to
The selection that host computer control hardware address selection circuit completes address is crossed, control test instrumentation completes test job, final realization pair
The assessment of storage array performance.
In one embodiment of the invention, the maximum sample size that probe station can be placed is 8 inches, the positioning of wafer-supporting platform
Precision is less than 2.5 μm, can integrate the various probe card of customization.Vavuum pump, CCD camera and probe station control machine are partner probes
The equipment of platform, probe station control machine are to ensure array device stabilization and good contact in test process.Probe card such as Fig. 3 institutes
Show, the contact of different sizes, different structure array device can be met, condition can also be met according to the structure design of device
Probe card.Hardware address selection circuit is as shown in figure 4, the address decoding and gating work of array device designated port can be completed
Make；Device is to have the array structure of multiple lines and multiple rows address in itself, it is necessary to be gated to designated port and Performance Evaluation.Constant pressure
Source table can be into system within the offer of hardware address selection circuit ± 6V, ± 25V any DC voltage, while prevent electric current
It is excessive, there is current-limiting protection function.Measurement source table can measure while offer device detection needs operating voltage and pass through device
The electric current of part in itself, electricity I-V characteristic test is carried out, and there is current-limiting function.Test software interface is as shown in figure 5, can control
Measurement source table output voltage processed, measure electric current；Output current, measure voltage；Control measurement source table output logic low and high level；Control
Whole system processed completes different types of operation, while completes the output and statistical analysis of test result data, ensure that whole
The test of resistance-variable storing device array and Performance Evaluation.
In another embodiment of the present invention, it is to what resistance-variable storing device array was tested using provided by the invention
System, to 1kb resistance-variable storing devices（RRAM）It is specific as follows when array is operated：
Read operation is carried out to the initial resistance of 1kb storage arrays, and the value read is exported, resistance value defines more than 1M Ω
For high value, low resistance is defined as less than 100k Ω, Fig. 6 is the bitsmap figures of 32 × 32 RRAM units initial resistance distributions,
As can be seen that now unit all in array is all high value, i.e. ' 0 ' state.
Write operation is carried out to 1kb storage arrays, to write ' I ', ' M ', exemplified by ' E ' character, wherein ' I ' by
' 01001001 ', ' M ' by ' 01001101 ', ' E ' specifies 1kb in a program by ' 01000101 ' eight-digit binary number code representative
A certain row in array, carry out data write operation, and pre-write input is as shown in Figure 7.
After the completion of write-in, read operation is carried out to the specified address line operated in array, reads the resistance of unit, will
Output data is processed, and resistance state is designated as Huang more than 106ohm unit, and red, as a result below figure institute is designated as less than 106ohm
Show, represent ' I ', ' M ', the binary code of ' E ' character is written correctly into, as shown in Figure 8.
Particular embodiments described above, the purpose of the present invention, technical scheme and beneficial effect are carried out further in detail
Describe in detail it is bright, should be understood that the foregoing is only the present invention specific embodiment, be not intended to limit the invention, it is all
Within the spirit and principles in the present invention, any modification, equivalent substitution and improvements done etc., it should be included in the guarantor of the present invention
Within the scope of shield.
Claims (6)
- A kind of 1. system tested resistance-variable storing device array, for the resistance-variable storing device array of 1T1R structures, its feature It is, the system includes：Probe station, for carrying resistance-variable storing device array to be measured；Probe card, for realizing the good connection of hardware address circuit and resistance-variable storing device array to be measured；Hardware address selection circuit, for completing address decoding and the gating work of resistance-variable storing device array designated port to be measured；Constant pressure source table, for providing DC voltage to hardware address selection circuit；Measurement source table, for providing the operating voltage required for device detection；AndControl main frame, for controlling whole system to carry out different types of test operation, and complete the output of test result data And statistical analysis；Wherein, the hardware address selection circuit is the array structure for having multiple lines and multiple rows address, and designated port can be carried out Gating and operation；The DC voltage that the constant pressure source table provides to hardware address selection circuit is the DC voltage within ± 6V to ± 25V, Simultaneously for preventing that electric current is excessive, current-limiting protection can be carried out.
- 2. the system according to claim 1 tested resistance-variable storing device array, it is characterised in that the probe station Inside has wafer-supporting platform, and outside is configured with vavuum pump, CCD camera and probe station control machine, wherein, wafer-supporting platform is to be measured for carrying Resistance-variable storing device array；Vavuum pump is used to realize to be contacted to the good adsorption of resistance-variable storing device array to be measured；CCD camera is used for will Probe card and the image information of resistance-variable storing device array contact to be measured pass to control main frame, convenient to resistance-variable storing device battle array to be measured Row are positioned and adjusted；Probe station control machine be used to realizing movement that X, Y and Z-direction are carried out to probe station inside wafer-supporting platform and Fine setting.
- 3. the system according to claim 2 tested resistance-variable storing device array, it is characterised in that the wafer-supporting platform Positioning precision be less than 2.5 μm.
- 4. the system according to claim 1 tested resistance-variable storing device array, it is characterised in that the probe card Meet the electric leakage requirement of the 10nA levels in test process.
- 5. the system according to claim 1 tested resistance-variable storing device array, it is characterised in that the measurement source For table while the operating voltage required for providing device detection, also measurement passes through the electric current of resistance-variable storing device array in itself, enters Row electricity I-V characteristic is tested, and can carry out current-limiting protection.
- 6. the system according to claim 1 tested resistance-variable storing device array, it is characterised in that the control master Machine voluntarily writes control program using its software installed, and realizes control measurement source table output voltage, measurement electric current, output electricity Stream, measurement voltage, control measurement source table output logic low and high level, and control whole system to carry out different types of test behaviour Make, while complete the output and statistical analysis of test result data.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310218444.8A CN104217766B (en) | 2013-06-04 | 2013-06-04 | A kind of system tested resistance-variable storing device array |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310218444.8A CN104217766B (en) | 2013-06-04 | 2013-06-04 | A kind of system tested resistance-variable storing device array |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104217766A CN104217766A (en) | 2014-12-17 |
| CN104217766B true CN104217766B (en) | 2018-02-06 |
Family
ID=52099160
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310218444.8A Active CN104217766B (en) | 2013-06-04 | 2013-06-04 | A kind of system tested resistance-variable storing device array |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104217766B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114264927A (en) * | 2021-12-22 | 2022-04-01 | 中国科学院微电子研究所 | Array device testing device and testing method |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201440146U (en) * | 2009-08-11 | 2010-04-21 | 中芯国际集成电路制造(上海)有限公司 | Probe card |
| CN101783183A (en) * | 2009-01-21 | 2010-07-21 | 中国科学院微电子研究所 | Current-limiting circuit for testing performance indexes of resistive random access memory (RRAM) |
| CN101783182A (en) * | 2009-01-21 | 2010-07-21 | 中国科学院微电子研究所 | Detection circuit and detection device of resistance changing memory |
| CN103093828A (en) * | 2011-11-04 | 2013-05-08 | 海力士半导体有限公司 | Semiconductor memory apparatus and test circuit thereof |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7893701B2 (en) * | 2008-05-05 | 2011-02-22 | Formfactor, Inc. | Method and apparatus for enhanced probe card architecture |
-
2013
- 2013-06-04 CN CN201310218444.8A patent/CN104217766B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101783183A (en) * | 2009-01-21 | 2010-07-21 | 中国科学院微电子研究所 | Current-limiting circuit for testing performance indexes of resistive random access memory (RRAM) |
| CN101783182A (en) * | 2009-01-21 | 2010-07-21 | 中国科学院微电子研究所 | Detection circuit and detection device of resistance changing memory |
| CN201440146U (en) * | 2009-08-11 | 2010-04-21 | 中芯国际集成电路制造(上海)有限公司 | Probe card |
| CN103093828A (en) * | 2011-11-04 | 2013-05-08 | 海力士半导体有限公司 | Semiconductor memory apparatus and test circuit thereof |
Non-Patent Citations (4)
| Title |
|---|
| 中科院阻变存储器研发与平台建设获进展;微电子;《军民两用技术与产品》;20130331(第2013年第3期);正文第24页 * |
| 微结构材料力学性能的微拉伸系统与测试方法研究;刘瑞;《中国博士学位论文全文数据库(工程科技Ⅰ辑)》;20100115(第2010年第1期);正文第29-38页，第87-99页 * |
| 新型阻变材料制备工艺及其阻变机理研究;朱玮;《中国优秀硕士学位论文全文数据库(信息科技辑)》;20130315(第2013年03期);正文第27-31页，图2.2.41，图2.2.42，图2.2.43，图2.2.44,图2.2.51 * |
| 阻变存储器电气特性与外围接口电路研究;刘刚;《中国优秀硕士学位论文全文数据库(信息科技辑)》;20120315(第2012年03期);正文第47页第1-3段，图 5.12 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104217766A (en) | 2014-12-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103294557B (en) | With the movable and inactive polycaryon processor for performing core | |
| US11200961B1 (en) | Apparatus, system and method to log memory commands and associated addresses of a memory array | |
| CN102354537A (en) | Method and system for testing chip of phase change memory | |
| CN102568522B (en) | The method of testing of hard disk performance and device | |
| TWI537902B (en) | System and method for identifying factory source of display panel and the display panel | |
| CN208385012U (en) | A kind of test device and system | |
| CN109285583A (en) | Nand flash memory solid state hard disk space environment effect test macro and test method | |
| CN106990921B (en) | Method for writing data, memory storage apparatus and memorizer control circuit unit | |
| CN104793080A (en) | Method for testing single event effect of on-chip system | |
| CN109490751A (en) | A kind of EMMC test method and test circuit | |
| CN104217766B (en) | A kind of system tested resistance-variable storing device array | |
| CN103344858A (en) | Method and device for testing meter reading port of intelligent electric meter | |
| US20200411127A1 (en) | Managed-nand real time analyzer and method | |
| CN205302267U (en) | SSD solid state hard drives stability test equipment | |
| CN107203472A (en) | A kind of Application testing system | |
| CN205333842U (en) | Detection apparatus for intelligence measurement detecting element | |
| CN106610862B (en) | Emulator supporting EEPROM power-down test | |
| TWI724742B (en) | Diagnostic system | |
| CN109147860A (en) | Memory storage apparatus and its test method | |
| CN104217767A (en) | Nonvolatile memory testing device and test method thereof | |
| CN206532194U (en) | Embedded type high speed mass memory system | |
| CN102402961B (en) | Self-test driving circuit | |
| CN206524184U (en) | A kind of test equipment of integrated circuit memory | |
| CN103838996B (en) | Computer system and its operating method | |
| CN116259351B (en) | Memory testing method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |