CN104184475A - Analog-to-digital conversion circuit based on variable-resistance device - Google Patents
Analog-to-digital conversion circuit based on variable-resistance device Download PDFInfo
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Abstract
The invention discloses an analog-to-digital conversion circuit based on a variable-resistance device and belongs to the field of semiconductor integrated circuits. The analog-to-digital conversion circuit based on the variable-resistance device comprises a voltage comparison circuit, a state control circuit and a digit reading and outputting circuit, wherein the voltage comparison circuit is formed by connecting the variable-resistance device and a resistor in series and is used for converting input voltage into the high resistance state or the low resistance state of the variable-resistance device, the state control circuit is used for controlling the programming of the voltage comparison circuit, state reading and resetting of the variable-resistance device in a certain time sequence, and the digit reading and outputting circuit is used for reading and outputting a digital signal represented by the high resistance state or the low resistance state of the variable-resistance device in the voltage comparison circuit. The analog-to-digital conversion circuit based on the variable-resistance device is simple in structure, and analog signals can be converted into digital signals rapidly under the low power consumption condition.
Description
Technical field
The invention belongs to semiconductor integrated circuit field, be specifically related to a kind of analog to digital conversion circuit based on resistive device.
Background technology
Along with the digitlization process of the high-technology fields such as the develop rapidly of electronic technology and computer, communication is constantly accelerated, realize analog signal and have very important significance to digital signal conversion.In practical application, be to run into continually varying analog quantity mostly, after the analog signal that analog quantity is converted into the signal of telecommunication through transducer, need become digital signal through analog-to-digital conversion just can be input in digital system and process and control, and analog to digital conversion circuit is as the change-over circuit that analog signal is converted to digital signal output, in the world that becomes a reality, analog signal is led to the bridge of digital signal.
At present, the analog to digital converter that has in the world number of different types, mainly comprise parallel A/D converter, gradual approaching A/D converter, integral analogue-to-digital converter etc., dissimilar analog to digital converter is applicable to different application, analog to digital converter has had marked improvement in properity, technique now, just constantly towards low-power consumption, at a high speed, high-resolution future development, further advanced the develop rapidly of modern digital electronic technology.
On the other hand, resistive device is a kind of novel two-terminal device, owing to having the advantages such as cellular construction is simple, operating rate is fast, low in energy consumption, is subject to extensive favor in memory technology of new generation.The voltage that adds certain amplitude at resistive device two ends, can make device between high-impedance state, two stable resistance states of low resistance state, occur mutually to switch.When if resistive device two ends institute making alive is less than its threshold voltage, device resistance state changes very little even constant.When if resistive device two ends institute making alive is greater than its threshold voltage, device resistance state generation marked change: when applying certain voltage, resistive device changes low resistance state into by high-impedance state, this process is called set (SET); When applying certain voltage, resistive device changes high-impedance state into by low resistance state, and this process is called reset (RESET).Resistive device is mainly divided into monopole type and ambipolar two large classes.Set and the resetting voltage of ambipolar resistive device have opposed polarity, and the set of monopole type resistive device and resetting voltage have identical polar.In general, the resistance state fringe time of the high-impedance state of resistive device and low resistance state can be low to moderate nanosecond order.
Resistive device all has significant advantage at a lot of aspect of performances, is the strong competitor of memory technology of new generation, thereby the analog to digital conversion circuit that how to utilize the advantage of this new device to design a kind of high speed, low-power consumption becomes the focus of present research already.
Summary of the invention
The present invention proposes a kind of analog to digital conversion circuit based on resistive device, this circuit structure is simple, can realize analog signal and under low-power consumption, be converted to fast digital signal.
Technical scheme of the present invention is as follows:
A kind of analog to digital conversion circuit based on resistive device, comprise voltage comparator circuit, state control circuit and read digital output circuit, described voltage comparator circuit is composed in series by resistive device and resistance, described voltage comparator circuit is for being converted to input voltage by the high or low resistance state of resistive device and representing, described state control circuit is for the programming to described voltage comparator circuit according to certain sequencing control, state reads and resistive device reset operation, the described digital output circuit that reads is for reading the digital signal with the high or low resistance state representative of output voltage comparison circuit resistive device.
Different according to the reading manner that reads digital output circuit, can be divided into that voltage reading is got analog to digital conversion circuit and electric current reads analog to digital conversion circuit.
Voltage reading based on resistive device is got analog to digital conversion circuit, comprises that voltage comparator circuit, state control circuit and voltage reading get digital output circuit, and described voltage comparator circuit is for being converted to input voltage by the high or low resistance state of resistive device and characterizing; Described state control circuit is for reading and resistive device reset operation the programming of described voltage comparator circuit, state according to certain sequencing control; Described voltage reading is got digital output circuit for reading the digital signal with the high or low resistance state representative of output voltage comparison circuit resistive device.
Further, described voltage comparator circuit comprises the first divider resistance, the second divider resistance and resistive device M1, the top electrode of described resistive device M1 (TE) is connected with one end of described the first divider resistance, its hearth electrode (BE) is connected with one end of described the second divider resistance, the other end ground connection of the second divider resistance.
Further, described state control circuit comprises sequential control circuit, the first switch S 1, second switch S2, the 3rd switch S 3, the 4th switch S 4, the 5th switch S 5; Described the first switch S 1 connects reset voltage signal V
rESETwith the top electrode (TE) of resistive device M1, described second switch S2 connects input voltage signal V
iNwith the other end of the first divider resistance, voltage V is read in described the 3rd switch S 3 connections
rEADtop electrode (TE) with resistive device M1, described the 4th switch S 4 connects the two ends of the second divider resistance, described the 5th switch S 5 connects the hearth electrode (BE) of resistive device M1 and the input that voltage reading is got digital output circuit, and described sequential control circuit is for generation of the switch of controlling sequencing control the first switch S 1, second switch S2, the 3rd switch S 3, the 4th switch S 4, the 5th switch S 5.
Further, described voltage reading is got the inverter that digital output circuit comprises two series connection.
Further, the on off state of each switch is controlled by sequential control circuit, and in described state control circuit, the first switch S 1 and the 4th switch S 4 are subject to same sequencing control, and the 3rd switch S 3 and the 5th switch S 5 are subject to same sequencing control.
Electric current based on resistive device reads analog to digital conversion circuit, comprises that voltage comparator circuit, state control circuit and electric current read digital output circuit, and described voltage comparator circuit is for being converted to input voltage by the high or low resistance state of resistive device and representing; Described state control circuit is for reading and resistive device reset operation the programming of described voltage comparator circuit, state according to certain sequencing control; Described electric current reads digital output circuit for reading the digital signal with the high or low resistance state representative of output voltage comparison circuit resistive device.
Further, described voltage comparator circuit comprises the first divider resistance, the second divider resistance and resistive device M1, one end of described the first divider resistance is connected with one end of the second divider resistance, and the top electrode of resistive device M1 (TE) is connected with the other end of the second divider resistance.
Further, described electric current reads digital output circuit and comprises a current source and an inverter, and the output of current source is connected with the input of inverter.
Further, described state control circuit comprises sequential control circuit, the first switch S 1, second switch S2, the 3rd switch S 3, the 4th switch S 4, the 5th switch S 5, the 6th switch S 6; Described the first switch S 1 connects reset voltage signal V
rESETwith resistive device M1 top electrode (TE), described second switch S2 connects input signal V
iNwith the other end of the first divider resistance, described the 3rd switch S 3 connects the hearth electrode (BE) of resistive device M1 and the input that electric current reads inverter in digital output circuit, and described the 4th switch S 4 connects the hearth electrode (BE) and ground of resistive device M1; Described the 5th switch S 5 connects hearth electrode (BE) and the ground of resistive device M1, described the 6th switch S 6 connects top electrode (TE) and the ground of resistive device M1, and described sequential control circuit is for generation of the switch of controlling sequencing control the first switch S 1, second switch S2, the 3rd switch S 3, the 4th switch S 4, the 5th switch S 5, the 6th switch S 6.
Further, the on off state of each switch is controlled by sequential control circuit, in described state control circuit, the first switch S 1 and the 5th switch S 5 are subject to same sequencing control, second switch S2 and the 4th switch S 4 are subject to same sequencing control, and the 3rd switch S 3 and the 6th switch S 6 are subject to same sequencing control.
Beneficial effect of the present invention is: the analog to digital conversion circuit based on resistive device provided by the invention can be realized analog signal and under low-power consumption, be converted to fast digital signal, and circuit structure is simple, greatly reduced power consumption and circuit is realized area, reduce circuit cost, there is the feature that is easy to control, be easy to realization and non-volatile storage simultaneously.
Accompanying drawing explanation
Fig. 1 is the voltage reading delivery number conversion circuit unit schematic diagram based on resistive device in the present invention;
Fig. 2 is that in the present invention, the electric current based on resistive device reads analog to digital conversion circuit unit schematic diagram;
Fig. 3 is the circuit theory schematic diagram of sequential control circuit.
Fig. 4 is the voltage reading delivery number conversion circuit theory diagrams based on resistive device of embodiment 1;
Fig. 5 is that the electric current based on resistive device of embodiment 2 reads analog to digital conversion circuit schematic diagram;
Fig. 6 is the oscillogram of timing control signal;
Fig. 7 is that frequency is that 50kHz voltage range is the input sine wave schematic diagram of 1.95～3.55V;
Fig. 8 is the simulation result schematic diagram that the voltage reading based on resistive device of embodiment 1 is got analog to digital conversion circuit;
Fig. 9 is the simulation result schematic diagram that the electric current based on resistive device of embodiment 2 reads analog to digital conversion circuit.
Embodiment
Below according to drawings and embodiments, the present invention is described further.
Fig. 1 is the voltage reading delivery number conversion circuit unit based on resistive device in the present invention, comprises that voltage comparator circuit, state control circuit and voltage reading get digital output circuit.Voltage comparator circuit comprises the first divider resistance R1a, the second divider resistance R1b and resistive device M1, the top electrode of described resistive device M1 (TE) is connected with one end of described the first divider resistance R1a, its hearth electrode (BE) is connected with one end of described the second divider resistance R1b, the other end ground connection of the second divider resistance R1b.State control circuit comprises sequential control circuit, the first switch S 1, second switch S2, the 3rd switch S 3, the 4th switch S 4 and the 5th switch S 5, and described the first switch S 1 connects reset voltage signal V
rESETwith resistive device M1 top electrode (TE); Described second switch S2 connects input voltage signal V
iNthe other end with the first divider resistance; Voltage V is read in described the 3rd switch S 3 connections
rEADtop electrode (TE) with resistive device M1; Described the 4th switch S 4 connects the two ends of the second divider resistance; Described the 5th switch S 5 connects the hearth electrode (BE) of resistive device M1 and the input that voltage reading is got digital output circuit, and described sequential control circuit is for generation of the switch of controlling sequencing control the first switch S 1, second switch S2, the 3rd switch S 3, the 4th switch S 4 and the 5th switch S 5.Voltage reading is got the inverter that digital output circuit comprises two series connection.The on off state of each switch is controlled by sequential control circuit, and wherein, the first switch S 1 and the 4th switch S 4 are subject to same sequencing control, and the 3rd switch S 3 and the 5th switch S 5 are subject to same sequencing control.
The operation principle that the described voltage reading based on resistive device is got analog to digital conversion circuit is: first, by the first switch S 1 and the 4th switch S 4 closures, rest switch turn-offs, V
rESETto resistive device, M1 resets, and making its initial state is high-impedance state; Then, closed by second switch S2, rest switch turn-offs, input signal V
iNact on voltage comparator circuit module, the dividing potential drop V on resistive device M1
m1by V
iN, R1a, R1b with and resistive device self resistance R
m1size determine:
Work as V
m1be greater than the threshold voltage V of resistive device M1
tHtime, M1 resistance reduces, and works as V
m1be less than the threshold voltage V of M1
tHtime, M1 resistance remains unchanged substantially; Finally, by the 3rd switch S 3 and the 5th switch S 5 closures, rest switch turn-offs, if now resistive device M1 is that low resistance state is output as high level, if M1 is high-impedance state, is output as low level.
Fig. 2 is that the electric current based on resistive device in the present invention reads analog to digital conversion circuit unit, comprises that voltage comparator circuit, state control circuit and electric current read digital output circuit.Voltage comparator circuit module comprises the first divider resistance R1a, the second divider resistance R1b and resistive device M1, the top electrode of described resistive device M1 (TE) is connected with one end of described the second divider resistance R1b, and the other end of the second divider resistance R1b is connected with one end of the first divider resistance R1a.State control circuit comprises sequential control circuit, the first switch S 1, second switch S2, the 3rd switch S 3, the 4th switch S 4, the 5th switch S 5, the 6th switch S 6, and described the first switch S 1 connects reset voltage signal V
rESETwith resistive device M1 top electrode (TE); Described second switch S2 connects input signal V
iNthe other end with the first divider resistance R1a; Described the 3rd switch S 3 connects the hearth electrode (BE) of resistive device M1 and the input that electric current reads inverter in digital output circuit; Described the 4th switch S 4 connects the hearth electrode (BE) and ground of resistive device M1; Described the 5th switch S 5 connects hearth electrode (BE) and the ground of resistive device M1; Described the 6th switch S 6 connects top electrode (TE) and the ground of resistive device M1; Described sequential control circuit is for generation of the switch of controlling sequencing control the first switch S 1, second switch S2, the 3rd switch S 3, the 4th switch S 4, the 5th switch S 5 and the 6th switch S 6.Electric current reads digital output circuit and comprises a current source and an inverter, and the output of current source is connected with the input of inverter.
The on off state of each switch is controlled by sequential control circuit, and wherein, the first switch S 1 and the 5th switch S 5 are subject to same sequencing control, and second switch S2 and the 4th switch S 4 are subject to same sequencing control, and the 3rd switch S 3 and the 6th switch S 6 are subject to same sequencing control.
The described electric current based on resistive device reads analog to digital conversion circuit operation principle: first, the first switch S 1 and the 5th switch S 5 closures, rest switch turn-offs, V
rESETto resistive device, M1 resets, and making its initial state is high-impedance state; Then, by second switch S2 and the 4th switch S 4 control inputs signal V
iNproduce analog signal and act on voltage comparator circuit, the voltage V that resistive device M1 two ends obtain
m1by V
iN, R1a,
R1b with and resistive device self resistance R
m1size determine:
Work as V
m1be greater than the threshold voltage V of resistive device M1
tHtime, M1 resistance reduces, and works as V
m1be less than the threshold voltage V of M1
tHtime, M1 resistance remains unchanged substantially; Finally, by the 3rd switch S 3 and the 6th switch S 6 closures, rest switch turn-offs, if now M1 is that low resistance state is output as high level, if M1 is high-impedance state, is output as low level.
The utilization that the present invention is effective and reasonable the transformation of the high low resistance state of resistive device, according to the non-volatile feature of resistive device, by state control circuit, the voltage comparator circuit consisting of divider resistance and resistive device is accurately controlled, thereby realized analog signal, under low-power consumption, be converted to fast the process of digital signal.
For this patent analog-digital conversion circuit as described is carried out to simulating, verifying, used " Huan-Lin Chang; Hsuan-Chih Li; C.W.Liu; et al.; A Parameterized SPICE Macromodel of Resistive Random Access Memory and Circuit Demonstration; 2011 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), pp.163--166, Sept.2011 " in the SPICE model of the resistive device built.In emulation, as shown in Figure 3, circuit comprises the first d type flip flop D1, the second d type flip flop D2, the first AND circuit N1, the second AND circuit N2, the 3rd AND circuit N3, the 4th AND circuit N4, the 5th AND circuit N5 to control timing sequence generating circuit used; The output of input termination the 4th AND circuit N4 of described the first d type flip flop D1, its output Q connects an input of the second AND circuit N2, an input, an input of the 3rd AND circuit N3, an input of an input of the 4th AND circuit N4, the 5th AND circuit N5 of its another output termination the first AND circuit N1; The output of input termination the 5th AND circuit N5 of described the second d type flip flop D2, its output Q connects another input of the first AND circuit N1, another input of the 4th AND circuit N4, another input, another input of the 3rd AND circuit N3, another input of the 5th AND circuit N5 of its another output termination the second AND circuit N2; The pulse control end of described the first d type flip flop D1 and the second d type flip flop D2 all connects clock signal clk.Three not overlapping square-wave signal CLK0 as sequencing control, the schematic diagram of CLK1 and CLK2 and clock signal of system CLK as shown in Figure 6, CLK0 wherein, the cycle of CLK1 and CLK2 is all three times of clock signal of system CLK, and the phase difference between CLK0 and CLK1 and between CLK1 and CLK2 is all 120 degree.
Embodiment 1
The analog-digital commutator that the voltage reading delivery number conversion circuit unit that Fig. 4 serves as reasons based on resistive device is realized, comprises 16 voltage reading delivery number conversion circuit units, and realizing resolution is 4, the analog-digital commutator that the frequency of system clock CLK is 10MHz.
Voltage source V in the present embodiment
rESETfor-2V, V
rEADfor 0.8V, the reset of resistive device (reset) voltage is-1.5V, set (set) process threshold voltage V
tH=1V.Input analog signal V
iNfrequency be that 50kHz voltage range is the sine wave of 1.95～3.55V, resistive device Mi (i=1,2,, 16) and high-impedance state resistance is 10kOhm, low resistance state resistance is 100Ohm, the first divider resistance Ria (i=1,2 ..., 16) and resistance is (i-1) kOhm, the second divider resistance Rib (i=1,2 ..., 16) and resistance is 10kOhm.As input analog signal V
iNafter access voltage comparator circuit, if the voltage V that get at Mi two ends
mi>V
tHtime, Mi becomes low resistance state from initial high-impedance state, if the voltage V that get at Mi two ends
mi<V
tHtime, Mi is still high-impedance state; Work as V
rEADafter place in circuit, if Mi is high-impedance state, output voltage is low level 0, if Mi is low resistance state, voltage almost all drops to Rib above, output high level 1.Because the Ria resistance sizes of each branch road is different, so the resistance state of the resistive device Mi in each branch road also can be different, thereby the size of the binary number of being read after inverter by each branch road can characterize the size of input voltage, realizes analog-to-digital conversion.
Three not overlapping square-wave signal CLK0 as sequencing control, CLK1 and CLK2 and clock signal of system CLK are as shown in Figure 6, CLK0 wherein, the cycle of CLK1 and CLK2 is all three times of clock signal of system CLK, the phase difference between CLK0 and CLK1 and between CLK1 and CLK2 is all 120 degree.CLK0, CLK1 and CLK2 are used for the shutoff of control switch S1, S2, S3, S4 and S5, wherein CLK0 control switch S1 and S4, CLK1 control switch S2, CLK2 control switch S3 and S5.
The lowest order circuit of take below in this analog-digital commutator is example, in conjunction with timing control signal as shown in Figure 6, its course of work is described:
During first clock cycle, CLK0 is high level, and CLK1 and CLK2 are low level, thus the first switch S 1 and the 4th switch S 4 closures, rest switch turn-offs, and the top electrode of resistive device M1 (TE) meets V
rESET, its hearth electrode (BE) connecting to neutral current potential, realizes resistive device M1 and resets, high-impedance state resistance while being initial state.
During second clock cycle, CLK1 is high level, and CLK0 and CLK2 are low level, thus switch S 2 conductings, and rest switch turn-offs, input analog signal V
iNaccess voltage comparator circuit, is the resistive device M1 of high-impedance state and divider resistance R1a, R1b to added analog voltage signal dividing potential drop in module.
During the 3rd clock cycle, CLK2 is high level, switch S 3 and switch S 5 closures, and rest switch turn-offs, and reads voltage V
rEADaccess voltage comparator circuit, the voltage obtaining according to M1 two ends draws the output of two series connection inverters, and high-impedance state output level is 0, and low resistance state output level is 1, has finally realized the conversion of analog signal to digital signal.
Frequency shown in input Fig. 7 is that 50kHz voltage range is the sine wave of 1.95～3.55V, the digital signal producing through analog-to-digital conversion as shown in Figure 8, as can be seen from Figure 8 be output as a stepped sine wave, thereby completed the conversion of analog signal to digital signal.
Embodiment bis-:
The electric current that Fig. 5 serves as reasons based on resistive device reads the analog-digital commutator that analog to digital conversion circuit unit is realized, and comprises that 16 electric currents read analog to digital conversion circuit unit, and realizing resolution is 4, the analog-digital commutator that the frequency of system clock CLK is 5MHz.
Voltage source V in the present embodiment
rESETfor-2V, current source I
rEADi(i=1,2 ..., 16) and be 10uA, the reset of resistive device (reset) voltage is-1.5V, the threshold V T H=1V of set (set) process.The frequency of input analog signal VIN is that 50kHz voltage range is the sine wave of 1.95～3.55V, resistive device Mi (i=1,2,, 16) and high-impedance state resistance RHS is 10kOhm, low resistance state resistance RLS is 100Ohm, the first divider resistance Ria (i=1,2 ..., 16) and resistance is (i-1) kOhm, the second divider resistance Rib (i=1,2 ..., 16) and resistance is 10kOhm.As input analog signal V
iNafter access voltage comparator circuit, if the voltage V that get at Mi two ends
mi>V
tHtime, Mi becomes low resistance state from initial high-impedance state, if the voltage V that get at Mi two ends
mi<V
tHtime, Mi is still high-impedance state; Work as I
rEADiafter place in circuit, if Mi is high-impedance state, output voltage is low level 0, if Mi is low resistance state, voltage almost all drops to Rib above, output high level 1.Because the Ria resistance sizes of each branch road is different, so the resistance state of the resistive device Mi in each branch road also can be different, thereby the binary number size of being read by each branch road can characterize the size of input voltage, thereby realize analog-to-digital conversion after inverter.
Three not overlapping square-wave signal CLK0 as sequencing control, CLK1 and CLK2 and clock signal of system CLK are as shown in Figure 6, CLK0 wherein, the cycle of CLK1 and CLK2 is all three times of clock signal of system CLK, the phase difference between CLK0 and CLK1 and between CLK1 and CLK2 is all 120 degree.CLK0, CLK1 and CLK2 are used for the shutoff of control switch S1, S2, S3, S4, S5 and S6, wherein CLK0 control switch S1 and S5, CLK1 control switch S2 and S4, CLK2 control switch S3 and S6.
The lowest order circuit of take below in this analog-digital commutator is example, in conjunction with timing control signal as shown in Figure 6, its course of work is described:
During first clock cycle, CLK0 is high level, and CLK1 and CLK2 are low level, thus the first switch S 1 and the 5th switch S 5 closures, rest switch turn-offs, and the top electrode of resistive device M1 (TE) meets V
rESET, its hearth electrode (BE) connecting to neutral current potential, realizes resistive device M1 and resets, high-impedance state resistance while being initial state.
During second clock cycle, CLK1 is high level, and CLK0 and CLK2 are low level, thus second switch S2 and the 4th switch S 4 conductings, and rest switch turn-offs, input analog signal V
iNaccess voltage comparator circuit, is the resistive device M1 of high-impedance state and divider resistance R1a, R1b to added analog voltage signal dividing potential drop in module.
During the 3rd clock cycle, CLK2 is high level, switch S 3 and switch S 6 closures, and rest switch turn-offs, reading current I
rEAD1access voltage comparator circuit, the output that draws inverter according to the voltage of M1, high-impedance state output level is 0, low resistance state output level is 1, has finally realized the conversion of analog signal to digital signal.
Frequency shown in input Fig. 7 is that 50kHz voltage range is the sine wave of 1.95～3.55V, the digital signal producing through analog-to-digital conversion as shown in Figure 9, as can be seen from Figure 9 be output as a stepped sine wave, thereby completed the conversion of analog signal to digital signal.
Claims (5)
1. the analog to digital conversion circuit based on resistive device, comprise voltage comparator circuit, state control circuit and read digital output circuit, described voltage comparator circuit is composed in series by resistive device and resistance, described voltage comparator circuit is for being converted to input voltage by the high or low resistance state of resistive device and representing, described state control circuit is for the programming to described voltage comparator circuit according to certain sequencing control, state reads and resistive device reset operation, the described digital output circuit that reads is for reading the digital signal with the high or low resistance state representative of output voltage comparison circuit resistive device.
2. the voltage reading based on resistive device is got analog to digital conversion circuit, comprises that voltage comparator circuit, state control circuit and voltage reading get digital output circuit, and described voltage comparator circuit is for being converted to input voltage by the high or low resistance state of resistive device and characterizing; Described state control circuit is for reading and resistive device reset operation the programming of described voltage comparator circuit, state according to certain sequencing control; Described voltage reading is got digital output circuit for reading the digital signal with the high or low resistance state representative of output voltage comparison circuit resistive device;
Described voltage comparator circuit comprises the first divider resistance, the second divider resistance and resistive device M1, the top electrode of described resistive device M1 is connected with one end of described the first divider resistance, its hearth electrode is connected with one end of described the second divider resistance, the other end ground connection of the second divider resistance;
Described state control circuit comprises sequential control circuit, the first switch S 1, second switch S2, the 3rd switch S 3, the 4th switch S 4, the 5th switch S 5; Described the first switch S 1 connects reset voltage signal V
rESETwith the top electrode of resistive device M1, described second switch S2 connects input voltage signal V
iNwith the other end of the first divider resistance, voltage V is read in described the 3rd switch S 3 connections
rEADtop electrode with resistive device M1, described the 4th switch S 4 connects the two ends of the second divider resistance, described the 5th switch S 5 connects the hearth electrode (BE) of resistive device M1 and the input that voltage reading is got digital output circuit, and described sequential control circuit is for generation of the switch of controlling sequencing control the first switch S 1, second switch S2, the 3rd switch S 3, the 4th switch S 4, the 5th switch S 5;
Described voltage reading is got the inverter that digital output circuit comprises two series connection.
3. the voltage reading based on resistive device according to claim 2 is got analog to digital conversion circuit, it is characterized in that, in described state control circuit, the first switch S 1 and the 4th switch S 4 are subject to same sequencing control, and the 3rd switch S 3 and the 5th switch S 5 are subject to same sequencing control.
4. the electric current based on resistive device reads analog to digital conversion circuit, comprises that voltage comparator circuit, state control circuit and electric current read digital output circuit, and described voltage comparator circuit is for being converted to input voltage by the high or low resistance state of resistive device and representing; Described state control circuit is for reading and resistive device reset operation the programming of described voltage comparator circuit, state according to certain sequencing control; Described electric current reads digital output circuit for reading the digital signal with the high or low resistance state representative of output voltage comparison circuit resistive device;
Described voltage comparator circuit comprises the first divider resistance, the second divider resistance and resistive device M1, and one end of described the first divider resistance is connected with one end of the second divider resistance, and the top electrode of resistive device M1 is connected with the other end of the second divider resistance;
Described electric current reads digital output circuit and comprises a current source and an inverter, and the output of current source is connected with the input of inverter;
Described state control circuit comprises sequential control circuit, the first switch S 1, second switch S2, the 3rd switch S 3, the 4th switch S 4, the 5th switch S 5, the 6th switch S 6; Described the first switch S 1 connects reset voltage signal V
rESETwith resistive device M1 top electrode (TE), described second switch S2 connects input signal V
iNwith the other end of the first divider resistance, described the 3rd switch S 3 connects the hearth electrode (BE) of resistive device M1 and the input that electric current reads inverter in digital output circuit, and described the 4th switch S 4 connects the hearth electrode (BE) and ground of resistive device M1; Described the 5th switch S 5 connects hearth electrode (BE) and the ground of resistive device M1, described the 6th switch S 6 connects top electrode (TE) and the ground of resistive device M1, and described sequential control circuit is for generation of the switch of controlling sequencing control the first switch S 1, second switch S2, the 3rd switch S 3, the 4th switch S 4, the 5th switch S 5, the 6th switch S 6.
5. the electric current based on resistive device according to claim 4 reads analog to digital conversion circuit, it is characterized in that, in described state control circuit, the first switch S 1 and the 5th switch S 5 are subject to same sequencing control, second switch S2 and the 4th switch S 4 are subject to same sequencing control, and the 3rd switch S 3 and the 6th switch S 6 are subject to same sequencing control.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410427731.4A CN104184475A (en) | 2014-08-27 | 2014-08-27 | Analog-to-digital conversion circuit based on variable-resistance device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112017715A (en) * | 2020-08-24 | 2020-12-01 | 厦门半导体工业技术研发有限公司 | Resistive random access memory and protection circuit thereof |
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| CN103166641A (en) * | 2013-03-26 | 2013-06-19 | 电子科技大学 | Analog-digital conversion circuit |
| CN103281082A (en) * | 2013-06-14 | 2013-09-04 | 电子科技大学 | Analog-digital conversion circuit based on memristor |
| CN103281045A (en) * | 2013-06-03 | 2013-09-04 | 电子科技大学 | Low-pass filter, high-pass filter, band-pass filter and band rejection filter based on memory resistors |
| CN103312331A (en) * | 2013-05-30 | 2013-09-18 | 电子科技大学 | Analog-digital converter based on memristor |
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| CN103166641A (en) * | 2013-03-26 | 2013-06-19 | 电子科技大学 | Analog-digital conversion circuit |
| CN103312331A (en) * | 2013-05-30 | 2013-09-18 | 电子科技大学 | Analog-digital converter based on memristor |
| CN103281045A (en) * | 2013-06-03 | 2013-09-04 | 电子科技大学 | Low-pass filter, high-pass filter, band-pass filter and band rejection filter based on memory resistors |
| CN103281082A (en) * | 2013-06-14 | 2013-09-04 | 电子科技大学 | Analog-digital conversion circuit based on memristor |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112017715A (en) * | 2020-08-24 | 2020-12-01 | 厦门半导体工业技术研发有限公司 | Resistive random access memory and protection circuit thereof |
| CN112017715B (en) * | 2020-08-24 | 2022-12-06 | 厦门半导体工业技术研发有限公司 | Resistive random access memory and protection circuit thereof |
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