CN104182576A - Design method for reducing crosstalk influence between high-speed differential pairs - Google Patents

Design method for reducing crosstalk influence between high-speed differential pairs Download PDF

Info

Publication number
CN104182576A
CN104182576A CN201410410813.8A CN201410410813A CN104182576A CN 104182576 A CN104182576 A CN 104182576A CN 201410410813 A CN201410410813 A CN 201410410813A CN 104182576 A CN104182576 A CN 104182576A
Authority
CN
China
Prior art keywords
differential
cabling
coupling capacitance
polarity
speed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201410410813.8A
Other languages
Chinese (zh)
Other versions
CN104182576B (en
Inventor
武宁
吴福宽
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Inspur Electronic Information Industry Co Ltd
Original Assignee
Inspur Electronic Information Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Inspur Electronic Information Industry Co Ltd filed Critical Inspur Electronic Information Industry Co Ltd
Priority to CN201410410813.8A priority Critical patent/CN104182576B/en
Publication of CN104182576A publication Critical patent/CN104182576A/en
Application granted granted Critical
Publication of CN104182576B publication Critical patent/CN104182576B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Abstract

The invention discloses a design method for reducing crosstalk influence between high-speed differential pairs. Polarity of the parts, in front and rear of DC (direct current) coupling capacitors, of differential pair lines is reversed; crosstalk positive and negative amplitude noises of far ends are mutually stacked; differential overall noise is weakened. Theoretical analysis and simulation verification show that the design method has the effect of improving crosstalk quality of high-speed signals on high-density layout PCBs (printed circuit boards); by the use of the design method, development cost of products can be lowered, product quality is stable, and the products are more competitive in the market.

Description

A kind of reduce high-speed-differential between the method for designing of cross talk effects
Technical field
The present invention relates to PCB design field, be specifically related to a kind of reduce high-speed-differential between the method for designing of cross talk effects.
Background technology
Server product PCB design at present is just trending towards signal two-forty, wiring high density future development.So design can improving product performance, reduces production cost, thereby strengthens the competitive power of product on market.Then, it has also brought the increase of design difficulty, as being reduction cost of products, can reduce the stack-design number of plies, so significantly increase high-speed wire-layout difficulty, the minimizing in space between differential pair, by the coupling increasing between differential pair, thus the increase that brings crosstalk strength.Meanwhile, due to the lifting of signal speed, mean shortening of signal elevating time, the shortening of the saturated coupling length of crosstalking, high speed signal is through shorter coupling track lengths, and crosstalk noise amplitude just reaches maximal value.Therefore, the lifting of signal speed, the increase of layout high-speed wire-layout density, can make between signal the impact of crosstalk effect more remarkable, thereby has influence on the stability of product quality.
When PCB mainboard layout connects up, due to the stray inductance existing in signal propagation path and capacity effect, therefore, signal is uploaded sowing time in a PCB Trace path, will inevitably be by stray inductance and the electric capacity of coupling, propagate into other Trace that are adjacent upper, and above produce voltage noise at near-end (near end) and the far-end (far end) of its Victim Trace, thereby introduce, crosstalk.
When on mainboard PCB, high-speed line layout connects up conventionally, all to be undertaken by topological mode as shown in Figure 1, differential pair polarity is contrary, be the negative wire (negative of differential pair Pair1, abbreviation N) and the main track (Positive of difference Pair2, abbreviation P) adjacent, between other differential pairs, adjacent situation is also like this.
Therefore, for above-mentioned difference cabling mode, carry out theoretical analysis and by this cabling mode analogue simulation of crosstalking, find that far-end cross talk noise amplitude is positive dirction: the positive pulse on interfering line (Aggressor line) is being disturbed the upper negative pulse that produces of line (Victim line), negative pulse on interfering line (Aggressor line) is being disturbed the upper positive pulse that produces of line (Victim line), two superimposed pulses, on Victim line, form positive differential noise, as shown in Figure 2, be that differential pair polarity is contrary, the positive noise of difference.
By changing the polarity of difference Aggressor and Victim Pair, make poor line identical to polarity, as shown in Figure 3, differential cross-talk is negative noise.
From above-mentioned analysis, can obtain following result:
1), when differential pair polarity is contrary, far-end differential noise is positive amplitude.
2), when differential pair polarity is identical, far-end differential noise is negative amplitude.
Summary of the invention
The technical problem to be solved in the present invention is: provide a kind of reduce high-speed-differential between the method for designing of cross talk effects.
The technical solution adopted in the present invention is:
A kind of reduce high-speed-differential between the method for designing of cross talk effects, by changing the putting position of the middle DC coupling capacitance of differential pair, make the cabling reversal of poles before and after DC electric capacity of differential pair cabling, from polarity phase reversal, become polarity identical, or be that polarity is contrary by polarity same transition, thereby make the mutual lamination of the positive and negative amplitude noise of far-end cross talk, weaken difference overall noise energy.
Due to when differential pair polarity is contrary, far-end differential noise is positive amplitude, when differential pair polarity is identical, far-end differential noise is negative amplitude, article one, differential lines, by the putting position to middle DC coupling capacitance, makes the cabling reversal of poles before and after DC electric capacity of differential pair cabling, the positive amplitude noise of two sections of generations and negative amplitude noise counteractings that mutually superpose, thereby weakening difference overall noise energy
Some differential lines distributed, before and after the differential lines that before and after DC coupling capacitance, cabling polarity is identical and DC coupling capacitance, the opposite polarity differential lines of cabling is spaced.Can guarantee like this reversal of poles of adjacent differential lines to the two sections of cablings in front and back, reduce and disturb.
While connecting up on pcb board, for the differential lines of a pair of level trend, wherein the DC coupling capacitance of one group of cabling vertically arranges, and the DC coupling capacitance of another group cabling is vertically arranged on the both sides of right section of this group cabling.Like this, the cabling that coupling capacitance is left section after coupling capacitance, upper-lower position exchange, thus changed the polarity of right section of coupling capacitance.
Beneficial effect of the present invention is: by theoretical analysis and simulating, verifying, a kind of method for designing that can effectively improve high speed signal cross-talk qualities on high-density wiring pcb board of the present invention, the application of the method can impel the reduction of product development cost, stablizing of product quality, thus the competitive power of product on market improved.
Accompanying drawing explanation
Fig. 1 is PCB high speed layout Route topology mode schematic diagram;
Fig. 2 is that the differential noise of differential pair polarity when contrary forms schematic diagram;
Fig. 3 is that the differential noise of differential pair polarity when identical forms schematic diagram;
Fig. 4 is the topological diagram that electric capacity change in location of the present invention causes differential pair reversing, in double dot dash line frame, is the polarity of adjacent lines;
Fig. 5 is the wiring diagram of PCB of the present invention, in double dot dash line frame, is wherein one group of DC coupling capacitance.
Embodiment
With reference to the accompanying drawings, by embodiment, the present invention is further described:
As shown in Figure 4, a kind of reduce high-speed-differential between the method for designing of cross talk effects, by changing the putting position of the middle DC coupling capacitance of differential pair, make the cabling reversal of poles before and after DC coupling capacitance of differential pair cabling, from polarity phase reversal, become polarity identical, thereby make the mutual lamination of the positive and negative amplitude noise of far-end cross talk, weaken difference overall noise energy.
Some differential lines distributed, before and after the differential lines that before and after DC coupling capacitance, cabling polarity is identical and DC coupling capacitance, the opposite polarity differential lines of cabling is spaced.
As shown in Figure 5, on pcb board, for the differential lines of a pair of level trend, wherein the DC coupling capacitance of one group of cabling vertically arranges, and the DC coupling capacitance of another group cabling is vertically arranged on the both sides of right section of this group cabling.Like this, the cabling that coupling capacitance is left section after coupling capacitance, upper-lower position exchange, thus changed the polarity of right section of coupling capacitance.
The putting position that changes electric capacity, is in order to change the polarity of difference cabling, to reach far-end cross talk, suppresses ability.And whether this mode can also exert an influence to insertion loss (insertion loss), cause the increase of signal transmission attenuation.After if electric capacity position changes, insertion loss increases severely and talks about, and that improving design is by nonsensical.Therefore, before changing for electric capacity position, latter two difference cabling mode carries out frequency insertion loss emulation, by known to two kinds of situations (electric capacity is original while putting, when electric capacity position changes) insertion loss waveform situation contrast: the change of electric capacity position on the loss on high speed signal travel path without impact.
Meanwhile, the far-end cross talk noise in two kinds of situations of electric capacity putting position (original capacitance position, electric capacity position changes) is carried out to emulation, the noise amplitude after electric capacity position changes reduces greatly.
Visible by above-mentioned insertion loss and the contrast of far-end cross talk noise Simulation, by changing the putting position of electric capacity, thereby change the polarity of difference cabling wiring, its far-end noise is suppressed.This kind of design can effectively be improved signal quality when high density cabling interconnects.

Claims (3)

  1. One kind reduce high-speed-differential between the method for designing of cross talk effects, it is characterized in that: by changing the putting position of the middle DC coupling capacitance of differential pair, make the cabling reversal of poles before and after DC coupling capacitance of differential pair cabling, thereby make the mutual lamination of the positive and negative amplitude noise of far-end cross talk, weaken difference overall noise energy.
  2. According to claim 1 a kind of reduce high-speed-differential between the method for designing of cross talk effects, it is characterized in that: some differential lines distributed, before and after the differential lines that before and after DC coupling capacitance, cabling polarity is identical and DC coupling capacitance, the opposite polarity differential lines of cabling is spaced.
  3. According to claim 1 and 2 a kind of reduce high-speed-differential between the method for designing of cross talk effects, it is characterized in that: the putting position of described DC coupling capacitance, on pcb board, differential lines for a pair of level trend, wherein the DC coupling capacitance of one group of cabling vertically arranges, and the DC coupling capacitance of another group cabling is vertically arranged on the both sides of right section of this group cabling.
CN201410410813.8A 2014-08-20 2014-08-20 Design method for reducing crosstalk influence between high-speed differential pairs Active CN104182576B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410410813.8A CN104182576B (en) 2014-08-20 2014-08-20 Design method for reducing crosstalk influence between high-speed differential pairs

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410410813.8A CN104182576B (en) 2014-08-20 2014-08-20 Design method for reducing crosstalk influence between high-speed differential pairs

Publications (2)

Publication Number Publication Date
CN104182576A true CN104182576A (en) 2014-12-03
CN104182576B CN104182576B (en) 2017-05-03

Family

ID=51963612

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410410813.8A Active CN104182576B (en) 2014-08-20 2014-08-20 Design method for reducing crosstalk influence between high-speed differential pairs

Country Status (1)

Country Link
CN (1) CN104182576B (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105307383A (en) * 2015-09-08 2016-02-03 浪潮集团有限公司 PCB and PCB wiring method
CN105335587A (en) * 2015-12-09 2016-02-17 浪潮电子信息产业股份有限公司 Chip Pinout design method for restraining signal crosstalk noise
CN105357866A (en) * 2015-12-09 2016-02-24 浪潮电子信息产业股份有限公司 Wiring method capable of reducing high-speed signal crosstalk
CN105468863A (en) * 2015-12-10 2016-04-06 浪潮电子信息产业股份有限公司 Hierarchic routing design method of differential pairs
CN106445015A (en) * 2016-10-20 2017-02-22 郑州云海信息技术有限公司 Deployment method of differential signal lines and board card
CN107315878A (en) * 2017-06-29 2017-11-03 郑州云海信息技术有限公司 A kind of Layout wire structures and wiring method for improving signal SI mass
CN107607131A (en) * 2017-09-22 2018-01-19 联想(北京)有限公司 A kind of electronic equipment and information processing method
CN115361787A (en) * 2022-09-16 2022-11-18 苏州浪潮智能科技有限公司 PCB (printed Circuit Board) wire design method, PCB wire design processing method and PCB

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100323535A1 (en) * 2009-06-22 2010-12-23 Fujitsu Network Communications, Inc. System and Apparatus for Reducing Crosstalk
CN102113179A (en) * 2008-08-08 2011-06-29 泰科电子公司 Electrical connector having reversed differential pairs
CN102196661A (en) * 2010-02-01 2011-09-21 安费诺公司 Differential pair inversion for reduction of crosstalk in a backplane system
CN102292879A (en) * 2009-01-22 2011-12-21 广濑电机株式会社 Reducing far-end crosstalk in electrical connectors
US20140091873A1 (en) * 2010-12-22 2014-04-03 Xiaoning Ye Differential signal crosstalk reduction

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102113179A (en) * 2008-08-08 2011-06-29 泰科电子公司 Electrical connector having reversed differential pairs
CN102292879A (en) * 2009-01-22 2011-12-21 广濑电机株式会社 Reducing far-end crosstalk in electrical connectors
US20100323535A1 (en) * 2009-06-22 2010-12-23 Fujitsu Network Communications, Inc. System and Apparatus for Reducing Crosstalk
CN102196661A (en) * 2010-02-01 2011-09-21 安费诺公司 Differential pair inversion for reduction of crosstalk in a backplane system
US20140091873A1 (en) * 2010-12-22 2014-04-03 Xiaoning Ye Differential signal crosstalk reduction

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
陈超: "《高速差分链路串扰抑制技术 》", 《第十七届计算机工程与工艺年会暨第三届微处理器技术论坛论文集(上册)》 *

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105307383A (en) * 2015-09-08 2016-02-03 浪潮集团有限公司 PCB and PCB wiring method
CN105307383B (en) * 2015-09-08 2017-12-01 浪潮集团有限公司 A kind of PCB and PCB layout method
CN105335587A (en) * 2015-12-09 2016-02-17 浪潮电子信息产业股份有限公司 Chip Pinout design method for restraining signal crosstalk noise
CN105357866A (en) * 2015-12-09 2016-02-24 浪潮电子信息产业股份有限公司 Wiring method capable of reducing high-speed signal crosstalk
CN105468863A (en) * 2015-12-10 2016-04-06 浪潮电子信息产业股份有限公司 Hierarchic routing design method of differential pairs
CN106445015A (en) * 2016-10-20 2017-02-22 郑州云海信息技术有限公司 Deployment method of differential signal lines and board card
CN107315878A (en) * 2017-06-29 2017-11-03 郑州云海信息技术有限公司 A kind of Layout wire structures and wiring method for improving signal SI mass
CN107607131A (en) * 2017-09-22 2018-01-19 联想(北京)有限公司 A kind of electronic equipment and information processing method
US10978784B2 (en) 2017-09-22 2021-04-13 Lenovo (Beijing) Co., Ltd. Electronic apparatus and information processing method
CN115361787A (en) * 2022-09-16 2022-11-18 苏州浪潮智能科技有限公司 PCB (printed Circuit Board) wire design method, PCB wire design processing method and PCB
CN115361787B (en) * 2022-09-16 2024-01-23 苏州浪潮智能科技有限公司 PCB wiring design method, PCB wiring design processing method and PCB

Also Published As

Publication number Publication date
CN104182576B (en) 2017-05-03

Similar Documents

Publication Publication Date Title
CN104182576A (en) Design method for reducing crosstalk influence between high-speed differential pairs
CN104102797A (en) PCB (printed circuit board) layout design method reducing differential crosstalk
US8560296B2 (en) Printed circuit board via model design for high frequency performance
KR20090043023A (en) A micro-strip transmission line structure of a serpentine type
WO2018218907A1 (en) Design method for optimizing signal quality of pcie connector area
Chen et al. Via optimization for next generation speeds
CN105307383A (en) PCB and PCB wiring method
CN205961559U (en) Printed circuit board , printing assembly plate and electronic equipment with differential signal line
CN107809838A (en) Mainboard and server
CN106507583A (en) A kind of signal transmission line, method and system
CN206061272U (en) A kind of high-speed high frequency printed board is across segmentation Wiring structure
CN108966497B (en) Design method of layout at golden finger of board card and server board card
Wilson et al. Active crosstalk cancellation for next-generation single-ended memory interfaces
Nieh et al. Far-end crosstalk cancellation using via stub for DDR4 memory channel
Zhang et al. A hybrid stack-up of printed circuit board for high-speed networking systems
CN104849572B (en) A kind of HW High Way cross talk restraining method decomposed based on electromagnetic field mode
WO2020224066A1 (en) High-speed signal connector, server system, and server
CN104244610A (en) Design method for reducing CONNECTOR via influences
Weng et al. Enhanced Power and Signal Integrity Through Layout Optimization of High-Speed Memory Systems
Wu et al. High Speed Muti-board Signal Integrity Simulation and Implementation
Seki et al. Crosstalk-noise reduction in GHz domain using segmental transmission line
CN108366486A (en) A kind of place and route method reducing clk high speed signal crosstalks
CN105517327A (en) Method for realizing via impedance matching through blind buried hole process
Lin et al. Common-mode noise reduction of bended coupled lines by using time compensation technology
Wang et al. Crosstalk analysis in signal integrity

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant