CN104103507A - Manufacturing technology of synchronously etching floating gate - Google Patents

Manufacturing technology of synchronously etching floating gate Download PDF

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Publication number
CN104103507A
CN104103507A CN201310129922.8A CN201310129922A CN104103507A CN 104103507 A CN104103507 A CN 104103507A CN 201310129922 A CN201310129922 A CN 201310129922A CN 104103507 A CN104103507 A CN 104103507A
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CN
China
Prior art keywords
oxide
polysilicon
etching
isolation trench
doping
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201310129922.8A
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Chinese (zh)
Inventor
吴楠
冯骏
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GigaDevice Semiconductor Beijing Inc
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GigaDevice Semiconductor Beijing Inc
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Publication date
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Priority to CN201310129922.8A priority Critical patent/CN104103507A/en
Publication of CN104103507A publication Critical patent/CN104103507A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356Disposition, e.g. buried gate electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Memories (AREA)

Abstract

The invention provides a manufacturing technology of synchronously etching a floating gate. The technology comprises steps: oxidized generation of a tunnel oxide layer and deposition and doping of polysilicon are sequentially carried out in a working area; a protection layer is deposited on the doped polysilicon; the doped polysilicon is etched according to a first preset pattern module to form a shallow insulated groove; a first oxide thin film is deposited on the surface of the shallow insulated groove; the first oxide thin film is oxidized at a high temperature to form a second oxide thin film; the shallow insulated groove is filled with oxide; the oxide beyond the protection layer in the shallow insulated groove is removed by adopting chemical-mechanical planarization; the protection layer is removed; and the oxide is etched according to a second preset pattern module. Thus, the design technology is optimized, the manufacturing process is simplified, and the manufacturing cost is saved.

Description

A kind of manufacture craft of synchronous etching floating boom
Technical field
The present invention relates to technical field of semiconductors, particularly relate to a kind of manufacture craft of synchronous etching floating boom.
Background technology
The previous NOR type flash memory (NOR Flash) with present is all to make floating boom (Floating Gate) by autoregistration floating boom manufacture craft (Self-align Poly Process), and the method technique of this autoregistration floating boom manufacture craft has three large shortcomings:
First, in autoregistration floating boom manufacture craft, need to adopt chemical-mechanical planarization removal to fall this manufacture craft of a certain amount of polysilicon (Poly CMP), floating gate polysilicon (Floating gate poly) shallow isolation trench oxide (STI Oxide) is exposed, thereby autoregistration form floating boom.This manufacture craft of Poly CMP be a crystal circle center can not fine control to the evenness of edge thickness technique, if the floating boom height of crystal circle center (wafer center) and crystal round fringes (wafer edge) is different, the electrical feature of the flash cell (Flash Cell) of making just has deviation, has influence on the quality of product and the consistency of electrical feature.
Second, the structural representation of the floating boom made from reference to a kind of self-registered technology shown in Fig. 1, the floating boom that adopts autoregistration floating boom manufacture craft to make is to lean out service area (Active Area, be called for short AA), a larger floating boom can be placed on above less service area, some marginal portion that will inevitably cause so larger floating boom is not have service area below to support, tunnel oxidation layer (Tunnel oxide) is normal at the center of service area like this, but because tunnel oxidation layer is exceeding the fillet part branch attenuation of service area scope, just tighter to the requirement of service area fillet like this, otherwise easily there is electric leakage to occur.
The 3rd, equally with reference to Fig. 1, the floating boom that employing autoregistration floating boom manufacture craft is made and the interface of shallow isolation trench (STI), next carry out the open etching of memory cell (Cell Open Etch) and will take away the oxide (STI Oxide) in a part of shallow isolation trench, but the large structure in young hole can cause certain difficulty to the technique of carrying out afterwards the open etching in unit.
Therefore, one of problem that those skilled in the art are in the urgent need to address is, proposes a kind of manufacture craft of synchronous etching floating boom, in order to optimal design technique, simplifies manufacturing process, saves cost of manufacture.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of manufacture craft of synchronous etching floating boom, in order to change excellent design technology, simplifies manufacturing process, saves cost of manufacture.
In order to address the above problem, the invention discloses a kind of manufacture craft of synchronous etching floating boom, comprising:
On service area, oxidation generates tunnel oxidation layer and deposit spathic silicon doping successively;
On the polysilicon of described doping, deposit protective layer;
Form shallow isolation trench according to the polysilicon adulterating described in the first default artwork etching;
At described shallow isolation trench surface deposition the first sull;
Described in high-temperature oxydation, the first sull forms the second sull;
In described shallow isolation trench, insert oxide;
Adopt chemical-mechanical planarization to remove the oxide that exceeds described protective layer in described shallow isolation trench;
Remove described protective layer;
According to oxide described in the second default artwork etching.
Preferably, described form the step of shallow isolation trench according to the polysilicon adulterating described in the first default artwork etching before, and, described according to the step of oxide described in the second default artwork etching before, also comprise:
Deposit successively agraphitic carbon and anti-reflection layer at described protective layer, and cover photoresist on described agraphitic carbon and anti-reflection layer;
The default artwork of photoetching on described photoresist.
Preferably, described form the step of shallow isolation trench according to the polysilicon adulterating described in the first default artwork etching after, and, described according to the step of oxide described in the second default artwork etching after, also comprise:
Adopt successively dry method and wet method to remove described photoresist.
Preferably, the described step according to oxide described in the second default artwork etching is:
Adopt successively dry method and wet method according to oxide described in the second default artwork etching.
Preferably, insert the step of oxide in described shallow isolation trench after, also comprise:
Be uniformly distributed described oxide;
The described step that is uniformly distributed described oxide comprises:
The temperature of described oxide is elevated to preset temperature;
The temperature of described oxide is returned to normal temperature.
Preferably, the step of described deposit spathic silicon doping comprises:
Deposit spathic silicon on service area, and the surface to described polysilicon is cleaned after deposition;
At described polysilicon doping impurity.
Preferably, after the described step that is oxidized successively generation tunnel oxidation layer and deposit spathic silicon doping on service area, also comprise:
Be uniformly distributed the polysilicon of described doping;
The step of the described polysilicon that is uniformly distributed described doping comprises:
The temperature of the polysilicon of described doping is elevated to preset temperature;
The temperature of the polysilicon of described doping is returned to normal temperature.
Preferably, described form the step of shallow isolation trench according to the polysilicon adulterating described in the first default artwork etching after, also comprise:
Surface to described shallow isolation trench is cleaned.
Preferably, the lateral section of described shallow isolation trench is wide at the top and narrow at the bottom.
Compared with prior art, the present invention includes following advantage:
First, by adopting the mode of floating boom and service area one step etching, make the justified margin of floating boom and service area, avoid adopting chemical-mechanical planarization removal to fall crystal circle center that this manufacture craft of a certain amount of crystal silicon may cause to edge thickness inhomogeneous problem, optimized the manufacture craft of floating boom.Secondly, due to the mode etching floating boom that adopts floating boom with service area one step etching, and the cross-section structure of the shallow isolation trench etching is wide at the top and narrow at the bottom, easily carries out ensuing to memory cell opening etching.Again, because the present invention adopts good technique production order, make production process simpler, simplified manufacturing process, saved cost of manufacture.
Brief description of the drawings
Fig. 1 is a kind of structural representation of floating boom of self-registered technology making;
Fig. 2 is the flow chart of steps of the manufacture craft embodiment of a kind of synchronous etching floating boom of the present invention;
Fig. 3 is the profile of the manufacture craft 1-5 of a kind of floating boom of the present invention;
Fig. 4 is the profile of the manufacture craft 6-11 of a kind of floating boom of the present invention;
Fig. 5 is the profile of the manufacture craft 12-13 of a kind of floating boom of the present invention;
Fig. 6 is the profile of the manufacture craft 14 of a kind of floating boom of the present invention;
Fig. 7 is the profile of the manufacture craft 15-16 of a kind of floating boom of the present invention;
Fig. 8 is the profile of the manufacture craft 17 of a kind of floating boom of the present invention;
Fig. 9 is the profile of the manufacture craft 18 of a kind of floating boom of the present invention;
Figure 10 is the profile of the manufacture craft 19-23 of a kind of floating boom of the present invention.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation.
One of core idea of the embodiment of the present invention is, adopt good technique production order, and by adopting the mode of floating boom and service area one step etching, make the justified margin of floating boom and service area, avoid adopting many chemical-mechanical planarizations to grind off crystal circle center that this manufacture craft of a certain amount of crystal silicon may cause to the inhomogeneous problem of edge thickness, optimized the manufacture craft of floating boom.
With reference to Fig. 2, show the flow chart of steps of the manufacture craft embodiment of a kind of synchronous etching floating boom of the present invention, specifically can comprise the steps:
Step 101, on service area, oxidation generates tunnel oxidation layer and deposit spathic silicon doping successively;
In a preferred embodiment of the present invention, the step that is oxidized successively generation tunnel oxidation layer and deposit spathic silicon and doping on service area specifically can comprise following sub-step:
Sub-step S11, on service area, oxidation generates tunnel oxidation layer and deposit spathic silicon, and the surface to described polysilicon is cleaned after deposition;
Sub-step S12, at described polysilicon doping impurity.
In a preferred embodiment of the present invention, after step 101, can also comprise the steps:
Be uniformly distributed the polysilicon of described doping;
Wherein, the step that is uniformly distributed the polysilicon of described doping described in can comprise following sub-step:
Sub-step S21, is elevated to preset temperature by the temperature of the polysilicon of described doping;
Sub-step S21, returns to normal temperature by the temperature of the polysilicon of described doping.
Step 102 deposits protective layer on the polysilicon of described doping;
With reference to the profile of the manufacture craft 1-5 of a kind of floating boom shown in Fig. 3; first on service area, oxidation generates tunnel oxidation layer (Tunnel oxide) and deposit spathic silicon (FG POLY) doping successively; wherein; polysilicon after doping has better conductivity; and then on the polysilicon of doping, deposit protective layer (FG HM), can be in order to protect polysilicon.Preferably, after deposit spathic silicon, can also clean post-depositional polysilicon surface, remove dirtyly, the electrical characteristics of floating boom of avoiding impact to make, then can be then at polysilicon doping impurity.
After deposit spathic silicon and doping, the polysilicon of this doping can be elevated to a certain preset temperature, impurity can be uniformly distributed in polysilicon.Raise after a period of time in temperature, the temperature of the polysilicon of doping is returned to normal temperature.
Step 103, forms shallow isolation trench according to the polysilicon adulterating described in the first default artwork etching;
In a preferred embodiment of the present invention, before described step 103, can also comprise the steps:
Deposit successively agraphitic carbon and anti-reflection layer at described protective layer, and cover photoresist on described agraphitic carbon and anti-reflection layer;
The default artwork of photoetching on described photoresist.
In a preferred embodiment of the present invention, after described step 103, can also comprise the steps:
Adopt successively dry method and wet method to remove described photoresist.
With reference to the profile of the manufacture craft 6-11 of a kind of floating boom shown in Fig. 4; in deposit spathic silicon doping; and deposit on the basis of protective layer; deposit successively agraphitic carbon and anti-reflection layer; and cover one deck photoresist, the default artwork of photoetching first on photoresist, then can form shallow isolation trench according to polysilicon described in the first default artwork etching again; after etching completes, adopt successively dry method and wet method to remove described photoresist.Preferably, the lateral section of the shallow isolation trench that etching forms is wide at the top and narrow at the bottom, is conducive to the filling to oxide and the etching to oxide in follow-up technique.
Step 104, at described shallow isolation trench surface deposition the first sull;
With reference to the profile of the manufacture craft 12-13 of a kind of floating boom of the present invention shown in Fig. 5, when etching forms after shallow isolation trench, preferably, can also clean the surface of shallow isolation trench, remove dirty after at this shallow isolation trench surface deposition the first sull (HARP), to improve the stability of made floating boom.
Step 105, the first sull forms the second sull described in high-temperature oxydation;
With reference to the profile of the manufacture craft 14 of a kind of floating boom of the present invention shown in Fig. 6, for shallow isolation trench surface deposition the first sull, can carry out high-temperature oxydation to it, form the second sull.Preferably, carrying out, in the process of high-temperature oxydation, can removing the short-tempered of sull, stablize the electrical characteristics of the floating boom of making.
Step 106 is inserted oxide in described shallow isolation trench;
In a preferred embodiment of the present invention, after described step 106, can also comprise the steps:
Be uniformly distributed described oxide;
The described step that is uniformly distributed described oxide can comprise following sub-step:
The temperature of described oxide is elevated to preset temperature;
The temperature of described oxide is returned to normal temperature.
With reference to the profile of the manufacture craft 15-16 of a kind of floating boom of the present invention shown in Fig. 7, in the shallow isolation trench that forms the second sull, insert oxide (HARP).Insert after oxide, can also be elevated to a certain preset temperature for this oxide, oxide can be uniformly distributed.Raise after a period of time in temperature, the temperature of oxide is returned to normal temperature.
Step 107, adopts chemical-mechanical planarization to remove the oxide that exceeds described protective layer in described shallow isolation trench;
With reference to the profile of the manufacture craft 17 of a kind of floating boom of the present invention shown in Fig. 8; in practice; the oxide of inserting may exceed its part that need to fill; therefore; after inserting oxide, can adopt chemical-mechanical planarization to remove the oxide that exceeds described protective layer in shallow isolation trench.
Step 108, removes described protective layer;
With reference to the profile of the manufacture craft 18 of a kind of floating boom of the present invention shown in Fig. 9, exceed after the oxide of described protective layer when removing in shallow isolation trench, remove this protective layer.
Step 109, according to oxide described in the second default artwork etching.
In a preferred embodiment of the present invention, described step 109 can comprise following sub-step:
Sub-step S61, adopts dry method and wet method according to oxide described in the second default artwork etching successively.
In a preferred embodiment of the present invention, before described step 109, can also comprise the steps:
Deposit successively agraphitic carbon and anti-reflection layer at described protective layer, and cover photoresist on described agraphitic carbon and anti-reflection layer;
The default artwork of photoetching on described photoresist.
With reference to the profile of the manufacture craft 19-23 of a kind of floating boom of the present invention shown in Figure 10; when removing after the oxide that exceeds described protective layer in shallow isolation trench and removing after this protective layer; on agraphitic carbon and anti-reflection layer, cover one deck photoresist; and the default artwork of photoetching second on photoresist, then according to adopting successively dry method and wet method according to oxide described in default artwork etching.
In order to make those skilled in the art further understand the embodiment of the present invention, illustrate that below by a concrete example the present invention makes the technological process of floating boom, concrete step is as follows:
1.FG POLY1 DEP (floating gate polysilicon deposition);
2.FG POLY1 DEP SCRUBBER (cleaning after floating gate polysilicon deposition);
3.FG POLY1 IMP (floating gate polysilicon doping);
4.FG POLY1 IMP ANNEAL (floating gate polysilicon doping annealing, wherein, is annealed into polysilicon and doping were elevated to after a certain temperature a period of time, then return to original temperature);
5.FG POLY1 HM DEP (floating gate polysilicon protective layer deposition);
6.FG POLY1 AC DEP (floating gate polysilicon amorphous carbon deposition);
7.FG POLY1 DARK DEP (floating gate polysilicon anti-reflection layer deposition);
8.STI PHOTO (photoetching of shallow isolation trench photoresist);
9.STI TRENCH ETCH (shallow isolation trench etching);
10.STI TRENCH ETCH ASHER (dry method removing photoresistance);
11.STI TRENCH ETCH WET STRIP (wet method removing photoresistance);
12.STI PRE HARP DEP CLN (shallow isolation trench oxide cleans before filling);
13.STI HARP DEP (shallow isolation trench sull deposition);
14.STI OXIDATION (shallow isolation trench high-temperature oxydation);
15.STI HARP DEP (shallow isolation trench oxide is filled);
16.RTA (annealing, wherein, is annealed into oxide was elevated to after a certain temperature a period of time, then return to original temperature);
17.STI OXIDE CMP (shallow isolation trench oxide chemistry machinery planarization);
18.STI HM REMOVAL (removal of floating boom protective layer);
19.COPEN PHOTO (oxide photoresist photoetching in shallow isolation trench);
20.COPEN DRY ETCH (in shallow isolation trench, oxide is dry carves);
21.COPEN WET ETCH (oxide wet etching in shallow isolation trench);
22.COPEN ASHER (dry method removing photoresistance);
23.COPEN WET STRIP (wet method removing photoresistance).
It should be noted that, for embodiment of the method, for simple description, therefore it is all expressed as to a series of combination of actions, but those skilled in the art should know, the application is not subject to the restriction of described sequence of movement, because according to the application, some step can adopt other orders or carry out simultaneously.Secondly, those skilled in the art also should know, the embodiment described in specification all belongs to preferred embodiment, and related action might not be that the application is necessary.
Each embodiment in this specification all adopts the mode of going forward one by one to describe, and what each embodiment stressed is and the difference of other embodiment, between each embodiment identical similar part mutually referring to.
Manufacture craft to a kind of synchronous etching floating boom provided by the present invention above, be described in detail, applied specific case herein principle of the present invention and execution mode are set forth, the explanation of above embodiment is just for helping to understand method of the present invention and core concept thereof; , for one of ordinary skill in the art, according to thought of the present invention, all will change in specific embodiments and applications, in sum, this description should not be construed as limitation of the present invention meanwhile.

Claims (9)

1. a manufacture craft for synchronous etching floating boom, is characterized in that, comprising:
On service area, oxidation generates tunnel oxidation layer and deposit spathic silicon doping successively;
On the polysilicon of described doping, deposit protective layer;
Form shallow isolation trench according to the polysilicon adulterating described in the first default artwork etching;
At described shallow isolation trench surface deposition the first sull;
Described in high-temperature oxydation, the first sull forms the second sull;
In described shallow isolation trench, insert oxide;
Adopt chemical-mechanical planarization to remove the oxide that exceeds described protective layer in described shallow isolation trench;
Remove described protective layer;
According to oxide described in the second default artwork etching.
2. method according to claim 1, it is characterized in that, described form the step of shallow isolation trench according to the polysilicon adulterating described in the first default artwork etching before, and, described according to the step of oxide described in the second default artwork etching before, also comprise:
Deposit successively agraphitic carbon and anti-reflection layer at described protective layer, and cover photoresist on described agraphitic carbon and anti-reflection layer;
The default artwork of photoetching on described photoresist.
3. method according to claim 1 and 2, it is characterized in that, described form the step of shallow isolation trench according to the polysilicon adulterating described in the first default artwork etching after, and, described according to the step of oxide described in the second default artwork etching after, also comprise:
Adopt successively dry method and wet method to remove described photoresist.
4. method according to claim 1 and 2, is characterized in that, the described step according to oxide described in the second default artwork etching is:
Adopt successively dry method and wet method according to oxide described in the second default artwork etching.
5. method according to claim 1, is characterized in that, after inserting the step of oxide, also comprises in described shallow isolation trench:
Be uniformly distributed described oxide;
The described step that is uniformly distributed described oxide comprises:
The temperature of described oxide is elevated to preset temperature;
The temperature of described oxide is returned to normal temperature.
6. method according to claim 1, is characterized in that, the step of described deposit spathic silicon doping comprises:
Deposit spathic silicon on service area, and the surface to described polysilicon is cleaned after deposition;
At described polysilicon doping impurity.
7. according to the method described in claim 1 or 6, it is characterized in that, after the described step that is oxidized successively generation tunnel oxidation layer and deposit spathic silicon doping on service area, also comprise:
Be uniformly distributed the polysilicon of described doping;
The step of the described polysilicon that is uniformly distributed described doping comprises:
The temperature of the polysilicon of described doping is elevated to preset temperature;
The temperature of the polysilicon of described doping is returned to normal temperature.
8. method according to claim 1, is characterized in that, described form the step of shallow isolation trench according to the polysilicon adulterating described in the first default artwork etching after, also comprise:
Surface to described shallow isolation trench is cleaned.
9. method according to claim 1, is characterized in that, the lateral section of described shallow isolation trench is wide at the top and narrow at the bottom.
CN201310129922.8A 2013-04-15 2013-04-15 Manufacturing technology of synchronously etching floating gate Pending CN104103507A (en)

Priority Applications (1)

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Application Number Priority Date Filing Date Title
CN201310129922.8A CN104103507A (en) 2013-04-15 2013-04-15 Manufacturing technology of synchronously etching floating gate

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040099906A1 (en) * 2002-11-26 2004-05-27 Mosel Vitelic Corporation Trench isolation without grooving
CN101097892A (en) * 2006-06-29 2008-01-02 海力士半导体有限公司 Method for forming isolation structure of flash memory device
US20080206957A1 (en) * 2007-02-26 2008-08-28 Hynix Semiconductor Inc. Method of Forming Isolation Layer of Semiconductor Memory Device
CN101295678A (en) * 2007-04-25 2008-10-29 海力士半导体有限公司 Method of fabricating a flash memory device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040099906A1 (en) * 2002-11-26 2004-05-27 Mosel Vitelic Corporation Trench isolation without grooving
CN101097892A (en) * 2006-06-29 2008-01-02 海力士半导体有限公司 Method for forming isolation structure of flash memory device
US20080206957A1 (en) * 2007-02-26 2008-08-28 Hynix Semiconductor Inc. Method of Forming Isolation Layer of Semiconductor Memory Device
CN101295678A (en) * 2007-04-25 2008-10-29 海力士半导体有限公司 Method of fabricating a flash memory device

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