CN104081519A - 半导体芯片堆叠组件 - Google Patents
半导体芯片堆叠组件 Download PDFInfo
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Abstract
本发明的实施例提供了半导体芯片堆叠组件,该半导体芯片堆叠组件提供第一半导体设备与第二半导体设备的直接附接。组件包括具有设置在第一半导体芯片的表面上的第一和第二组电互连区域的第一半导体芯片、以及第二半导体芯片。第一组电互连区域与第二半导体芯片的电互连区域电连接,并且第二组电互连区域与衬底电互连。直接电连接是例如硅光电设备到驱动器或设备到信号转换器、逻辑到存储器、存储器到存储器、以及逻辑到逻辑芯片互连。
Description
技术领域
本发明的实施例一般涉及半导体设备、半导体设备的封装、半导体设备堆叠组件,以及光通信和数据传输。
背景技术
集成电路(IC)芯片性能、电源管理和尺寸改进增加了用于封装和装配相关IC芯片的材料和技术的需求。一般地,集成电路芯片也被称为微芯片、硅芯片、半导体芯片、芯片或管芯。IC芯片存在于各种通用设备中,诸如计算机、汽车、电视、CD播放器、智能电话以及蜂窝电话中的微处理器中。在制造之后,半导体芯片通常以考虑到半导体芯片所驻留的设备所提供的操作环境的方式而封装。一般地,半导体芯片的封装保护芯片不受损害,并提供将半导体芯片连接到电源以及其它电子部件(表现为,例如,输入/输出功能)的电连接。由于半导体芯片往往具有较高的带宽性能,并且用户想要较小的形状因数,所以半导体芯片封装必须满足尺寸、热管理,电力传输、互连密度和集成的挑战。
附图说明
图1A-B是示出用于半导体芯片的堆叠封装组件的示意图。
图2A-B是示出用于半导体芯片的另外的堆叠封装组件的示意图。
图3A-B是示出用于半导体芯片的进一步的堆叠封装组件的示意图。
图4示出包括堆叠的半导体芯片组件和额外的半导体芯片的组件。
图5示出可以采用半导体芯片的堆叠组件的计算系统。
具体实施方式
本发明的实施例提供半导体芯片堆叠组件,该半导体芯片堆叠组件提供第一半导体设备与第二半导体设备的直接附接。依据本发明实施例的半导体芯片组件可以是接合至衬底或直接接合至母板的倒装芯片。本发明的实施例提供了低Z高度形状因数的封装和组件,同时提供期望的3D系统集成。本发明的实施例可用于例如硅光电设备到驱动器或设备到信号转换器、逻辑到存储器、存储器到存储器,以及逻辑到逻辑的接口堆叠组件。依据本发明实施例的封装组件是非常有用的,例如,用于具有激光器的封装驱动器以及具有光电检测器的跨阻抗放大器。
图1A-B示出了用于半导体设备的封装组件。在图1A-B中,衬底105容纳且电耦合至第一半导体芯片110。衬底105是例如印刷线路板、有芯或无芯封装衬底、母板(主板或逻辑线路板)、或包括能够使计算系统的各种元件电互连的电互连的其它衬底,诸如,半导体芯片、传感器、设备(例如,RF开关,温度传感器,加速度计,陀螺仪,振荡器,压阻传感器,RFID系统,天线,和/或GPS系统)和/或电源。在本发明的实施例中,衬底105能够被插入或否则电连接到母板。在本发明的实施例中,半导体芯片110是硅光电设备,诸如光电传感器或光电检测器芯片(衬底包括一个或多个光电传感器或光电检测器)或激光器芯片(衬底包括一个或多个激光器)。光电传感器和光电检测器包括例如包含雪崩光电二极管或PIN二极管的芯片,且激光器芯片包括例如垂直腔表面发射激光器(VCSEL)芯片、二极管激光器芯片、混合半导体激光器芯片。在本发明可替换的实施例中,半导体芯片110是逻辑芯片、处理器、图形芯片、存储器芯片、DSP(数字信号处理器)芯片或其它如本文描述的芯片。在图1B中,衬底包括凹陷区域107。
在本发明的实施例中,与第一半导体芯片110相关联的电互连115可以是例如导电柱、焊盘、凸块、柱体、引脚、或其它导电结构。与衬底105相关联的电互连(未示出)可以是例如导电柱、焊盘、凸块、柱体、引脚、或其它导电结构。在第一半导体芯片110和衬底105之间的电互连可以使用或不使用焊料来形成。半导体芯片110通过例如可选的焊点120电耦合到衬底105。焊点120接合到半导体芯片110上的电互连115和衬底105上的相对应的电互连(未示出),且与它们形成电连接。在本发明的实施例中,衬底105的电互连是焊盘,第一半导体芯片110相对应的电互连115是凸块、柱体或引脚,并且利用焊点120形成电连接。在导电柱、焊盘、凸块、柱体、引脚或其它导电结构之间不使用焊料而形成的电互连和金属一金属接合可以例如通过热压接合、热超声接合和/或芯片的环氧树脂接合来实现。在本发明的实施例中,导电柱、焊盘、凸块、柱体、引脚或其它导电结构可以由金或铜组成,且使用热压接合来结合它们。在本发明的实施例中,电互连由金属组成。形成电互连115的金属和与衬底105相关联的那些金属可以是例如,铜、金、钨、铂、和/或铝。
第二半导体芯片125位于衬底105和第一半导体芯片110之间。第二半导体芯片125通过电互连130直接接合到第一半导体芯片110且与第一半导体芯片110电互连。接合可通过焊料区域。第一半导体芯片110和第二半导体芯片125上的相对应的电互连区域是例如,导电柱、焊盘、凸块、柱体、引脚或其它导电结构。导电柱、焊盘、凸块、柱体、引脚或其它导电结构之间的电互连和金属-金属接合可以例如通过热压接合、热超声接合和/或芯片的环氧树脂来实现。形成电互连130的金属同样可以是例如铜、金、钨、铂和/或铝。在本发明的实施例中,第二半导体芯片125是激光器的驱动器或光电检测器的跨阻抗放大器。一般地,跨阻抗放大器(TIA)将来自光电检测器的电流信号转换成电压信号并将其放大。在本发明进一步的实施例中,第二半导体芯片125是逻辑芯片、存储器芯片、处理器、图形芯片、无线通信芯片或无线通信芯片组。在本发明的实施例中,第二半导体芯片125是减薄的半导体芯片。第二半导体芯片的高度可以被减薄到50μm或更少或在100μm与20μm之间。
在图1A和图1B中,第一半导体芯片110的第一面和衬底105的紧邻面之间的距离分别表示为“h1”和“h2”。在第一半导体芯片110和衬底105之间的间隙135的高度h1的数值在本发明的实施例中可以例如在75与150μm之间。焊点120可被尺寸设计成产生具有期望高度的间隙135。例如,在本发明的实施例中,焊点的高度可以是25到145μm或80到145μm。衬底105中的凹陷区域107紧邻第二半导体芯片125,且允许高度h2小于高度h1。在第一半导体芯片110和衬底105之间的间隙135的高度h2的数值在本发明的实施例中可以在15与125μm之间。
第一半导体芯片110可以是接合到衬底105的倒装芯片。可选的,底部填充材料被放置在间隙135中。底部填充材料可以包括例如可流动的电介质材料,例如具有或不具有填充颗粒的环氧树脂,或具有或不具有填充颗粒的聚合物或无机材料。
图2A-B提供了用于半导体设备的额外的封装组件。图2A-B中组件的元件与关于图1A-B中讨论的元件相同。然而,在图2A-B中,第一半导体芯片110部分地延伸在衬底105之外,且可选的对准单元140的一部分接触第一半导体芯片110中延伸在衬底105之外的区域。对准单元对于将硅光电芯片与光传输系统的光学耦合器对准是有用的,该光传输系统将光在计算系统的元件之间传输。
图3A-B提供了用于半导体设备的进一步的另外的封装组件。图3A-B中组件的元件与关于图1A-B中讨论的元件相同。然而,在图3A-B中,电互连115和130以及第一和第二半导体芯片110和125的相对位置被改变。本发明的实施例并不限于特定的互连图案或半导体芯片相对于彼此的位置。
图4提供了一实施例,在该实施例中,本发明的封装组件与逻辑芯片一起被安装到衬底上。在图4中,衬底405容纳了IC芯片410和封装组件415和417。衬底405是例如印刷线路板、有芯或无芯封装衬底、母板(主板或逻辑板)或包括能够使计算系统的各个元件电互连的其它衬底。IC芯片410是例如处理器、存储控制器交换机、图形芯片、网络芯片或包括诸如逻辑芯片和存储器芯片一个或多个芯片的封装。封装组件415和417是依据图1A-B、图2A-B和/或图3A-B的组件。封装组件415和417通过衬底405与IC芯片410电互连。在本发明的实施例中,封装组件415包括激光器芯片和激光器驱动器,并且封装组件417包括光电检测器和跨阻抗放大器。光电检测器和跨阻抗放大器允许输入光学数据作为电信号输入到IC芯片410中。激光器芯片/激光器驱动器允许从IC芯片410输出的电子数据作为光学信号输出。与衬底405相关联的其它数量的半导体芯片410和组件415和417也是可能的。可与图4中的组件相关联的其它元件包括例如热管理系统和光学互连系统。当然,还存在很多采用本发明的封装组件的其它方式。
图5提供了一种采用光数据传输系统的示例性计算系统。在图5中,计算系统包括通过光学互连515连接到存储控制器交换机510的处理器505。光学互连515(为了清楚的说明,没有显示其细节)包括激光器芯片、光耦合到激光器芯片的光学耦合器、光电检测器、光耦合到光电检测器的光学耦合器、以及光学耦合到光学耦合器并能够在光学耦合器之间引导光的一个或多个波导。激光器芯片、光电检测器芯片或它们两个都装配有依据图1A-B、2A-B和/或图3A-B的封装组件中的驱动器芯片或跨阻抗放大器。激光器芯片能够接收来自输出逻辑芯片的数据,且光电检测器能够发送数据到输出逻辑芯片。双向I/O通信系统包括与诸如处理器的第一IC芯片相关联的至少一个激光器芯片和至少一个光电检测器,以及与第二IC芯片相关联的至少一个激光器芯片和至少一个光电检测器。与第一IC芯片相关联的激光器被光耦合到与第二IC芯片相关联的光电检测器,且与第二IC芯片相关联的激光器芯片被光耦合到与第一IC芯片相关联的光电检测器。在本发明的实施例中,光学互连515是例如与VCSEL芯片的阵列和相应的光电检测器的阵列相关联的双向链路和/或多个光学连接。在图5的计算系统中,存储控制器交换机510通过光学互连515被耦合到存储芯片520,通过光学互连515耦合到图形芯片525,且通过光学互连515耦合到输入/输出控制芯片530。输A/输出控制器芯片530通过光学互连515连接到输入/输出设备535。输入/输出设备535包括例如USB(通用串行总线)、USB2、SATA(串行高级技术配件)、音频、PCI(外围部件互连)以及PCI高速设备。在本发明的实施例中,计算系统(例如,505、510、520、525、530和/或535)的一个或多个元件通过电互连而不是光学互连515来耦合,且数据输入/输出功能可通过电互连而产生。当然,其它配置和元件也可用于计算系统。
本文中讨论的半导体芯片可以是任意类型的集成电路设备,例如,逻辑芯片、处理器(单核或多核)、存储器芯片、模拟芯片、数字芯片、图形芯片和/或MEMS设备。例如,第一半导体芯片可以是处理器、堆叠的存储/逻辑单元或多个堆叠的存储器芯片,并且第二半导体芯片可以是存储芯片或逻辑芯片。可以形成组合的其它示例性芯片包括微处理器、图形处理器、信号处理器、网络处理器、具有多个功能单元(诸如,一个或多个处理单元、图形单元、通信单元、信号处理单元、安全单元)的片上系统(SoC)、无线通信芯片和/或无线通信芯片组。术语“处理器”可指的是任何设备或设备的一部分,其处理来自寄存器和或存储器中的电子数据,以将该电子数据转换成可以被存储在寄存器和/或存储器中的其它电子数据。存储器芯片可以是例如静态随机存取存储器(SRAM)芯片和/或动态随机存取存储器(DRAM)芯片,和/或非易失性存储器芯片。无线通信芯片实现无线通信,以将数据传输至计算设备和从计算设备传输出。该术语并不是暗示关联的设备不包含任何电线,尽管在一些实施例中它们可能没有。无线通信芯片可以实施任何数量的无线标准或协议,包括但不限于,Wi-Fi(IEEE802.11系列)、WiMAX(IEEE802.16系列)、IEEE802.20、长期演进(LTE)、Ev-DO、HSPA+、HSDPA+、HSUPA+、EDGE、GSM、GPRS、CDMA、TDMA、DECT、蓝牙及其衍生,以及被指定为3G,4G,5G以及之外的任何其它无线协议。第一无线通信芯片可专用于较短范围无线通信,诸如Wi-Fi和蓝牙,而第二无线通信芯片可专用于较长范围无线通信,诸如,GPS、EDGE、GPRS、CDMA、WiMAX、LTE、Ev-DO等,且第一和第二通信芯片可形成通信组。在本发明的可替换实施例中,第一半导体芯片是硅光电设备,诸如,光检测芯片或激光器芯片,而第二半导体芯片是驱动器芯片或跨阻抗放大器芯片。
依据本发明的实施例的封装结构可包括任何类型的计算系统的部分,该计算系统例如是手持计算系统(例如,蜂窝电话、智能电话或音乐播放器)、移动计算系统(例如,笔记本电脑、上网本或平板电脑)、台式计算系统、服务器或超级计算机。封装结构可被安装到主板组件上,以集成到计算系统中。一般地,主板可包括任何合适类型的线路板、或能够在计算系统中设置于板上的一个或多个不同部件之间和设置于板上的不同部件和计算系统的其它连接的远程元件之间提供电通信的其它衬底。
相关领域的技术人员应当理解,本公开能够进行修改和变更,以取代在整个公开中显示和描述的各种组件。本说明书中提到的“一个实施例”或“实施例”表示结合该实施例描述的具体特征、结构、材料或特性是包括在本发明的至少一个实施例中,但并不一定表示它们存在于每一个实施例中。此外,实施例中所公开的具体特征、结构、材料或特性可以以任何适当的方式结合在一个或多个实施例中。可包括各种附加层和/或结构,和/或在其它实施例中可省略所述特征。
Claims (20)
1.一种设备,包括:
具有表面的第一半导体芯片,其中所述表面具有设置在所述表面上的第一组电互连区域和第二组电互连区域,
具有表面的第二半导体芯片,其中所述表面具有设置在所述表面上的电互连区域,并且其中所述第一半导体芯片的第一组电互连区域与所述第二半导体芯片的电互连区域电连接,
具有电互连区域的衬底,其中所述衬底的互连区域电连接到所述第一半导体芯片的第二组电互连区域,并且其中所述第二半导体芯片处于所述第一半导体芯片和所述衬底之间。
2.如权利要求1所述的设备,其中所述第一半导体芯片是激光器芯片或光电检测器芯片。
3.如权利要求1所述的设备,其中所述第二半导体芯片是跨阻抗放大器或激光器驱动器芯片。
4.如权利要求1所述的设备,其中所述第二半导体芯片是减薄的半导体芯片。
5.如权利要求1所述的设备,其中所述第二半导体芯片是高度在100μm与20μm之间的半导体芯片。
6.如权利要求1所述的设备,其中所述第一半导体芯片是处理器。
7.如权利要求1所述的设备,其中所述衬底是印刷电路板、封装衬底或主板。
8.如权利要求1所述的设备,其中所述第一半导体芯片的电互连区域利用焊料连接到所述衬底的电互连区域。
9.如权利要求1所述的设备,其中所述第一半导体芯片的电互连区域利用焊料连接到所述第二半导体芯片的电互连区域。
10.如权利要求1所述的设备,其中所述衬底包括紧邻所述第二半导体芯片的凹陷区域。
11.一种计算设备,包括:
主板;
安装在所述主板上的处理器,以及
激光器芯片组件,所述激光器芯片组件安装到所述主板上且通过所述主板与所述处理器电互连,其中所述激光器芯片组件包括:
具有表面的激光器芯片,其中所述表面具有设置在所述表面上的第一组电互连区域和第二组电互连区域,以及
具有表面的激光器驱动器芯片,其中所述表面具有设置在所述表面上的电互连区域,其中所述激光器芯片的第一组电互连区域电连接到所述激光器驱动器芯片的电互连区域,且其中所述激光器芯片的第二组电互连区域电连接到所述主板的电互连。
12.如权利要求11所述的设备,其中所述激光器驱动器芯片是减薄的半导体芯片。
13.如权利要求11所述的设备,其中所述激光器驱动器芯片是减薄的半导体芯片,且所述激光器驱动器芯片被减薄到80μm与40μm之间的高度。
14.如权利要求11所述的设备,其中所述激光器芯片的电互连区域利用焊料连接到所述衬底的电互连区域。
15.如权利要求11所述的设备,其中所述激光器芯片的电互连区域利用焊料连接到所述激光器驱动器芯片的电互连区域。
16.一种计算设备,包括:
主板;
安装在所述主板上的处理器,以及
光电检测器芯片组件,所述光电检测器芯片组件安装在所述主板上且通过所述主板与所述处理器电互连,其中所述光电检测器芯片组件包括:
具有表面的光电检测器芯片,其中所述表面具有设置在所述表面上的第一组电互连区域和第二组电互连区域,以及
具有表面的跨阻抗放大器芯片,其中所述表面具有设置在所述表面上的电互连区域,其中所述光电检测器芯片的第一组电互连区域电连接到所述跨阻抗放大器芯片的电互连区域,并且其中所述光电检测器芯片的第二组电互连区域电连接到所述主板的电连接。
17.如权利要求16所述的设备,其中所述跨阻抗放大器芯片是减薄的半导体芯片。
18.如权利要求16所述的设备,其中所述跨阻抗放大器芯片的高度在100μm与20μm之间。
19.如权利要求16所述的设备,其中所述光电检测器芯片的电互连区域利用焊料连接到所述衬底的电互连区域。
20.如权利要求16所述的设备,其中所述光电检测器芯片的电互连区域利用焊料连接到所述跨阻抗放大器芯片的电互连区域。
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