CN104035844A - Fault testing method and electronic device - Google Patents
Fault testing method and electronic device Download PDFInfo
- Publication number
- CN104035844A CN104035844A CN201310068101.8A CN201310068101A CN104035844A CN 104035844 A CN104035844 A CN 104035844A CN 201310068101 A CN201310068101 A CN 201310068101A CN 104035844 A CN104035844 A CN 104035844A
- Authority
- CN
- China
- Prior art keywords
- control chip
- code
- output
- input
- bios
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
Disclosed are a fault testing method and an electronic device. The electronic device comprises an input and output control chip of a first output port control module corresponding to a first output port of the electronic device and further comprises a platform control chip connected with the input and output control chip, and an operating system and a basic input and output system corresponding to the operating system are installed in the electronic device. The method includes receiving a starting-up signal after powering on the electronic device; controlling the platform control chip to be in a working condition; when controlling the chip to receive a BIOS (Basic Input/Output System) code corresponding to the basic input and output system through the platform, sending a first error code corresponding to the BIOS code to the input and output control chip; processing the first fault code to obtain a second fault code; sending the second fault code to a fault testing card connected with the first output port through the input and output control chip.
Description
Technical field
The present invention relates to field tests, relate in particular to a kind of fault testing method and electronic equipment.
Background technology
Fast development along with computer hardware technique, the price of computing machine is continuous decrease also, thereby computing machine is more and more universal, more user can complete work in every or carry out amusement with computing machine, and the fault that domestic consumer can not occur computer is effectively got rid of, the processing that relates in particular to hardware fault is more difficult, such as start is without the hardware fault that shows or cannot start shooting, therefore need after-sales service personnel to visit as user tests, also need mainboard to carry out fault detect carrying out computing machine development simultaneously.
In prior art, to the test of computer motherboard fault, need to adopt different test cards according to the difference of computer type, on mainboard, inserting test card tests, such as can use the test card of PCI and PCI-E1X on desk-top computer, on AIO, can use the test card of Mini PCI-E, for the product as Tiny and Thin Client, cannot on mainboard, insert test card and carry out main board failure detection.
But in the process of present inventor's invention technical scheme in realizing the embodiment of the present application, find that above-mentioned technology at least exists following technical matters:
Owing in prior art, the test of computer motherboard fault need to being adopted to different test cards according to the difference of computer type, on mainboard, inserting test card tests, or at all cannot be to not having the fault of the computer motherboard of test card slot to test, so, when existence is tested computer motherboard fault, test card is not general, or cannot be to the technical matters that does not have the fault of the computer motherboard of test card slot to test.
Summary of the invention
The embodiment of the present application is by providing a kind of fault testing method and electronic equipment, in order to solve in prior art, exist when computer motherboard fault is tested, test card is not general, or cannot be to the technical matters that does not have the fault of the computer motherboard of test card slot to test.
For solving the problems of the technologies described above, the embodiment of the present application provides a kind of fault testing method on the one hand, be applied in an electronic equipment, described electronic equipment comprises: the input and output control chip that includes the first output port control module corresponding with the first output port of described electronic equipment, and the platform control chip being connected with described input and output control chip, operating system and the Basic Input or Output System (BIOS) corresponding with described operating system are installed in described electronic equipment, and described method comprises:
After powering on to described electronic equipment, and described input and output control chip and described the first output port control module in running order, and described input and output control chip is when be connected with described the first output port, receives starting-up signal;
Based on described starting-up signal, control described platform control chip in running order;
When receiving bios code corresponding to described Basic Input or Output System (BIOS) by described platform control chip, the Fisrt fault code corresponding with described bios code sent to described input and output control chip;
By described input and output control chip, described Fisrt fault code is processed, obtained the second failure code, wherein, described the second failure code is the code that first output protocol corresponding with described the first output port mates;
Described fault test card by described input and output control chip, described the second failure code sent to the fault test card being connected with described the first output port, so that can test out at least one fault that described electronic equipment exists according to described the second failure code;
Further, described in receive starting-up signal, specifically comprise:
Whether detection has start pressing operation on the key of described electronic equipment;
When described start pressing operation being detected, respond described start pressing operation, generate described starting-up signal; Or
The described starting-up signal that receives, specifically comprises:
Detect the start control signal of the remote control equipment transmission of whether receiving that described electronic equipment is corresponding;
When receiving described start control signal, based on described start control signal, generate described starting-up signal;
Further, describedly when receiving bios code corresponding to described Basic Input or Output System (BIOS) by described platform control chip, the Fisrt fault code corresponding with described bios code sent to described input and output control chip, specifically comprises:
When receiving bios code corresponding to described Basic Input or Output System (BIOS) by described platform control chip, by described platform control chip, carry out described bios code, obtain the Fisrt fault code corresponding with described bios code;
Described Fisrt fault code is sent to described input and output control chip;
Further, when described the first output port is USB port, describedly by described input and output control chip, described Fisrt fault code is processed, is obtained the second failure code, be specially:
By described input and output control chip, described Fisrt fault code is carried out to Data Format Transform, obtain the second failure code, wherein, described the second failure code is the code that the universal serial bus protocol corresponding with described USB port mated;
Further, described the Fisrt fault code corresponding with described bios code sent to described input and output control chip, is specially:
Described platform control chip sends to described input and output control chip by serial peripheral interface bus or low-speed device bus by described Fisrt fault code;
Further, after bios code corresponding to described Basic Input or Output System (BIOS) is sent, described method also comprises:
By described the first output port control module, controlling described the first output port is connected with described platform control chip;
Further, or at described electronic equipment in shutdown during dormant state, described method also comprises:
By input and output control chip described in described the first output port module controls, be connected with described the first output port.
The embodiment of the present application also provides a kind of electronic equipment on the other hand, and described electronic equipment comprises:
Casing;
The first output port, is arranged on described casing;
Circuit main board;
Input and output control chip, is arranged on described circuit main board, is connected with described the first output port, and wherein, described input and output control chip comprises corresponding described the first output port control module;
Platform control chip, is arranged on described circuit main board, is connected with described input and output control chip;
Wherein, operating system and the Basic Input or Output System (BIOS) corresponding with described operating system are installed in described electronic equipment, after powering on to described electronic equipment, and described input and output control chip and described the first output port control module in running order, and described input and output control chip is when be connected with described the first output port, starting-up signal based on receiving, controls described platform control chip in running order;
And when receiving bios code corresponding to described Basic Input or Output System (BIOS) by described platform control chip, the Fisrt fault code corresponding with described bios code sent to described input and output control chip;
And by described input and output control chip, described Fisrt fault code is processed, obtain the second failure code, wherein, described the second failure code is the code that first output protocol corresponding with described the first output port mates;
And by described input and output control chip, described the second failure code is sent to the fault test card being connected with described the first output port, so that described fault test card can test out at least one fault that described electronic equipment exists according to described the second failure code;
Further, described equipment also comprises:
Detecting unit, for detection of whether there is start pressing operation on the key of described electronic equipment;
Response unit, is connected with described detecting unit, for when described start pressing operation being detected, responds described start pressing operation, generates described starting-up signal; Or
Detect the start control signal of the remote control equipment transmission of whether receiving that described electronic equipment is corresponding;
When receiving described start control signal, based on described start control signal, generate described starting-up signal;
Further, described platform control chip, specifically for:
When receiving bios code corresponding to described Basic Input or Output System (BIOS) by described platform control chip, described bios code based on receiving, by described platform control chip, carry out described bios code, obtain the Fisrt fault code corresponding with described bios code;
Described Fisrt fault code is sent to described input and output control chip;
Further, described input and output control chip, specifically for:
Described Fisrt fault code is carried out to Data Format Transform, obtain the second failure code, wherein, described the second failure code is the code that the universal serial bus protocol corresponding with described USB port mated;
Further, described platform control chip specifically also for:
By serial peripheral interface bus or low-speed device bus, described Fisrt fault code is sent to described input and output control chip;
Further, described the first output port control module, specifically for:
After bios code corresponding to described Basic Input or Output System (BIOS) is sent, controls described the first output port and be connected with described platform control chip;
Further, described the first output port control module, specifically also for:
Or, when shutting down dormant state, control described input and output control chip and be connected with described the first output port at described electronic equipment.
The application, by the one or more technical schemes that provide above, at least has following beneficial effect or advantage:
Because the application's technical scheme has adopted after powering on to described electronic equipment, receive starting-up signal, control described platform control chip in running order, when receiving bios code corresponding to described Basic Input or Output System (BIOS) by described platform control chip, the Fisrt fault code corresponding with described bios code sent to described input and output control chip, described Fisrt fault code is processed, obtain the second failure code, by described input and output control chip, described the second failure code is sent to the method for the fault test card being connected with described the first output port, can failure code corresponding to described bios code be outputed to described fault test card by described the first output port by input and output control chip, by a test card with the interface mating with described the first output port, can test like this main board failure of all types computing machine, while efficiently solving prior art exists computer motherboard fault is tested, test card is not general, or cannot be to the technical matters that does not have the fault of the computer motherboard of test card slot to test, realized and used a test card with the interface mating with described the first output port can test the technique effect of the main board failure of all types computing machine.
Accompanying drawing explanation
Fig. 1 is fault testing method process flow diagram in the embodiment of the present application;
Fig. 2 a is structural drawing when electronic equipment the first output port is connected with input and output control chip in the embodiment of the present application;
Fig. 2 b is structural drawing when electronic equipment the first output port is connected with platform control chip in the embodiment of the present application.
Embodiment
The embodiment of the present application is by providing a kind of fault testing method and electronic equipment, in order to solve in prior art, exist when computer motherboard fault is tested, test card is not general, or cannot be to the technical matters that does not have the fault of the computer motherboard of test card slot to test.
Technical scheme in the embodiment of the present application is for solving the problems of the technologies described above, and general thought is as follows:
After powering on to described electronic equipment, and described input and output control chip and described the first output port control module in running order, and described input and output control chip is when be connected with described the first output port, receives starting-up signal;
Based on described starting-up signal, control described platform control chip in running order;
When receiving bios code corresponding to described Basic Input or Output System (BIOS) by described platform control chip, the Fisrt fault code corresponding with described bios code sent to described input and output control chip;
By described input and output control chip, described Fisrt fault code is processed, obtained the second failure code, wherein, described the second failure code is the code that first output protocol corresponding with described the first output port mates;
Described fault test card by described input and output control chip, described the second failure code sent to the fault test card being connected with described the first output port, so that can test out at least one fault that described electronic equipment exists according to described the second failure code.
Visible, in technical scheme due to the application, adopted after powering on to described electronic equipment, receive starting-up signal, control described platform control chip in running order, when receiving bios code corresponding to described Basic Input or Output System (BIOS) by described platform control chip, the Fisrt fault code corresponding with described bios code sent to described input and output control chip, described Fisrt fault code is processed, obtain the second failure code, by described input and output control chip, described the second failure code is sent to the method for the fault test card being connected with described the first output port, can failure code corresponding to described bios code be outputed to described fault test card by described the first output port by input and output control chip, by a test card with the interface mating with described the first output port, can test like this main board failure of all types computing machine, while efficiently solving prior art exists computer motherboard fault is tested, test card is not general, or cannot be to the technical matters that does not have the fault of the computer motherboard of test card slot to test, realized and used a test card with the interface mating with described the first output port can test the technique effect of the main board failure of all types computing machine.
In order better to understand technique scheme, below in conjunction with Figure of description and concrete embodiment, technique scheme is described in detail.
Embodiment mono-
In embodiment mono-, a kind of fault testing method is provided, please refer to Fig. 1, be applied in an electronic equipment, described method comprises:
S101, after powering on to described electronic equipment, and described input and output control chip and described the first output port control module in running order, and described input and output control chip is when be connected with described the first output port, receives starting-up signal;
S102, based on described starting-up signal, controls described platform control chip in running order;
S103, when receiving bios code corresponding to described Basic Input or Output System (BIOS) by described platform control chip, sends to described input and output control chip by the Fisrt fault code corresponding with described bios code;
S104, processes described Fisrt fault code by described input and output control chip, obtains the second failure code, and wherein, described the second failure code is the code that first output protocol corresponding with described the first output port mates;
S105, described fault test card by described input and output control chip, described the second failure code sent to the fault test card being connected with described the first output port, so that can test out at least one fault that described electronic equipment exists according to described the second failure code.
Below in conjunction with the electronic equipment in the embodiment of the present application, the method in the embodiment of the present application is described.
In the embodiment of the present application, described electronic equipment can be a notebook computer, or a desk-top computer, please refer to Fig. 2 a, Fig. 2 b, and described electronic equipment comprises:
Casing 201;
The first output port 203, is arranged on described casing 201;
Circuit main board 202;
Input and output control chip 2023, is arranged on described circuit main board 202, is connected with described the first output port 203, and wherein, described input and output control chip 2023 comprises corresponding described the first output port control module 2023-1;
Platform control chip 2022, is arranged on described circuit main board 202, is connected with described input and output control chip 2023;
BIOS chip 2021, is arranged on described circuit main board 202, is connected with described platform control chip 2022, and Basic Input or Output System (BIOS) is installed.
To take above-mentioned electronic equipment as object lesson below, introduce in detail the specific implementation process of method in the embodiment of the present application:
Step S101 is specially: after powering on to described electronic equipment, and described input and output control chip 2023 and described the first output port control module 2023-1 in running order, and described input and output control chip 2023 is when be connected with described the first output port 203, as shown in Figure 2 a, receive starting-up signal, for example, when a desk-top computer is tested, after powering on to described desk-top computer, and described input and output control chip 2023 and described the first output port control module 2023-1 in running order, and described input and output control chip 2023 is when be connected with described the first output port 203, whether detection has start pressing operation on the key of described desk-top computer, when described start pressing operation being detected, respond described start pressing operation, generate described starting-up signal, or detect the start control signal whether receive that remote control equipment that described desk-top computer is corresponding sends, when receiving described start control signal, based on described start control signal, generate described starting-up signal.
After passing through step S101, the method in the embodiment of the present application enters step S102, is specially:
Based on described starting-up signal, control described platform control chip 2022 in running order, for example, after described desktop computer start, based on described starting-up signal, control described platform control chip 2022 in running order.
After passing through step S102, method in the embodiment of the present application enters step S103, be specially: when receiving bios code corresponding to described Basic Input or Output System (BIOS) by described platform control chip 2022, by described platform control chip 2022, carry out described bios code, obtain the Fisrt fault code corresponding with described bios code, described Fisrt fault code is sent to described input and output control chip 2023, in the embodiment of the present application implementation process, be specially, described platform control chip 2022 sends to described input and output control chip 2023 by serial peripheral interface bus or low-speed device bus by described Fisrt fault code.
After passing through step S103, the method in the embodiment of the present application enters step S104, is specially:
When described the first output port 203 is USB port, by 2023 pairs of described Fisrt fault codes of described input and output control chip, carry out Data Format Transform, obtain the second failure code, wherein, described the second failure code is the code that the universal serial bus protocol corresponding with described USB port mated.
After passing through step S104, the method in the embodiment of the present application enters step S105, is specially:
By described input and output control chip 2023, described the second failure code is sent to the fault test card being connected with described the first output port 203, so that described fault test card can test out at least one fault that described electronic equipment exists according to described the second failure code, while being 01 as the second failure code as described in showing on fault test card, represent that the processor of described desk-top computer is not by system testing.
After passing through step S105, method in the embodiment of the present application also comprises: after the bios code of described Basic Input or Output System (BIOS) 2021 correspondences is sent, on described circuit main board 202, need the hardware of system testing by after test, by described the first output port control module 2023-1, controlling described the first output port 203 is connected with described platform control chip 2022, as shown in Figure 2 b, further, at described electronic equipment in shutdown or during dormant state, by described the first output port control module 2023-1, controlling described input and output control chip 2023 is connected with described the first output port 203, as shown in Figure 2 a.
Technical scheme in above-mentioned the embodiment of the present application, at least has following technique effect or advantage:
Because the application's technical scheme has adopted after powering on to described electronic equipment, receive starting-up signal, control described platform control chip in running order, when receiving bios code corresponding to described Basic Input or Output System (BIOS) by described platform control chip, the Fisrt fault code corresponding with described bios code sent to described input and output control chip, described Fisrt fault code is processed, obtain the second failure code, by described input and output control chip, described the second failure code is sent to the method for the fault test card being connected with described the first output port, can failure code corresponding to described bios code be outputed to described fault test card by described the first output port by input and output control chip, by a test card with the interface mating with described the first output port, can test like this main board failure of all types computing machine, while efficiently solving prior art exists computer motherboard fault is tested, test card is not general, or cannot be to the technical matters that does not have the fault of the computer motherboard of test card slot to test, realized and used a test card with the interface mating with described the first output port can test the technique effect of the main board failure of all types computing machine.
Embodiment bis-
The embodiment of the present application also provides a kind of electronic equipment, please refer to Fig. 2 a, Fig. 2 b, and described electronic equipment comprises:
Casing 201;
The first output port 203, is arranged on described casing 201;
Circuit main board 202;
Input and output control chip 2023, is arranged on described circuit main board 202, is connected with described the first output port 203, and wherein, described input and output control chip 2023 comprises corresponding described the first output port control module 2023-1;
Platform control chip 2022, is arranged on described circuit main board 202, is connected with described input and output control chip 2023;
BIOS chip 2021, is arranged on described circuit main board 202, is connected with described platform control chip 2022;
Wherein, in described electronic equipment, be provided with operating system and with in described basic I/O chip 2021, the described Basic Input or Output System (BIOS) corresponding with described operating system is installed, after powering on to described electronic equipment, and described input and output control chip 2023 and described the first output port control module 2023-1 in running order, and described input and output control chip 2023 is when be connected with described the first output port 203, starting-up signal based on receiving, controls described platform control chip 2022 in running order;
And when receiving bios code corresponding to described Basic Input or Output System (BIOS) by described platform control chip 2022, the Fisrt fault code corresponding with described bios code sent to described input and output control chip 2022;
And process by 2023 pairs of described Fisrt fault codes of described input and output control chip, obtain the second failure code, wherein, described the second failure code is the code that first output protocol corresponding with described the first output port 203 mates;
And by described input and output control chip 2023, described the second failure code is sent to the fault test card being connected with described the first output port 203, so that described fault test card can test out at least one fault that described electronic equipment exists according to described the second failure code.
Below in conjunction with Fig. 2 a, Fig. 2 b is described in detail the each several part concrete function of the electronic equipment in the embodiment of the present application:
Described equipment also comprises:
Detecting unit, for detection of whether there is start pressing operation on the key of described electronic equipment;
Response unit, is connected with described detecting unit, for when described start pressing operation being detected, responds described start pressing operation, generates described starting-up signal; Or
Detect the start control signal of the remote control equipment transmission of whether receiving that described electronic equipment is corresponding;
When receiving described start control signal, based on described start control signal, generate described starting-up signal.
Described platform control chip 2022, specifically for:
When receiving bios code corresponding to described Basic Input or Output System (BIOS) by described platform control chip 2022, the described bios code based on receiving, carries out described bios code, obtains the Fisrt fault code corresponding with described bios code;
Described Fisrt fault code is sent to described input and output control chip 2023.
Described input and output control chip 2023, specifically for:
Described Fisrt fault code is carried out to Data Format Transform, obtain the second failure code, wherein, described the second failure code is the code that the universal serial bus protocol corresponding with described USB port mated.
Described platform control chip 2022 specifically also for:
By serial peripheral interface bus or low-speed device bus, described Fisrt fault code is sent to described input and output control chip 2023.
Described the first output port control module 2023-1, specifically for:
After bios code corresponding to described Basic Input or Output System (BIOS) is sent, controls described the first output port 203 and be connected with described platform control chip 2022.
Described the first output port control module 2023-1, specifically also for:
Or, when shutting down dormant state, control described input and output control chip 2023 and be connected with described the first output port 203 at described electronic equipment.
In order to allow those skilled in the art can understand better the electronic equipment in the embodiment of the present application, put up with the process that described electronic equipment is carried out to main board failure test and be described:
For example, a desk-top computer is carried out to main board failure test, detailed process is as follows:
First, after powering on to described desk-top computer, and described input and output control chip 2023 and described the first output port control module 2023-1 in running order, and described input and output control chip 2023 is when be connected with described the first output port 203, as shown in Figure 2 a, whether the detecting unit of described desk-top computer detects start pressing operation on the key of described desk-top computer, when described start pressing operation being detected, the response unit of described desk-top computer responds described start pressing operation, generates described starting-up signal; If described desk-top computer can be controlled by remote control equipment, detect the start control signal of the remote control equipment transmission of whether receiving that described desk-top computer is corresponding, when receiving described start control signal, based on described start control signal, generate described starting-up signal, and then based on described starting-up signal, control described platform control chip 2022 in running order;
Then, after described desktop computer start, based on described starting-up signal, control described platform control chip 2022 in running order;
Then, when described platform control chip 2022 receives the bios code of described BIOS chip 2021 correspondences, described platform control chip 2022 is carried out described bios code, obtain the Fisrt fault code corresponding with described bios code, described Fisrt fault code is sent to described input and output control chip 2023, in the embodiment of the present application implementation process, be specially, described platform control chip 2022 sends to described input and output control chip 2023 by serial peripheral interface bus or low-speed device bus by described Fisrt fault code;
Then, in the embodiment of the present application, the first output port 203 of described desk-top computer is USB port, when described the first output port 203 is USB port, 2023 pairs of described Fisrt fault codes of described input and output control chip carry out Data Format Transform, obtain the second failure code, wherein, described the second failure code is the code that the universal serial bus protocol corresponding with described USB port mated;
Then, described input and output control chip 2023 sends to described the second failure code on the fault test card being connected with described USB port, so that described fault test card can test out at least one fault that described electronic equipment exists according to described the second failure code, while being 01 as the second failure code as described in showing on fault test card, represent that the processor of described desk-top computer is not by system testing;
Finally, if the circuit main board of described desk-top computer 202 is by system testing, after the bios code of described BIOS chip 2021 correspondences is sent, that is to say and on described circuit main board 202, need the hardware that carries out system testing by after test, described the first output port control module 2023-1 controls described USB port and is connected with described platform control chip 2022, as shown in Figure 2 b, further, at described desk-top computer in shutdown or during dormant state, described the first output port control module 2023-1 controls described input and output control chip 2023 and is connected with described USB port 203, as shown in Figure 2 a.
Technical scheme in above-mentioned the embodiment of the present application, at least has following technique effect or advantage:
Because the application's technical scheme has adopted after powering on to described electronic equipment, receive starting-up signal, control described platform control chip in running order, when receiving bios code corresponding to described Basic Input or Output System (BIOS) by described platform control chip, the Fisrt fault code corresponding with described bios code sent to described input and output control chip, described Fisrt fault code is processed, obtain the second failure code, by described input and output control chip, described the second failure code is sent to the method for the fault test card being connected with described the first output port, can failure code corresponding to described bios code be outputed to described fault test card by described the first output port by input and output control chip, by a test card with the interface mating with described the first output port, can test like this main board failure of all types computing machine, while efficiently solving prior art exists computer motherboard fault is tested, test card is not general, or cannot be to the technical matters that does not have the fault of the computer motherboard of test card slot to test, realized and used a test card with the interface mating with described the first output port can test the technique effect of the main board failure of all types computing machine.
Although described the preferred embodiments of the present invention, once those skilled in the art obtain the basic creative concept of cicada, can make other change and modification to these embodiment.So claims are intended to all changes and the modification that are interpreted as comprising preferred embodiment and fall into the scope of the invention.
Obviously, those skilled in the art can carry out various changes and modification and not depart from the spirit and scope of the present invention the present invention.Like this, if within of the present invention these are revised and modification belongs to the scope of the claims in the present invention and equivalent technologies thereof, the present invention is also intended to comprise these changes and modification interior.
Claims (14)
1. a fault testing method, be applied in an electronic equipment, it is characterized in that, described electronic equipment comprises: the input and output control chip that includes the first output port control module corresponding with the first output port of described electronic equipment, and the platform control chip being connected with described input and output control chip, operating system and the Basic Input or Output System (BIOS) corresponding with described operating system are installed in described electronic equipment, and described method comprises:
After powering on to described electronic equipment, and described input and output control chip and described the first output port control module in running order, and described input and output control chip is when be connected with described the first output port, receives starting-up signal;
Based on described starting-up signal, control described platform control chip in running order;
When receiving bios code corresponding to described Basic Input or Output System (BIOS) by described platform control chip, the Fisrt fault code corresponding with described bios code sent to described input and output control chip;
By described input and output control chip, described Fisrt fault code is processed, obtained the second failure code, wherein, described the second failure code is the code that first output protocol corresponding with described the first output port mates;
Described fault test card by described input and output control chip, described the second failure code sent to the fault test card being connected with described the first output port, so that can test out at least one fault that described electronic equipment exists according to described the second failure code.
2. the method for claim 1, is characterized in that, described in receive starting-up signal, specifically comprise:
Whether detection has start pressing operation on the key of described electronic equipment;
When described start pressing operation being detected, respond described start pressing operation, generate described starting-up signal; Or
The described starting-up signal that receives, specifically comprises:
Detect the start control signal of the remote control equipment transmission of whether receiving that described electronic equipment is corresponding;
When receiving described start control signal, based on described start control signal, generate described starting-up signal.
3. the method for claim 1, it is characterized in that, describedly when receiving bios code corresponding to described Basic Input or Output System (BIOS) by described platform control chip, the Fisrt fault code corresponding with described bios code sent to described input and output control chip, specifically comprises:
When receiving bios code corresponding to described Basic Input or Output System (BIOS) by described platform control chip, by described platform control chip, carry out described bios code, obtain the Fisrt fault code corresponding with described bios code;
Described Fisrt fault code is sent to described input and output control chip.
4. the method for claim 1, is characterized in that, when described the first output port is USB port, describedly by described input and output control chip, described Fisrt fault code is processed, and obtains the second failure code, is specially:
By described input and output control chip, described Fisrt fault code is carried out to Data Format Transform, obtain the second failure code, wherein, described the second failure code is the code that the universal serial bus protocol corresponding with described USB port mated.
5. the method for claim 1, is characterized in that, described the Fisrt fault code corresponding with described bios code is sent to described input and output control chip, is specially:
Described platform control chip sends to described input and output control chip by serial peripheral interface bus or low-speed device bus by described Fisrt fault code.
6. the method as described in arbitrary claim in claim 1-5, is characterized in that, after bios code corresponding to described Basic Input or Output System (BIOS) is sent, described method also comprises:
By described the first output port control module, controlling described the first output port is connected with described platform control chip.
7. method as claimed in claim 6, is characterized in that, at described electronic equipment, in shutdown or during dormant state, described method also comprises:
By described the first output port control module, controlling described input and output control chip is connected with described the first output port.
8. an electronic equipment, is characterized in that, comprising:
Casing;
The first output port, is arranged on described casing;
Circuit main board;
Input and output control chip, is arranged on described circuit main board, is connected with described the first output port, and wherein, described input and output control chip comprises corresponding described the first output port control module;
Platform control chip, is arranged on described circuit main board, is connected with described input and output control chip;
Wherein, operating system and the Basic Input or Output System (BIOS) corresponding with described operating system are installed in described electronic equipment, after powering on to described electronic equipment, and described input and output control chip and described the first output port control module in running order, and described input and output control chip is when be connected with described the first output port, starting-up signal based on receiving, controls described platform control chip in running order;
And when receiving bios code corresponding to described Basic Input or Output System (BIOS) by described platform control chip, the Fisrt fault code corresponding with described bios code sent to described input and output control chip;
And by described input and output control chip, described Fisrt fault code is processed, obtain the second failure code, wherein, described the second failure code is the code that first output protocol corresponding with described the first output port mates;
And by described input and output control chip, described the second failure code is sent to the fault test card being connected with described the first output port, so that described fault test card can test out at least one fault that described electronic equipment exists according to described the second failure code.
9. equipment as claimed in claim 8, is characterized in that, described equipment also comprises:
Detecting unit, for detection of whether there is start pressing operation on the key of described electronic equipment;
Response unit, is connected with described detecting unit, for when described start pressing operation being detected, responds described start pressing operation, generates described starting-up signal; Or
Detect the start control signal of the remote control equipment transmission of whether receiving that described electronic equipment is corresponding;
When receiving described start control signal, based on described start control signal, generate described starting-up signal.
10. equipment as claimed in claim 8, is characterized in that, described platform control chip, specifically for:
When receiving bios code corresponding to described Basic Input or Output System (BIOS) by described platform control chip, the described bios code based on receiving, carries out described bios code, obtains the Fisrt fault code corresponding with described bios code;
Described Fisrt fault code is sent to described input and output control chip.
11. equipment as claimed in claim 8, is characterized in that, described input and output control chip, specifically for:
Described Fisrt fault code is carried out to Data Format Transform, obtain the second failure code, wherein, described the second failure code is the code that the universal serial bus protocol corresponding with described USB port mated.
12. equipment as claimed in claim 10, is characterized in that, described platform control chip specifically also for:
By serial peripheral interface bus or low-speed device bus, described Fisrt fault code is sent to described input and output control chip.
13. equipment as described in arbitrary claim in claim 8-12, is characterized in that, described the first output port control module, specifically for:
After bios code corresponding to described Basic Input or Output System (BIOS) is sent, controls described the first output port and be connected with described platform control chip.
14. equipment as claimed in claim 13, is characterized in that, described the first output port control module, specifically also for:
Or, when shutting down dormant state, control described input and output control chip and be connected with described the first output port at described electronic equipment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310068101.8A CN104035844A (en) | 2013-03-04 | 2013-03-04 | Fault testing method and electronic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310068101.8A CN104035844A (en) | 2013-03-04 | 2013-03-04 | Fault testing method and electronic device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104035844A true CN104035844A (en) | 2014-09-10 |
Family
ID=51466618
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310068101.8A Pending CN104035844A (en) | 2013-03-04 | 2013-03-04 | Fault testing method and electronic device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104035844A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106326043A (en) * | 2015-06-23 | 2017-01-11 | 联想(北京)有限公司 | USB based diagnosis device and method |
| CN106708675A (en) * | 2016-11-18 | 2017-05-24 | 广西大学 | Method for detecting faults before starting of computers |
| CN109117299A (en) * | 2017-06-23 | 2019-01-01 | 佛山市顺德区顺达电脑厂有限公司 | The error detecting device and its debugging method of server |
| CN109558324A (en) * | 2018-11-30 | 2019-04-02 | 无锡睿勤科技有限公司 | A kind of detection method and equipment |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5535330A (en) * | 1994-07-22 | 1996-07-09 | Dell Usa, L.P. | System and method for error location in printed wire assemblies by external power on self test (post) commands |
| CN1622048A (en) * | 2003-11-24 | 2005-06-01 | 神基科技股份有限公司 | Method and apparatus for displaying computer system debugging result |
| CN101364197A (en) * | 2008-10-17 | 2009-02-11 | 华硕电脑股份有限公司 | Exterior starting-up self-testing device applying to computer system and computer system thereof |
| CN101551766A (en) * | 2008-04-02 | 2009-10-07 | 微星科技股份有限公司 | Device and method for displaying BIOS error detecting code |
-
2013
- 2013-03-04 CN CN201310068101.8A patent/CN104035844A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5535330A (en) * | 1994-07-22 | 1996-07-09 | Dell Usa, L.P. | System and method for error location in printed wire assemblies by external power on self test (post) commands |
| CN1622048A (en) * | 2003-11-24 | 2005-06-01 | 神基科技股份有限公司 | Method and apparatus for displaying computer system debugging result |
| CN101551766A (en) * | 2008-04-02 | 2009-10-07 | 微星科技股份有限公司 | Device and method for displaying BIOS error detecting code |
| CN101364197A (en) * | 2008-10-17 | 2009-02-11 | 华硕电脑股份有限公司 | Exterior starting-up self-testing device applying to computer system and computer system thereof |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106326043A (en) * | 2015-06-23 | 2017-01-11 | 联想(北京)有限公司 | USB based diagnosis device and method |
| CN106708675A (en) * | 2016-11-18 | 2017-05-24 | 广西大学 | Method for detecting faults before starting of computers |
| CN109117299A (en) * | 2017-06-23 | 2019-01-01 | 佛山市顺德区顺达电脑厂有限公司 | The error detecting device and its debugging method of server |
| CN109558324A (en) * | 2018-11-30 | 2019-04-02 | 无锡睿勤科技有限公司 | A kind of detection method and equipment |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100377101C (en) | Method and apparatus for testing host computer board including interconnecting peripheries quickly | |
| CN104050061B (en) | A kind of Based PC Ie bus many master control board redundancies standby system | |
| CN107547234B (en) | Method and device for managing main board card and standby board card | |
| CN102402477A (en) | Chip with computer system environment information monitoring module and computer system | |
| CN104021060A (en) | BMC serial port debugging system and method | |
| CN102708034A (en) | Computer remote and local monitoring system based on CPU (central processing unit) with serial port function | |
| CN101599035A (en) | USB port proving installation and method | |
| US7378977B2 (en) | Current overload detecting system and method | |
| US20150067223A1 (en) | Hot swappable memory motherboard | |
| CN110764585B (en) | Universal independent BMC board card | |
| CN103164354A (en) | Electronic device with universal asynchronous receiving and sending device and input control method | |
| CN104035844A (en) | Fault testing method and electronic device | |
| US9665526B2 (en) | Implementing IO expansion cards | |
| CN102455965A (en) | Electronic device test system and method | |
| CN1244864C (en) | Information processing system with debug function on initializing and its method | |
| CN106708675A (en) | Method for detecting faults before starting of computers | |
| US9158609B2 (en) | Universal serial bus testing device | |
| CN106815088A (en) | server and its debugging method | |
| CN101377753A (en) | Accessory test device and method | |
| CN116627729A (en) | External connection cable, external connection cable in-place detection device, startup self-checking method and system | |
| US11334506B2 (en) | Interface connection device, system and method thereof | |
| US8874890B2 (en) | Server with plurality of network cards with remote restarting and wake-up functionality | |
| CN105068952A (en) | SD interface multiplexing apparatus and method and electronic device | |
| CN201583939U (en) | Debugging card device of serial peripheral interface | |
| CN107728721B (en) | Card slot, and method and device for positioning abnormal source |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20140910 |