CN101364197A - Exterior starting-up self-testing device applying to computer system and computer system thereof - Google Patents
Exterior starting-up self-testing device applying to computer system and computer system thereof Download PDFInfo
- Publication number
- CN101364197A CN101364197A CNA2008101667002A CN200810166700A CN101364197A CN 101364197 A CN101364197 A CN 101364197A CN A2008101667002 A CNA2008101667002 A CN A2008101667002A CN 200810166700 A CN200810166700 A CN 200810166700A CN 101364197 A CN101364197 A CN 101364197A
- Authority
- CN
- China
- Prior art keywords
- computer system
- self
- testing device
- starting
- display unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
The invention discloses an external boot-strap self-testing device applied to computer systems and a computer system thereof. The boot-strap self-testing device comprises a micro-controller and a display unit; wherein, the micro-controller is arranged on a mainboard of the computer system and is used for receiving a plurality of test codes generated when the computer system is started and for converting into a display signal; the display unit is connected to the micro-controller by a soft transmission line and is used for receiving display signal and displaying the test codes. The device has the advantages of adding the micro-controller on the mainboard and providing the small display unit connected with the micro-controller by the soft transmission line, which ensures that the small display unit is arranged at the outside of the computer system.
Description
Technical field
The present invention relates to a kind of starting-up self-testing (power on self test is called for short POST) device, and be particularly related to a kind of exterior starting-up self-testing device that is applied to computer system.
Background technology
In general, in the Basic Input or Output System (BIOS) on the motherboard (basic input output system is hereinafter to be referred as BIOS) self test program (self test program) is arranged.Central processing unit in start process (bootingprocedure) in the computer system can be carried out self test program (self testprogram) in order to the hardware fault situation in the detection computations machine system.If self test program can be performed smoothly and finish, represent all hardware in the computer system all can pass through test and regular event.Therefore, after start was finished, computer system can be written into operating system.Above-mentioned hardware fault can be storage failure, display card fault, chipset fault ... or the like.
Yet when if hardware fault takes place, computer system will crash (crash) and can't continue to carry out self test program in the process of carrying out self test program.At this moment, the user only can learn that computer system can't normal boot-strap, but can't learn which hardware breaks down.
Therefore, the deviser of computer system is developed and a starting-up self-testing (power on self test, be called for short POST) device, or is called error detection card (debug card), can insert in the bus of computer system, for example pci bus.When central processing unit when carrying out self test program, can produce specific test patterns (being called POSTcode), test patterns this is specific via pci bus is shown on the starting-up self-testing device.For instance, when carrying out memory test, self test program can produce one first test patterns and be shown in starting-up self-testing device; Finish smoothly in memory test and to proceed display card when test, self test program can produce one second test patterns and be shown in starting-up self-testing device.In like manner, when carrying out other hardware testings, self test program can produce corresponding test patterns and be shown in starting-up self-testing device.
Therefore, when crashing in the process generation hardware fault of carrying out self test program, the user can learn that hardware breaks down and and then eliminating in the computer system by the test patterns on the starting-up self-testing device.
Except the deviser of computer system can utilize starting-up self-testing device to come the fault of detection hardware, the user of player's level (power user) also can utilize starting-up self-testing device to adjust the usefulness of computer system.Because the user of player's level can carry out computer system the action of overclocking (over clocking) and superpressure (over voltage) usually, makes the usefulness of computer system reach ultimate attainment.
For instance, the user of player's level carries out start again after the overclocking action of storer, crash and starting-up self-testing device when showing first test patterns and when carrying out self test program, break down, the user of player's level can learn previous overclocking baulk, the frequency of storer must be reduced.Otherwise, supposing that self test program can be complete smoothly, the user of player's level can learn that previous overclocking moves successfully, and the frequency that can continue to attempt storer increases again.
Please refer to Fig. 1, it is depicted as the starting-up self-testing device of known interface card form.The starting-up self-testing device 10 of this type can insert in computer system bus, for example pci bus.Two seven-segment displaies of welding (7 segment display) 12,14 on the starting-up self-testing device are in order to show all test patterns.And when carrying out self test program, self test program can be exported various test patterns in regular turn by 80h port (port), and at this moment, starting-up self-testing device 10 can receive these test patterns and be shown on two seven-segment displaies.
Because computer system now all is to design in computer housing, and computer housing has more and more littler trend.The user must come case beating and observe in order to see the test patterns on the starting-up self-testing device.Sometimes, if insert too many interface card in the computer system, the shown test patterns of seven-segment display is blocked and can't be observed by other interface card possibly.
Please refer to Fig. 2, it is depicted as the known starting-up self-testing device that is integrated on the motherboard.Motherboard comprises a central processing unit (CPU) 100, north bridge chips (north bridge) 122, South Bridge chip (southbridge) 126, storer (memory) 140, a display chip (graphic chip) 130, one BIOS 150, a starting-up self-testing device 170 at least.Wherein, north bridge chips 122 is collectively referred to as chipset 120 with South Bridge chip 126.
Wherein, chipset 120 is connected to central processing unit 110, storer 140, display chip 130, a BIOS 150, a starting-up self-testing device 170.Wherein, starting-up self-testing device 170 be direct layout (layout) on motherboard, so can be directly on the motherboard weld two seven-segment displaies 172,174, in order to show all test patterns.Moreover, the pci bus of utilizing chipset 120 to provide is connected to starting-up self-testing device 170, when carrying out self test program, self test program can be exported various test patterns in regular turn by the 80h port, at this moment, the user can the Direct observation motherboard on the shown test patterns of seven-segment display 172,174.
Yet the user will observe seven-segment display 172,174 shown test patterns and still must open casing and just can observe.Moreover when the LED in the seven-segment display 172,174 damaged, the user can't change seven-segment display 172,174 very easily.Perhaps, the user does not know that seven-segment display 172,174 has damaged, causes the test patterns of user's read error and can't get rid of hardware fault in the computer system.
Summary of the invention
The present invention proposes a kind of starting-up self-testing device, can be applicable to a computer system, comprising: a microcontroller, be positioned on the motherboard of computer system, and a plurality of test patterns that produce during in order to the receiving computer system boot, and be converted into a shows signal; And a display unit is connected to microcontroller via a soft transmission line, in order to the reception shows signal, and shows these test patterns.
Moreover the present invention also proposes a kind of computer system, comprising: a chipset; One Basic Input or Output System (BIOS) is connected to chipset; One central processing unit is connected to chipset, and can carry out the self test program in the Basic Input or Output System (BIOS), to produce a plurality of test patterns; And a microcontroller is connected to chipset, in order to receive these test patterns and to be converted to a shows signal; Wherein, microcontroller can be connected to the outer display unit of computer system via a soft transmission line, makes display unit to show these test patterns according to shows signal.
The invention has the advantages that increases by a microcontroller on the motherboard, and provides a small display unit to utilize soft transmission line to be connected in microcontroller, makes small display unit be positioned at outside the computer system.
In order further to understand feature of the present invention and technology contents, Please consults following about detailed description of the present invention and accompanying drawing, yet accompanying drawing only provides reference and explanation, with Come the present invention is limited.
Description of drawings
Fig. 1 is depicted as the starting-up self-testing device of known interface card form.
Fig. 2 is depicted as the known starting-up self-testing device that is integrated on the motherboard.
Fig. 3 is depicted as the exterior starting-up self-testing device that the present invention is applied to computer system.
And the description of reference numerals in the above-mentioned accompanying drawing is as follows:
10 starting-up self-testing devices, 12,14 seven-segment displaies
100 motherboards, 110 central processing units
120 chipsets, 122 north bridge chips
126 South Bridge chips, 130 display chips
140 storeies, 150 BIOS
160 pci buss, 170 starting-up self-testing devices
172,174 seven-segment displaies
200 motherboards, 210 central processing units
220 chipsets, 222 north bridge chips
226 South Bridge chips, 230 display chips
240 storeies, 250 BIOS
The transmission line that 260 microcontrollers 265 are soft
280 small display unit
Embodiment
Please refer to Fig. 3, it is depicted as the exterior starting-up self-testing device that the present invention is applied to computer system.Wherein, the motherboard 200 of computer system comprises a central processing unit 210, north bridge chips 222, South Bridge chip 226, storer 240, a display chip 230, a BIOS 250, a microcontroller 260 at least.Wherein, north bridge chips 222 is collectively referred to as chipset 220 with South Bridge chip 226.
Wherein, chipset 220 is connected to central processing unit 210, storer 240, display chip 230, BIOS 250, microcontroller 260.According to embodiments of the invention, microcontroller 260 can be connected to small display unit 280, for example a liquid crystal display of computer system outside via a soft transmission line 265.
Moreover, during self test program in central processing unit 210 is carried out BIOS 250, various test patterns can be passed to microcontroller 260, and the display interface converting unit 262 in the microcontroller 260 can be converted to a shows signal with the various test patterns that receive and is passed to small display unit 280.Therefore, the test patterns that the user shows on the process of start can the small display unit 280 of Direct observation computer system outside, and do not need to open the shell of computer system.
By embodiments of the invention as can be known, exterior starting-up self-testing device of the present invention comprises: a microcontroller 260 and a small display unit 280, and microcontroller 260 is connected to small display unit 280 via a soft transmission line 265.Wherein, small display unit is positioned at outside the casing of computer system.Therefore, the test patterns that the user shows on the process of start can the small display unit 280 of Direct observation computer system outside, and do not need to open the shell of computer system.
Moreover, for a shows signal that allows microcontroller 260 produce can correctly be transmitted long distance to small display unit 280.Display interface converting unit 262 in the microcontroller 260 can be converted into test patterns compliance with system management bus (system management bus is called for short SMBus) or internal integration circuit (inter-integrated circuit, abbreviation I
2C) shows signal of specification.
The invention has the advantages that increases by a microcontroller on the motherboard, and provides a small display unit to utilize soft transmission line to be connected in microcontroller, makes small display unit be positioned at outside the computer system.In the process of computer system power-on, microcontroller can be shown in small display unit with receiving all test patterns, and the user does not need to open computer shell and promptly can be observed test patterns.
In sum; though the present invention with preferred embodiment openly as above; yet it is not in order to limit the present invention; any those of ordinary skills; without departing from the spirit and scope of the present invention; when can doing various changes and retouching, so protection scope of the present invention is as the criterion when looking the scope that claim defined of enclosing.
Claims (10)
1. a starting-up self-testing device can be applicable to a computer system, comprising:
One microcontroller is positioned on the motherboard of this computer system, a plurality of test patterns that produce when receiving this computer system power-on, and be converted into a shows signal; And
One display unit is connected to this microcontroller via a soft transmission line, in order to receiving this shows signal, and shows described a plurality of test patterns.
2. starting-up self-testing device as claimed in claim 1, wherein this display unit is positioned at this motherboard outside of this computer system.
3. starting-up self-testing device as claimed in claim 1, wherein this display unit is positioned at a casing outside of this computer system.
4. starting-up self-testing device as claimed in claim 1, wherein this shows signal meets a System Management Bus specification.
5. starting-up self-testing device as claimed in claim 1, wherein this shows signal meets an internal integration circuit specification.
6. starting-up self-testing device as claimed in claim 1, wherein this display unit is a LCD.
7. computer system comprises:
One chipset;
One Basic Input or Output System (BIOS) is connected to this chipset;
One central processing unit is connected to this chipset, and can carry out the self test program in this Basic Input or Output System (BIOS), to produce a plurality of test patterns; And
One microcontroller is connected to this chipset, in order to receive described a plurality of test patterns and to be converted to a shows signal;
Wherein, this microcontroller can be connected to the outer display unit of this computer system via a soft transmission line, makes this display unit to show described a plurality of test patterns according to this shows signal.
8. computer system as claimed in claim 7, wherein this shows signal meets a System Management Bus specification.
9. computer system as claimed in claim 7, wherein this shows signal meets an internal integration circuit specification.
10. computer system as claimed in claim 7, wherein this display unit is a LCD.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2008101667002A CN101364197A (en) | 2008-10-17 | 2008-10-17 | Exterior starting-up self-testing device applying to computer system and computer system thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2008101667002A CN101364197A (en) | 2008-10-17 | 2008-10-17 | Exterior starting-up self-testing device applying to computer system and computer system thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101364197A true CN101364197A (en) | 2009-02-11 |
Family
ID=40390573
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA2008101667002A Pending CN101364197A (en) | 2008-10-17 | 2008-10-17 | Exterior starting-up self-testing device applying to computer system and computer system thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101364197A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102541715A (en) * | 2010-12-07 | 2012-07-04 | 华硕电脑股份有限公司 | Mainboard and host system parameter display method |
| CN104035844A (en) * | 2013-03-04 | 2014-09-10 | 联想(北京)有限公司 | Fault testing method and electronic device |
| CN104050065A (en) * | 2014-06-13 | 2014-09-17 | 浪潮电子信息产业股份有限公司 | Method aiming at failure location in server startup and shutdown testing |
| CN106326043A (en) * | 2015-06-23 | 2017-01-11 | 联想(北京)有限公司 | USB based diagnosis device and method |
-
2008
- 2008-10-17 CN CNA2008101667002A patent/CN101364197A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102541715A (en) * | 2010-12-07 | 2012-07-04 | 华硕电脑股份有限公司 | Mainboard and host system parameter display method |
| CN104035844A (en) * | 2013-03-04 | 2014-09-10 | 联想(北京)有限公司 | Fault testing method and electronic device |
| CN104050065A (en) * | 2014-06-13 | 2014-09-17 | 浪潮电子信息产业股份有限公司 | Method aiming at failure location in server startup and shutdown testing |
| CN106326043A (en) * | 2015-06-23 | 2017-01-11 | 联想(北京)有限公司 | USB based diagnosis device and method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6438622B1 (en) | Multiprocessor system including a docking system | |
| US6321287B1 (en) | Console redirection for a computer system | |
| US20120159254A1 (en) | Debugging Apparatus for Computer System and Method Thereof | |
| US8171342B2 (en) | Device and method for outputting BIOS POST code | |
| TWI620061B (en) | Error detecting apparatus of server and error detecting method thereof | |
| US9058257B2 (en) | Persistent block storage attached to memory bus | |
| US7290128B2 (en) | Fault resilient boot method for multi-rail processors in a computer system by disabling processor with the failed voltage regulator to control rebooting of the processors | |
| TW201621657A (en) | Electronic device | |
| US20090132798A1 (en) | Electronic device and method for resuming from suspend-to-memory state thereof | |
| US12099609B2 (en) | Combination BIOS with A/B recovery | |
| CN101364197A (en) | Exterior starting-up self-testing device applying to computer system and computer system thereof | |
| US6732298B1 (en) | Nonmaskable interrupt workaround for a single exception interrupt handler processor | |
| US20080021695A1 (en) | ROM emulator and ROM testing method using the same | |
| US6996648B2 (en) | Generating notification that a new memory module has been added to a second memory slot in response to replacement of a memory module in a first memory slot | |
| CN109117299B (en) | Error detecting device and method for server | |
| US20070233995A1 (en) | Information processing apparatus and memory address space allocation method | |
| US20060080473A1 (en) | Apparatus for emulating memory and method thereof | |
| US20100100769A1 (en) | Power on self test device and computer system applying the same | |
| US5751641A (en) | Microprocessor memory test circuit and method | |
| US20180306861A1 (en) | Microprocessor interfaces | |
| CN105095000A (en) | BIOS restoring circuit | |
| KR102646630B1 (en) | Method to issue write protect commands on dynamic random-access memory(dram) cells in a system run-time environment | |
| CN101727329B (en) | Mainboard system, storage device for starting same and connector | |
| CN116107945A (en) | Device, method, system, equipment and medium for configuring bandwidth | |
| US6973607B2 (en) | Method and apparatus for testing electronic components |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C12 | Rejection of a patent application after its publication | ||
| RJ01 | Rejection of invention patent application after publication |
Open date: 20090211 |