CN103986206A - Charger current sharing method - Google Patents
Charger current sharing method Download PDFInfo
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- CN103986206A CN103986206A CN201410172486.7A CN201410172486A CN103986206A CN 103986206 A CN103986206 A CN 103986206A CN 201410172486 A CN201410172486 A CN 201410172486A CN 103986206 A CN103986206 A CN 103986206A
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Abstract
The invention provides a charger current sharing method. A microprocessor DSP, an FPGA module and at least two choppers are included, the microprocessor DSP is used for respectively detecting the actual output voltage of all the choppers in parallel connection and the output current of each chopper, and is used for driving a benchmark chopper through a PWM port, the rest of the choppers are correction choppers and are driven by the FPGA module, the microprocessor DSP is used for is used for comparing the actual output voltage and a preset charging voltage value to obtain the benchmark duty ratio of the benchmark chopper at the moment, and correcting values of all the correction choppers are obtained through current parameters of the benchmark chopper and current parameters of the correction choppers. According to the charger current sharing method, only one PSW port of the microprocessor DSP is used for driving the benchmark chopper, the rest of the correction choppers are driven by an FPGA, current sharing control among the choppers is easy, the calculated amount is small, and the effect is stable and reliable.
Description
Technical field
The present invention relates to a kind of current equalizing method, relate in particular to a kind of current equalizing method of charger.
Background technology
In the power electronic equipments such as high-voltage DC power supply, electric automobile charging pile and UPS, all need to have the DC-DC voltage conversion circuit that is referred to as chopper or Switching Power Supply to power to DC load; In the time that bearing power is larger, need multiple DC transfer circuit power output in parallel, to realize the power supply solution of low-cost high-efficiency energy, but in the equipment such as UPS, it is shared that the PWM of DSP sends out other Power Electronic Circuit such as ripple unit is rectified, the in the situation that of multiple chopper parallel connection, may there is the situation of PWM inadequate resource.
Conventionally use single chopper power supply or use the mode of multiple choppers to power in the occasion of giving powerful DC load power supply.The former need to use the jumbo power devices such as IGBT, and the cost of device itself and radiator is higher, so common product uses the latter more, the mode of multiple choppers is powered; And in the time of the operation of multiple choppers, even if the power device of each chopper is received identical switching signal, also can be due to the internal resistance difference of chopper, cause between chopper output current unbalanced; In the time that bearing power is larger, not current-sharing may make chopper heating or stress that electric current is larger exceed standard, and then damages the power device of chopper.
Summary of the invention
Technical problem to be solved by this invention is that need to provide one to take PWM resource very little, and can make the current equalizing method of the charger of output current equilibrium between multiple choppers.
To this, the invention provides a kind of current equalizing method of charger, comprise: microprocessor DSP, FPGA module and at least two choppers, described chopper is parallel with one another, and described microprocessor DSP detects respectively the actual output voltage of all choppers after parallel with one another and the output current of each chopper; Wherein, described microprocessor DSP drives a chopper by a PWM mouth, and the chopper that described microprocessor DSP drives is benchmark chopper; Remaining chopper is by FPGA module drive, and the chopper of described FPGA module drive is for proofreading and correct chopper; Described microprocessor DSP is collecting all chopper parallel connections afterwards after total actual output voltage, described actual output voltage and predefined charging voltage value are compared, regulate benchmark chopper duty ratio until actual output voltage be consistent with predefined charging voltage value, draw the now reference duty cycle of benchmark chopper, draw the correcting value of each correction chopper by the current parameters of benchmark chopper and the current parameters of correction chopper.
Described benchmark chopper is the chopper directly driving by the PWM mouth of microprocessor DSP; Described reference duty cycle is the duty ratio of benchmark chopper in the time that actual output voltage is consistent with predefined charging voltage; Except benchmark chopper, remaining chopper drives by FPGA module, these remaining chopper called afters are proofreaied and correct choppers, described correction chopper taking the current parameters of the output of benchmark chopper as basis, from microprocessor DSP, draw the correcting value of duty ratio.
Described FPGA module is preferably FPGA/CPLD, i.e. field programmable logic device and CPLD; Described chopper is a kind of Power Electronic Circuit for completing galvanic level conversion, this Power Electronic Circuit has a fixing input voltage, power device in Power Electronic Circuit can do periodic conducting and turn-off within a fixing cycle, and one-period is generally in 0.25 millisecond; The ratio that the time of the power device conducting of described chopper accounts for the total time of turn-on and turn-off in one-period is called as duty ratio, so the span of duty ratio is 0 ~ 1; By regulating the duty ratio of power device of chopper, the amplitude that can make output voltage is the numerical value that user wishes.
In existing general power-supply device, in the time adopting multiple chopper operation, in order to control multiple choppers, and ensure current-sharing, with regard to needing multiple control units to control different choppers, also need between control unit, carry out communication, transmit equal stream information; And if want multiple choppers to use a control unit, so, the PWM resource-constrained of DSP, is distributing to PWM resource after other power circuits such as PFC, can be for the PWM resource of chopper with regard to very possible deficiency.
The present invention controls multiple choppers by a PWM mouth of a microprocessor DSP, is specially described microprocessor DSP and drives a benchmark chopper by a PWM mouth, and remaining is proofreaied and correct the driving of chopper and is sent by FPGA module; The relation of chopper duty ratio respectively and between input voltage and output voltage determined by concrete circuit topology, and for instance, in reduction voltage circuit, the input voltage of chopper and output voltage and duty ratio are closed and be:
; In booster circuit, the pass of the input voltage of chopper and output voltage and duty ratio is:
; In formula, Vo is output voltage, and Vi is input voltage, and D is duty ratio.
Described microprocessor DSP is collecting all chopper parallel connections afterwards after total actual output voltage, compare with predefined charging voltage value, if actual output voltage is less than predefined charging voltage value, increase duty ratio, if actual output voltage is greater than predefined charging voltage value, reduce duty ratio, until actual output voltage conforms to predefined charging voltage value, obtain final reference duty cycle with this, described predefined charging voltage value is preferably 200 ~ 300V, this predefined charging voltage value also can change by the requirement of load, the scope of battery load 200 ~ 300V is for the good charging voltage value of battery load.
Further improvement of the present invention is, described current parameters is output current or inductive current.
Further improvement of the present invention is, the current parameters of the current parameters of benchmark chopper and correction chopper is compared, in the time that both current errors are greater than the current difference of permission, if the current parameters of proofreading and correct chopper is greater than the current parameters of benchmark chopper, the duty ratio of described correction chopper is reduced according to the amount of duty cycle adjustment of setting; If the current parameters of proofreading and correct chopper is less than the current parameters of benchmark chopper, the duty ratio of described correction chopper is strengthened according to the amount of duty cycle adjustment of setting; Behind interval, return at a fixed time the current parameters of the current parameters of benchmark chopper and correction chopper is compared.
Preferably, output current or the inductive current of the output current of benchmark chopper or inductive current and correction chopper are compared, in the time that both current errors are greater than the current difference of permission, be both the current error current parameters that is greater than benchmark chopper positive and negative 5% time, need to regulate the duty ratio of proofreading and correct chopper.Now, if the output current of correction chopper or inductive current are greater than output current or the inductive current of benchmark chopper, the duty ratio of described correction chopper is reduced to 10 nanoseconds; If the current parameters of proofreading and correct chopper is less than the current parameters of benchmark chopper, the duty ratio of described correction chopper is strengthened to 10 nanoseconds; Return after 0.1 ~ 0.5 second at interval the current parameters of the current parameters of benchmark chopper and correction chopper is compared, until the difference between the current parameters of benchmark chopper and the current parameters of correction chopper is less than the current difference of permission, with this, just calculate the correcting value of remaining chopper by microprocessor DSP and benchmark chopper, calculated the correcting value of proofreading and correct chopper.
Therefore, the present invention can control multiple choppers by of a microprocessor DSP PWM mouth, not only take the resource minimum of the PWM mouth of microprocessor DSP, and can make output current between multiple choppers reach balanced, implementation method is simply effective.
Further improvement of the present invention is, described correcting value is the regulated quantity of proofreading and correct the power device ON time of chopper, and the error control of the regulated quantity of this power device ON time is in certain positive and negative span.The positive and negative span of error of the regulated quantity of described power device ON time is preferably controlled as positive and negative 1 microsecond.
Further improvement of the present invention is, microcontroller DSP sends the corrected value for realizing the driving of proofreading and correct chopper by serial communication mode to FPGA module, and the corrected value that FPGA module is sent according to microprocessor DSP changes the duty ratio of proofreading and correct chopper.
Compared with prior art, beneficial effect of the present invention is: only use a PWM mouth of microprocessor DSP to drive a benchmark chopper, remaining is proofreaied and correct the driving of chopper and is sent by FPGA, microcontroller DSP sends the corrected value for realizing the driving of proofreading and correct chopper by serial communication mode to FPGA module, the corrected value that FPGA module is sent according to microprocessor DSP changes the duty ratio of proofreading and correct chopper, the PWM mouth resource minimum of shared like this microprocessor DSP, and sharing control between the chopper of charger is simple, amount of calculation is little, current-sharing effect stability is reliable.
Brief description of the drawings
Fig. 1 is the structural representation of an embodiment of the present invention;
Fig. 2 is the workflow diagram of the another kind of embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing, preferably embodiment of the present invention is described in further detail:
Embodiment 1:
As shown in Figure 1, this example provides a kind of current equalizing method of charger, comprise: microprocessor DSP, FPGA module and at least two choppers, described chopper is parallel with one another, and described microprocessor DSP detects respectively the actual output voltage of all choppers after parallel with one another and the output current of each chopper; Wherein, described microprocessor DSP drives a chopper by a PWM mouth, and the chopper that described microprocessor DSP drives is benchmark chopper; Remaining chopper is by FPGA module drive, and the chopper of described FPGA module drive is for proofreading and correct chopper; Described microprocessor DSP is collecting all chopper parallel connections afterwards after total actual output voltage, described actual output voltage and predefined charging voltage value are compared, regulate benchmark chopper duty ratio until actual output voltage be consistent with predefined charging voltage value, draw the now reference duty cycle of benchmark chopper, draw the correcting value of each correction chopper by the current parameters of benchmark chopper and the current parameters of correction chopper.
In Fig. 1, the n in n correction chopper is more than or equal to 1 natural number, represents that each proofreaies and correct chopper is to obtain correcting value separately by same correction calculation; Described FPGA/CPLD is FPGA module; Described benchmark chopper is of directly driving by the PWM mouth of microprocessor DSP for chopper as a reference; Described reference duty cycle is the duty ratio of benchmark chopper in the time that actual output voltage is consistent with predefined charging voltage; Except benchmark chopper, remaining chopper drives by FPGA module, these remaining chopper called afters are proofreaied and correct choppers, described correction chopper taking the current parameters of the output of benchmark chopper as basis, from microprocessor DSP, draw the correcting value of duty ratio.
Described FPGA module is preferably FPGA/CPLD, i.e. field programmable logic device and CPLD; Described chopper is a kind of Power Electronic Circuit for completing galvanic level conversion, this Power Electronic Circuit has a fixing input voltage, power device in Power Electronic Circuit can do periodic conducting and turn-off within a fixing cycle, and one-period is generally in 0.25 millisecond; The ratio that the time of the power device conducting of described chopper accounts for the total time of turn-on and turn-off in one-period is called as duty ratio, so the span of duty ratio is 0 ~ 1; By regulating the duty ratio of power device of chopper, the amplitude that can make output voltage is the numerical value that user wishes.
In existing general power-supply device, in the time adopting multiple chopper operation, in order to control multiple choppers, and ensure current-sharing, with regard to needing multiple control units to control different choppers, also need between control unit, carry out communication, transmit equal stream information; And if want multiple choppers to use a control unit, so, the PWM resource-constrained of DSP, is distributing to PWM resource after other power circuits such as PFC, can be for the PWM resource of chopper with regard to very possible deficiency.
This example is controlled multiple choppers by a PWM mouth of a microprocessor DSP, is specially described microprocessor DSP and drives a benchmark chopper by a PWM mouth, and remaining is proofreaied and correct the driving of chopper and is sent by FPGA module; The relation of chopper duty ratio respectively and between input voltage and output voltage determined by concrete circuit topology, and for instance, in reduction voltage circuit, the input voltage of chopper and output voltage and duty ratio are closed and be:
; In booster circuit, the pass of the input voltage of chopper and output voltage and duty ratio is:
; In formula, Vo is output voltage, and Vi is input voltage, and D is duty ratio.
Described microprocessor DSP is collecting all chopper parallel connections afterwards after total actual output voltage, compare with predefined charging voltage value, if actual output voltage is less than predefined charging voltage value, increase duty ratio, if actual output voltage is greater than predefined charging voltage value, reduce duty ratio, until actual output voltage conforms to predefined charging voltage value, obtain final reference duty cycle with this, described predefined charging voltage value is preferably 200 ~ 300V, this predefined charging voltage value also can change by the requirement of load, the scope of battery load 200 ~ 300V is for the good charging voltage value of battery load.
The further improvement of this example is, described current parameters is output current or inductive current.
Compared with prior art, this routine beneficial effect is: only use a PWM mouth of microprocessor DSP to drive a benchmark chopper, remaining is proofreaied and correct the driving of chopper and is sent by FPGA, microcontroller DSP sends the corrected value for realizing the driving of proofreading and correct chopper by serial communication mode to FPGA module, the corrected value that FPGA module is sent according to microprocessor DSP changes the duty ratio of proofreading and correct chopper, the PWM mouth resource minimum of shared like this microprocessor DSP, and sharing control between the chopper of charger is simple, amount of calculation is little, current-sharing effect stability is reliable, avoid generation current excessive, stress exceeds standard and damages the drawback of power device.
Embodiment 2:
On the basis of embodiment 1, this example compares the current parameters of the current parameters of benchmark chopper and correction chopper, in the time that both current errors are greater than the current difference of permission, if the current parameters of proofreading and correct chopper is greater than the current parameters of benchmark chopper, the duty ratio of described correction chopper is reduced according to the amount of duty cycle adjustment of setting; If the current parameters of proofreading and correct chopper is less than the current parameters of benchmark chopper, the duty ratio of described correction chopper is strengthened according to the amount of duty cycle adjustment of setting; Behind interval, return at a fixed time the current parameters of the current parameters of benchmark chopper and correction chopper is compared, circulation according to this.This routine workflow diagram as shown in Figure 2, in the time that both current errors are less than the current difference of permission, return behind interval at a fixed time the current parameters of the current parameters of benchmark chopper and correction chopper is compared, circulation according to this.
Preferably, output current or the inductive current of the output current of benchmark chopper or inductive current and correction chopper are compared, in the time that both current errors are greater than the current difference of permission, be both the current error current parameters that is greater than benchmark chopper positive and negative 5% time, need to regulate the duty ratio of proofreading and correct chopper.
Now, if the output current of correction chopper or inductive current are greater than output current or the inductive current of benchmark chopper, the duty ratio of described correction chopper is reduced to 10 nanoseconds; If the current parameters of proofreading and correct chopper is less than the current parameters of benchmark chopper, the duty ratio of described correction chopper is strengthened to 10 nanoseconds; Return after 0.1 ~ 0.5 second at interval the current parameters of the current parameters of benchmark chopper and correction chopper is compared, until the difference between the current parameters of benchmark chopper and the current parameters of correction chopper is less than the current difference of permission, with this, just calculate the correcting value of remaining chopper by microprocessor DSP and benchmark chopper, calculated the correcting value of proofreading and correct chopper.
That is to say, allow current difference be preferably benchmark chopper current parameters positive and negative 5% time, the amount of duty cycle adjustment of setting was preferably for 10 nanoseconds, regular time, interval was preferably 0.1 ~ 0.5 second, such setting is for most battery behavior and fixed, compatibility for rechargeable battery is very strong, and user also can be according to actual conditions
Therefore, this example can be controlled multiple choppers by of a microprocessor DSP PWM mouth, not only takies the resource minimum of the PWM mouth of microprocessor DSP, and can make output current between multiple choppers reach balanced, and implementation method is simply effective.
The further improvement of this example is, described correcting value is the regulated quantity of proofreading and correct the power device ON time of chopper, and the error control of the regulated quantity of this power device ON time is in certain positive and negative span.The positive and negative span of error of the regulated quantity of described power device ON time is preferably controlled as positive and negative 1 microsecond.
The further improvement of this example is, microcontroller DSP sends the corrected value for realizing the driving of proofreading and correct chopper by serial communication mode to FPGA module, and the corrected value that FPGA module is sent according to microprocessor DSP changes the duty ratio of proofreading and correct chopper.
Embodiment 3:
On the basis of embodiment 1 or embodiment 2, this example is passed through BUCK circuit from bus power taking in a UPS, and charges to battery.Because UPS is the system with N line, charger is divided into just organizes charger and negative two groups of the chargers of organizing, just organize charger and bearing group charger and all having two chargers by BUCK the electric circuit constitute, called after first is just being organized charger respectively, second is just organizing charger, first negative group of charger and second negative group of charger, in the time that charger moves, the first PWM mouth of just organizing charger and first negative group of charger sends through a PWM mouth of microprocessor DSP after driving and being calculated by microprocessor DSP, the second PWM mouth of just organizing charger and second negative group of charger drives to be proofreaied and correct by the bearing calibration described in embodiment 1 or embodiment 2, this corrected value is provided by FPGA module.Prove by experiment, find that this routine current-sharing is respond well.
Above content is in conjunction with concrete preferred implementation further description made for the present invention, can not assert that specific embodiment of the invention is confined to these explanations.For general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, can also make some simple deduction or replace, all should be considered as belonging to protection scope of the present invention.
Claims (10)
1. the current equalizing method of a charger, it is characterized in that, comprise: microprocessor DSP, FPGA module and at least two choppers, described chopper is parallel with one another, and described microprocessor DSP detects respectively the actual output voltage of all choppers after parallel with one another and the output current of each chopper; Wherein, described microprocessor DSP drives a chopper by a PWM mouth, and the chopper that described microprocessor DSP drives is benchmark chopper; Remaining chopper is by FPGA module drive, and the chopper of described FPGA module drive is for proofreading and correct chopper; Described microprocessor DSP is collecting all chopper parallel connections afterwards after total actual output voltage, described actual output voltage and predefined charging voltage value are compared, regulate benchmark chopper duty ratio until actual output voltage be consistent with predefined charging voltage value, draw the now reference duty cycle of benchmark chopper, draw the correcting value of each correction chopper by the current parameters of benchmark chopper and the current parameters of correction chopper.
2. the current equalizing method of charger according to claim 1, is characterized in that, described current parameters is output current or inductive current.
3. the current equalizing method of charger according to claim 1 and 2, it is characterized in that, the current parameters of the current parameters of benchmark chopper and correction chopper is compared, in the time that both current errors are greater than the current difference of permission, if the current parameters of proofreading and correct chopper is greater than the current parameters of benchmark chopper, the duty ratio of described correction chopper is reduced according to the amount of duty cycle adjustment of setting; If the current parameters of proofreading and correct chopper is less than the current parameters of benchmark chopper, the duty ratio of described correction chopper is strengthened according to the amount of duty cycle adjustment of setting; Behind interval, return at a fixed time the current parameters of the current parameters of benchmark chopper and correction chopper is compared.
4. the current equalizing method of charger according to claim 3, is characterized in that, described amount of duty cycle adjustment was set as for 10 nanoseconds.
5. the current equalizing method of charger according to claim 3, is characterized in that, described regular time is spaced apart 0.1 ~ 0.5 second.
6. the current equalizing method of charger according to claim 3, is characterized in that, described predefined charging voltage value is 200 ~ 300V.
7. the current equalizing method of charger according to claim 3, is characterized in that, the current difference of described permission be benchmark chopper current parameters positive and negative 5%.
8. the current equalizing method of charger according to claim 7, is characterized in that, described correcting value is the regulated quantity of power device ON time of proofreading and correct chopper, and the error control of this regulated quantity is in certain positive and negative span.
9. the current equalizing method of charger according to claim 8, is characterized in that, the positive and negative span of error of the regulated quantity of described power device ON time is positive and negative 1 microsecond.
10. the current equalizing method of charger according to claim 8, it is characterized in that, microcontroller DSP sends the corrected value for realizing the driving of proofreading and correct chopper by serial communication mode to FPGA module, and the corrected value that FPGA module is sent according to microprocessor DSP changes the duty ratio of proofreading and correct chopper.
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| CN201410172486.7A CN103986206B (en) | 2014-04-25 | 2014-04-25 | A kind of current equalizing method of charger |
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| CN201410172486.7A CN103986206B (en) | 2014-04-25 | 2014-04-25 | A kind of current equalizing method of charger |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109980716A (en) * | 2019-02-01 | 2019-07-05 | 惠州汇能精电科技有限公司 | The equal current charge control method of multiphase |
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| CN103687227A (en) * | 2013-12-06 | 2014-03-26 | 彩虹集团公司 | LED paralleled current sharing power unit |
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| US20080204098A1 (en) * | 2007-02-23 | 2008-08-28 | Jaber Abu Qahouq | Current sharing for multiphase power conversion |
| CN103687227A (en) * | 2013-12-06 | 2014-03-26 | 彩虹集团公司 | LED paralleled current sharing power unit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109980716A (en) * | 2019-02-01 | 2019-07-05 | 惠州汇能精电科技有限公司 | The equal current charge control method of multiphase |
| CN109980716B (en) * | 2019-02-01 | 2023-06-09 | 惠州汇能精电科技有限公司 | Multi-phase current sharing charging control method |
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