CN103986206B - A kind of current equalizing method of charger - Google Patents
A kind of current equalizing method of charger Download PDFInfo
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- CN103986206B CN103986206B CN201410172486.7A CN201410172486A CN103986206B CN 103986206 B CN103986206 B CN 103986206B CN 201410172486 A CN201410172486 A CN 201410172486A CN 103986206 B CN103986206 B CN 103986206B
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Abstract
The invention provides a kind of current equalizing method of charger, comprise: microprocessor DSP, FPGA module and at least two choppers, described microprocessor DSP detect respectively all choppers parallel with one another after actual output voltage and the output current of each chopper; Described microprocessor DSP drives a benchmark chopper by a PWM mouth; Remaining chopper for correcting chopper, and is driven by FPGA module; Actual output voltage and the charging voltage value preset compare by described microprocessor DSP, draw the reference duty cycle of now benchmark chopper, show that each corrects the correcting value of chopper by the current parameters of benchmark chopper and the current parameters of correction chopper.The present invention only uses microprocessor DSP PWM mouth to drive a benchmark chopper, and remaining corrects driving of chopper and is sent by FPGA, and sharing control between chopper is simple, and amount of calculation is little, and effect stability is reliable.
Description
Technical field
The present invention relates to a kind of current equalizing method, particularly relate to a kind of current equalizing method of charger.
Background technology
In the power electronic equipments such as high-voltage DC power supply, electric automobile charging pile and UPS, all need the DC-DC voltage conversion circuit being referred to as chopper or Switching Power Supply power to DC load; When bearing power is larger, need multiple DC transfer circuit Parallel opertation power, to realize the powering solution of low-cost high-efficiency energy, but in the equipment such as UPS, the PWM of DSP sends out shared by other Power Electronic Circuit such as ripple unit is rectified, when multiple chopper parallel connection, the situation of PWM inadequate resource may be there is.
Usually use single chopper in the occasion of powering to powerful DC load or use the mode of multiple chopper to power.The former needs to use the jumbo power devices such as IGBT, and the cost of device itself and radiator is higher, so common product many uses the latter, namely the mode of multiple chopper is powered; And when multiple chopper runs, even if the power device of each chopper receives identical switching signal, also can be different due to the internal resistance of chopper, cause output current between chopper unbalanced; When bearing power is larger, the larger chopper of electric current may be made to generate heat for not current-sharing or stress exceeds standard, and then damages the power device of chopper.
Summary of the invention
Technical problem to be solved by this invention is that to need to provide one to take PWM resource very little, and can make the current equalizing method of the charger of output current equilibrium between multiple chopper.
To this, the invention provides a kind of current equalizing method of charger, comprise: microprocessor DSP, FPGA module and at least two choppers, described chopper is parallel with one another, described microprocessor DSP detect respectively all choppers parallel with one another after actual output voltage and the output current of each chopper; Wherein, described microprocessor DSP drives a chopper by a PWM mouth, and the chopper that described microprocessor DSP drives is benchmark chopper; Remaining chopper is driven by FPGA module, and the chopper that described FPGA module drives is for correcting chopper; Described microprocessor DSP is after collecting all chopper parallel connections actual output voltage total afterwards, described actual output voltage and the charging voltage value preset are compared, regulate the duty ratio of benchmark chopper until actual output voltage is consistent with the charging voltage value preset, draw the reference duty cycle of now benchmark chopper, show that each corrects the correcting value of chopper by the current parameters of benchmark chopper and the current parameters of correction chopper.
Described benchmark chopper is directly carry out by the PWM mouth of microprocessor DSP a chopper driving; Described reference duty cycle is the duty ratio of benchmark chopper when actual output voltage is consistent with the charging voltage preset; Except benchmark chopper, remaining chopper is driven by FPGA module, these remaining chopper called afters correct choppers, described correction chopper based on the current parameters of the output of benchmark chopper, from microprocessor DSP, draw the correcting value of duty ratio.
Described FPGA module is preferably FPGA/CPLD, i.e. field programmable logic device and CPLD; Described chopper is a kind of Power Electronic Circuit for completing galvanic level conversion, this Power Electronic Circuit has a fixing input voltage, power device in Power Electronic Circuit can do periodic conducting and turn off within fixing cycle, and one-period is generally within 0.25 millisecond; The time of the power device conducting of described chopper accounts for the ratio of the total time of turn-on and turn-off in one-period and is called as duty ratio, so the span of duty ratio is 0 ~ 1; By regulating the duty ratio of the power device of chopper, the amplitude of output voltage can be made to be the numerical value that user wishes.
In existing general power-supply device, when adopting multiple chopper to run, in order to control multiple chopper, and ensureing current-sharing, just needing multiple control unit to control different choppers, also needing to carry out communication between control unit, transmit equal stream information; And if want to use a control unit to multiple chopper, so, the PWM resource-constrained of DSP, by PWM Resourse Distribute to other power circuits such as PFC after, can be just very possible not enough for the PWM resource of chopper.
The present invention controls multiple chopper by a PWM mouth of a microprocessor DSP, is specially described microprocessor DSP and drives a benchmark chopper by a PWM mouth, and remaining driving correcting chopper is sent by FPGA module; The relation of chopper duty ratio respectively and between input voltage and output voltage is determined by concrete circuit topology, and for example, in reduction voltage circuit, the input voltage of chopper and output voltage and duty cycle relationship are:
; In booster circuit, the pass of the input voltage of chopper and output voltage and duty ratio is:
; In formula, Vo is output voltage, and Vi is input voltage, and D is duty ratio.
Described microprocessor DSP is after collecting all chopper parallel connections actual output voltage total afterwards, compare with the charging voltage value preset, if actual output voltage is less than the charging voltage value preset, increase duty ratio, if actual output voltage is greater than the charging voltage value preset, reduce duty ratio, until actual output voltage conforms to the charging voltage value preset, final reference duty cycle is obtained with this, the described charging voltage value preset is preferably 200 ~ 300V, this charging voltage value preset also can change by the requirement of load, the scope of cell performance load 200 ~ 300V is for the good charging voltage value of cell performance load.
Further improvement of the present invention is, described current parameters is output current or inductive current.
Further improvement of the present invention is, the current parameters of the current parameters of benchmark chopper and correction chopper is compared, when both current errors are greater than the current difference of permission, if the current parameters correcting chopper is greater than the current parameters of benchmark chopper, then the amount of duty cycle adjustment of the duty ratio of described correction chopper according to setting is reduced; If the current parameters correcting chopper is less than the current parameters of benchmark chopper, then the amount of duty cycle adjustment of the duty ratio of described correction chopper according to setting is strengthened; Return behind interval at a fixed time and the current parameters of benchmark chopper and the current parameters of correction chopper are compared.
Preferably, the output current of the output current of benchmark chopper or inductive current and correction chopper or inductive current are compared, when both current errors are greater than the current difference of permission, namely, when both current errors are greater than positive and negative 5% of the current parameters of benchmark chopper, need to regulate the duty ratio correcting chopper.Now, if the output current of correction chopper or inductive current are greater than output current or the inductive current of benchmark chopper, then the duty ratio of described correction chopper was reduced for 10 nanoseconds; If the current parameters correcting chopper is less than the current parameters of benchmark chopper, then the duty ratio of described correction chopper was strengthened for 10 nanoseconds; Return after 0.1 ~ 0.5 second at interval and the current parameters of benchmark chopper and the current parameters of correction chopper are compared, until the difference between the current parameters of benchmark chopper and the current parameters correcting chopper is less than the current difference of permission, with this, just calculate the correcting value of remaining chopper by microprocessor DSP and benchmark chopper, namely calculate the correcting value correcting chopper.
Therefore, the present invention can control multiple chopper by of a microprocessor DSP PWM mouth, the resource not only taking the PWM mouth of microprocessor DSP is minimum, and output current between multiple chopper can be made to reach balanced, and implementation method is simply effective.
Further improvement of the present invention is, described correcting value is the regulated quantity of the power device ON time correcting chopper, and the control errors of the regulated quantity of this power device ON time is in certain positive and negative span.The positive and negative span of error of the regulated quantity of described power device ON time preferably controls as positive and negative 1 microsecond.
Further improvement of the present invention is, microcontroller DSP sends the corrected value of the driving for realizing correction chopper to FPGA module by serial communication mode, the corrected value that FPGA module sends according to microprocessor DSP changes the duty ratio correcting chopper.
Compared with prior art, beneficial effect of the present invention is: a PWM mouth of a use microprocessor DSP drives a benchmark chopper, remaining driving correcting chopper is sent by FPGA, microcontroller DSP sends the corrected value of the driving for realizing correction chopper to FPGA module by serial communication mode, the corrected value that FPGA module sends according to microprocessor DSP changes the duty ratio correcting chopper, the PWM mouth resource of microprocessor DSP shared is like this minimum, and sharing control between the chopper of charger is simple, amount of calculation is little, current-sharing effect stability is reliable.
Accompanying drawing explanation
Fig. 1 is the structural representation of an embodiment of the present invention;
Fig. 2 is the workflow diagram of the another kind of embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing, preferably embodiment of the present invention is described in further detail:
Embodiment 1:
As shown in Figure 1, this example provides a kind of current equalizing method of charger, comprise: microprocessor DSP, FPGA module and at least two choppers, described chopper is parallel with one another, described microprocessor DSP detect respectively all choppers parallel with one another after actual output voltage and the output current of each chopper; Wherein, described microprocessor DSP drives a chopper by a PWM mouth, and the chopper that described microprocessor DSP drives is benchmark chopper; Remaining chopper is driven by FPGA module, and the chopper that described FPGA module drives is for correcting chopper; Described microprocessor DSP is after collecting all chopper parallel connections actual output voltage total afterwards, described actual output voltage and the charging voltage value preset are compared, regulate the duty ratio of benchmark chopper until actual output voltage is consistent with the charging voltage value preset, draw the reference duty cycle of now benchmark chopper, show that each corrects the correcting value of chopper by the current parameters of benchmark chopper and the current parameters of correction chopper.
In Fig. 1, the n-th n corrected in chopper be more than or equal to 1 natural number, representing that each corrects chopper is obtain respective correcting value by same correction calculation; Described FPGA/CPLD is FPGA module; Described benchmark chopper be directly carry out driving by the PWM mouth of microprocessor DSP one for chopper as a reference; Described reference duty cycle is the duty ratio of benchmark chopper when actual output voltage is consistent with the charging voltage preset; Except benchmark chopper, remaining chopper is driven by FPGA module, these remaining chopper called afters correct choppers, described correction chopper based on the current parameters of the output of benchmark chopper, from microprocessor DSP, draw the correcting value of duty ratio.
Described FPGA module is preferably FPGA/CPLD, i.e. field programmable logic device and CPLD; Described chopper is a kind of Power Electronic Circuit for completing galvanic level conversion, this Power Electronic Circuit has a fixing input voltage, power device in Power Electronic Circuit can do periodic conducting and turn off within fixing cycle, and one-period is generally within 0.25 millisecond; The time of the power device conducting of described chopper accounts for the ratio of the total time of turn-on and turn-off in one-period and is called as duty ratio, so the span of duty ratio is 0 ~ 1; By regulating the duty ratio of the power device of chopper, the amplitude of output voltage can be made to be the numerical value that user wishes.
In existing general power-supply device, when adopting multiple chopper to run, in order to control multiple chopper, and ensureing current-sharing, just needing multiple control unit to control different choppers, also needing to carry out communication between control unit, transmit equal stream information; And if want to use a control unit to multiple chopper, so, the PWM resource-constrained of DSP, by PWM Resourse Distribute to other power circuits such as PFC after, can be just very possible not enough for the PWM resource of chopper.
This example controls multiple chopper by a PWM mouth of a microprocessor DSP, is specially described microprocessor DSP and drives a benchmark chopper by a PWM mouth, and remaining driving correcting chopper is sent by FPGA module; The relation of chopper duty ratio respectively and between input voltage and output voltage is determined by concrete circuit topology, and for example, in reduction voltage circuit, the input voltage of chopper and output voltage and duty cycle relationship are:
; In booster circuit, the pass of the input voltage of chopper and output voltage and duty ratio is:
; In formula, Vo is output voltage, and Vi is input voltage, and D is duty ratio.
Described microprocessor DSP is after collecting all chopper parallel connections actual output voltage total afterwards, compare with the charging voltage value preset, if actual output voltage is less than the charging voltage value preset, increase duty ratio, if actual output voltage is greater than the charging voltage value preset, reduce duty ratio, until actual output voltage conforms to the charging voltage value preset, final reference duty cycle is obtained with this, the described charging voltage value preset is preferably 200 ~ 300V, this charging voltage value preset also can change by the requirement of load, the scope of cell performance load 200 ~ 300V is for the good charging voltage value of cell performance load.
The further improvement of this example is, described current parameters is output current or inductive current.
Compared with prior art, the beneficial effect of this example is: a PWM mouth of a use microprocessor DSP drives a benchmark chopper, remaining driving correcting chopper is sent by FPGA, microcontroller DSP sends the corrected value of the driving for realizing correction chopper to FPGA module by serial communication mode, the corrected value that FPGA module sends according to microprocessor DSP changes the duty ratio correcting chopper, the PWM mouth resource of microprocessor DSP shared is like this minimum, and sharing control between the chopper of charger is simple, amount of calculation is little, current-sharing effect stability is reliable, avoid generation current excessive, stress exceeds standard and damages the drawback of power device.
Embodiment 2:
On the basis of embodiment 1, the current parameters of the current parameters of benchmark chopper and correction chopper compares by this example, when both current errors are greater than the current difference of permission, if the current parameters correcting chopper is greater than the current parameters of benchmark chopper, then the amount of duty cycle adjustment of the duty ratio of described correction chopper according to setting is reduced; If the current parameters correcting chopper is less than the current parameters of benchmark chopper, then the amount of duty cycle adjustment of the duty ratio of described correction chopper according to setting is strengthened; Return behind interval at a fixed time and the current parameters of benchmark chopper and the current parameters of correction chopper are compared, circulate according to this.The workflow diagram of this example as shown in Figure 2, when both current errors are less than the current difference of permission, return behind interval at a fixed time and compares the current parameters of benchmark chopper and the current parameters of correction chopper, circulate according to this.
Preferably, the output current of the output current of benchmark chopper or inductive current and correction chopper or inductive current are compared, when both current errors are greater than the current difference of permission, namely, when both current errors are greater than positive and negative 5% of the current parameters of benchmark chopper, need to regulate the duty ratio correcting chopper.
Now, if the output current of correction chopper or inductive current are greater than output current or the inductive current of benchmark chopper, then the duty ratio of described correction chopper was reduced for 10 nanoseconds; If the current parameters correcting chopper is less than the current parameters of benchmark chopper, then the duty ratio of described correction chopper was strengthened for 10 nanoseconds; Return after 0.1 ~ 0.5 second at interval and the current parameters of benchmark chopper and the current parameters of correction chopper are compared, until the difference between the current parameters of benchmark chopper and the current parameters correcting chopper is less than the current difference of permission, with this, just calculate the correcting value of remaining chopper by microprocessor DSP and benchmark chopper, namely calculate the correcting value correcting chopper.
That is, when the current difference allowed is preferably positive and negative 5% of the current parameters of benchmark chopper, the amount of duty cycle adjustment of setting was preferably for 10 nanoseconds, fixed time interval is preferably 0.1 ~ 0.5 second, such setting is fixed for most battery behavior, compatibility for rechargeable battery is very strong, and user also can according to actual conditions
Therefore, this example can control multiple chopper by of a microprocessor DSP PWM mouth, and the resource not only taking the PWM mouth of microprocessor DSP is minimum, and output current between multiple chopper can be made to reach balanced, and implementation method is simply effective.
The further improvement of this example is, described correcting value is the regulated quantity of the power device ON time correcting chopper, and the control errors of the regulated quantity of this power device ON time is in certain positive and negative span.The positive and negative span of error of the regulated quantity of described power device ON time preferably controls as positive and negative 1 microsecond.
The further improvement of this example is, microcontroller DSP sends the corrected value of the driving for realizing correction chopper to FPGA module by serial communication mode, the corrected value that FPGA module sends according to microprocessor DSP changes the duty ratio correcting chopper.
Embodiment 3:
On the basis of embodiment 1 or embodiment 2, this example in a UPS by BUCK circuit from bus power taking, and to charge to battery.Due to the system that UPS is band N line, charger is divided into just organizes charger and negative group charger two groups, just organizing charger and the negative charger organized charger and be all made up of BUCK circuit by two, called after first just organizes charger respectively, second just organizes charger, first negative group of charger and second negative group of charger, when charger runs, a PWM mouth through microprocessor DSP after the first PWM mouth just organizing charger and first negative group of charger drives and calculated by microprocessor DSP sends, the second PWM mouth just organizing charger and second negative group of charger drives and is corrected by the bearing calibration described in embodiment 1 or embodiment 2, this corrected value is provided by FPGA module.Prove by experiment, find that the current-sharing of this example is respond well.
Above content is in conjunction with concrete preferred implementation further description made for the present invention, can not assert that specific embodiment of the invention is confined to these explanations.For general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, some simple deduction or replace can also be made, all should be considered as belonging to protection scope of the present invention.
Claims (8)
1. the current equalizing method of a charger, it is characterized in that, comprise: microprocessor DSP, FPGA module and at least two choppers, described chopper is parallel with one another, described microprocessor DSP detect respectively all choppers parallel with one another after actual output voltage and the output current of each chopper; Wherein, described microprocessor DSP drives a chopper by a PWM mouth, and the chopper that described microprocessor DSP drives is benchmark chopper; Remaining chopper is driven by FPGA module, and the chopper that described FPGA module drives is for correcting chopper; Described microprocessor DSP is after collecting all chopper parallel connections actual output voltage total afterwards, described actual output voltage and the charging voltage value preset are compared, regulate the duty ratio of benchmark chopper until actual output voltage is consistent with the charging voltage value preset, draw the reference duty cycle of now benchmark chopper, show that each corrects the correcting value of chopper by the current parameters of benchmark chopper and the current parameters of correction chopper;
The current parameters of the current parameters of benchmark chopper and correction chopper is compared, when both current errors are greater than the current difference of permission, if the current parameters correcting chopper is greater than the current parameters of benchmark chopper, then the amount of duty cycle adjustment of the duty ratio of described correction chopper according to setting is reduced; If the current parameters correcting chopper is less than the current parameters of benchmark chopper, then the amount of duty cycle adjustment of the duty ratio of described correction chopper according to setting is strengthened; Return behind interval at a fixed time and the current parameters of benchmark chopper and the current parameters of correction chopper are compared.
2. the current equalizing method of charger according to claim 1, is characterized in that, described current parameters is output current or inductive current.
3. the current equalizing method of charger according to claim 1 and 2, is characterized in that, described amount of duty cycle adjustment was set as 10 nanoseconds.
4. the current equalizing method of charger according to claim 1 and 2, is characterized in that, described fixed time interval is 0.1 ~ 0.5 second.
5. the current equalizing method of charger according to claim 1 and 2, is characterized in that, described in the charging voltage value that presets be 200 ~ 300V.
6. the current equalizing method of charger according to claim 1 and 2, is characterized in that, the current difference of described permission is positive and negative 5% of the current parameters of benchmark chopper.
7. the current equalizing method of charger according to claim 6, is characterized in that, described correcting value is the regulated quantity of the power device ON time correcting chopper, and the control errors of this regulated quantity is in the span of positive and negative 1 microsecond.
8. the current equalizing method of charger according to claim 7, it is characterized in that, microcontroller DSP sends the corrected value of the driving for realizing correction chopper to FPGA module by serial communication mode, the corrected value that FPGA module sends according to microprocessor DSP changes the duty ratio correcting chopper.
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| CN103687227A (en) * | 2013-12-06 | 2014-03-26 | 彩虹集团公司 | LED paralleled current sharing power unit |
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| CN103687227A (en) * | 2013-12-06 | 2014-03-26 | 彩虹集团公司 | LED paralleled current sharing power unit |
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| 一种新型开关电源模块均流技术的研究;包广清等;《微特电机》;20040228(第2期);第3-4页及第25页 * |
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