CN103972342A - Nitride semiconductor structure and semiconductor light-emitting component - Google Patents
Nitride semiconductor structure and semiconductor light-emitting component Download PDFInfo
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- CN103972342A CN103972342A CN201310029901.9A CN201310029901A CN103972342A CN 103972342 A CN103972342 A CN 103972342A CN 201310029901 A CN201310029901 A CN 201310029901A CN 103972342 A CN103972342 A CN 103972342A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
- H01L33/145—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
- H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
Abstract
The invention relates to a nitride semiconductor structure and a semiconductor light-emitting component. The nitride semiconductor structure is mainly characterized in that a stress release layer with the thickness in the sub-micron grade is arranged between a light-emitting layer and an n-type semiconductor layer and is formed by no more than eight pairs of alternated and stacked InxGa1-xN layers and InyGa1-yN layers, wherein the x and the y meet the conditions that the x is larger than zero and smaller than one, the y is larger than zero and smaller than one, and the x is smaller than the y. The semiconductor light-emitting component at least comprises the nitride semiconductor structure, a substrate, an n-type electrode and a p-type electrode, and the n-type electrode and the p-type electrode supply power energy in a matched mode. In this way, the stress release layer with a small number of stacking layers is provided, and residual stress and epitaxy defects caused by mismatching of crystal lattices can be effectively reduced; the stress release layer with the thickness (the thickness preferably ranges from 0.1 micrometers to 0.5 micrometers) in the sub-micron grade is adopted, so that in the epitaxy process, the composition proportion can be accurately controlled, and the quality of light emitting diodes can be effectively mastered.
Description
Technical field
The present invention is relevant for a kind of nitride semiconductor structure and semiconductor light-emitting elements, refer in particular to a kind of nitride semiconductor structure and semiconductor light-emitting elements that disposes the stress release layer of a micron grade thickness between luminescent layer and N-shaped semiconductor layer, belong to technical field of semiconductors.
Background technology
In recent years, the application surface of light-emitting diode is increasingly extensive, has become critical elements indispensable in daily life; And light-emitting diode is expected to replace lighting apparatus now, become following new solid-state lighting elements from generation to generation, therefore high energy-conservation, the high efficiency of development and more high-power light-emitting diode will be future trend; Nitride LED due to have component size little, without mercury pollution, the advantage such as luminous efficiency is high and the life-span is long, become one of the most emerging photoelectric semiconductor material, and the emission wavelength of the nitride of the 3rd main group has almost been contained the scope of visible ray, more become the light LED material that has potentiality.
Generally speaking, iii-nitride light emitting devices is that a resilient coating is first formed on substrate, then on resilient coating sequentially building crystal to grow N-shaped semiconductor layer, luminescent layer and p-type semiconductor layer; Then, utilize micro-shadow and etch process to remove the p-type semiconductor layer of part, the luminescent layer of part, until expose the N-shaped semiconductor layer of part; Then, respectively at forming N-shaped electrode and the p-type electrode of ohmic contact on the expose portion of N-shaped semiconductor layer and p-type semiconductor layer, and then produce light-emitting diode; Wherein, luminescent layer is multiple quantum trap structure (MQW), and the quantum well layer (well) that the mode that multiple quantum trap structure comprises repeating is arranged alternately and quantum barrier layer (barrier), because quantum well layer has the energy gap that relative quantum barrier layer is lower, make each the quantum well layer in above-mentioned multiple quantum trap structure can on quantum mechanics, limit electronics and electric hole, cause electronics and electric hole from N-shaped semiconductor layer and p-type semiconductor layer, to inject respectively, and combination in quantum well layer, and launch photon.
Yet above-mentioned light-emitting diode is because of factors (such as electric current congested (current crowding), dislocation defects (dislocation) etc.), and then affect its luminous efficiency; Also therefore, develop in recent years many technology, for example, used indium tin oxide (Indium Tin Oxide; ITO) when transparency electrode, adopt flip chip structure (flip-chip), utilize the sapphire substrate of graphical (PSS), and use current barrier layer (current block layer; CBL) etc.; A kind of method of improving N-shaped, p-type electrode ohmic contact wherein, to utilize superlattice (super lattices) structure, superlattice structure is consisted of the wide energy gap semiconductor material layer of mutual storehouse and narrow energy gap semiconductor material layer several, wherein, for example the old gallium nitride of aluminium nitride (AlGaN/GaN) or InGaN/gallium nitride (InGaN/GaN) reduce the contact resistance between transparency electrode and light-emitting diode to the material of wide energy gap semiconductor material layer and narrow energy gap semiconductor material layer; And above-mentioned InGaN/GaN superlattice structure also can be configured between N-shaped semiconductor layer and luminescent layer, to reduce because N-shaped semiconductor layer does not mate with the lattice of luminescent layer the residual stress being produced; Refer to application number and be 101143115 TaiWan, China patent application, denomination of invention is the patent application of " nitride semiconductor structure and semiconductor light-emitting elements ", it has disclosed between luminescent layer and N-shaped carrier barrier layer and has configured a superlattice layer, with the crystal lattice difference of buffering luminescent layer and N-shaped carrier barrier layer, reduce its poor row's density; Generally speaking, above-mentioned InGaN/GaN superlattice structure includes the cycle (being the InGaN/GaN that 5-50 is right) of 5-50, and the about 1-5 nanometer of the thickness of a pair of InGaN/GaN; Yet, when actual building crystal to grow, because of superlattice structure thickness too thin (being nano-scale), and the growth number of plies is too much, not only make the proportion of composing of InGaN/GaN need often to adjust, easily cause the too high problem of defect (pits) density, be difficult to effectively control the quality of light-emitting diode, and then affect the luminous efficiency of light-emitting diode.
In view of above-mentioned existing nitride semiconductor LED still has the disappearance of many places on reality is implemented, therefore, develop a kind of novel nitride semiconductor structure and semiconductor light-emitting elements and be still one of this area problem demanding prompt solution.
Summary of the invention
For solving the problems of the technologies described above, main purpose of the present invention is for providing a kind of nitride semiconductor structure, it disposes the stress release layer of a micron grade thickness between luminescent layer and N-shaped semiconductor layer, its stress release layer with the less storehouse number of plies reduces not mate because of lattice the residual stress and brilliant defect of heap of stone being produced effectively, and the stress release layer of tool time micron thickness more makes, in brilliant process of heap of stone, can accurately control In
xga
1-xn layer and In
yga
1-ythe proportion of composing of N layer, effectively to control the quality of light-emitting diode.
Another object of the present invention is for providing a kind of semiconductor light-emitting elements, and it at least includes above-mentioned nitride semiconductor structure.
For reaching above-mentioned purpose, the invention provides a kind of nitride semiconductor structure, it comprises a N-shaped semiconductor layer, luminescent layer and a p-type semiconductor layer, and between luminescent layer and a N-shaped semiconductor layer, dispose the stress release layer of a micron grade thickness, described stress release layer is by being no more than 8 couples of In that replace each other storehouse
xga
1-xn layer and In
yga
1-yn layer forms, and wherein x and y are for meeting the numerical value of 0 < x < 1,0 < y < 1, x < y.
According to the specific embodiment of the present invention, preferably, in above-mentioned nitride semiconductor structure, the gross thickness of described stress release layer is 0.1-0.5 micron.
According to the specific embodiment of the present invention, preferably, in above-mentioned nitride semiconductor structure, described stress release layer has the In that 3-5 is right
xga
1-xn layer and In
yga
1-yn layer; More preferably, it includes 3 couples of In of repetition storehouse
xga
1-xn layer and In
yga
1-yn layer.In addition,, according to the specific embodiment of the present invention, preferably, in described stress release layer, contain the lower In of indium amount
xga
1-xthe thickness of N layer is greater than containing the higher In of indium amount
yga
1-ythe thickness of N layer; More preferably, In
xga
1-xthe thickness of N layer is In
yga
1-ythe more than 2 times of N layer thickness.Thus, with In
xga
1-xn layer and In
yga
1-yalternately compare down each other by stress release layer and the known superlattice layer of tool that storehouse forms time micron grade thickness for N layer, it is less that it has the number of plies, the characteristic that thickness is thicker, make nitride semiconductor structure of the present invention can effectively reduce with the stress release layer of the less storehouse number of plies not mate because of lattice the residual stress being produced, and stress release layer forms by InGaN, the superlattice structure combining compared to known use InGaN and gallium nitride, can make the interface dislocation defects density of epitaxial structure reduce, the stress release layer of tool time micron thickness is in brilliant process of heap of stone simultaneously, can control more accurately In
xga
1-xn layer and In
yga
1-ythe proportion of composing of N layer, effectively to control the quality of light-emitting diode, and then the usefulness of lifting light-emitting diode.
According to the specific embodiment of the present invention, preferably, in above-mentioned nitride semiconductor structure, in described stress release layer, contain the lower In of indium amount
xga
1-xn layer is 5 * 10 doped with concentration
16-5 * 10
18cm
-3n-shaped admixture; Thus, can increase crystallinity and the conductivity of nitride-based semiconductor.
According to the specific embodiment of the present invention, preferably, in above-mentioned nitride semiconductor structure, can between p-type semiconductor layer and luminescent layer, further may be configured with a p-type carrier barrier layer, p-type carrier barrier layer is aluminum indium nitride gallium Al
wln
vga
1-w-vn, wherein w, v are for meeting the numerical value of 0 < w < 1,0 < v < 1,0 < w+v < 1, more preferably, 0 < w≤0.4,0 < v≤0.2; Carrier can be confined in quantum well layer, to improve the laminating probability in electronics electricity hole, increase luminous efficiency, and then reach the effect of semiconductor light-emitting elements luminance raising.
In addition, the present invention also proposes a kind of semiconductor light-emitting elements, and it at least includes:
One substrate;
One N-shaped semiconductor layer, it is disposed on described substrate;
One luminescent layer, it is disposed on described N-shaped semiconductor layer, and described luminescent layer has multiple quantum trap structure, and described multiple quantum trap structure comprises a plurality of alternately well layer and the barrier layers of storehouse each other, and well layer described in having between every two-layer described barrier layer;
One stress release layer, it is disposed between described luminescent layer and described N-shaped semiconductor layer, and described stress release layer is by being no more than 8 couples of In that replace each other storehouse
xga
1-xn layer and In
yga
1-yn layer forms, and wherein x and y meet the numerical value of 0 < x < 1,0 < y < 1, x < y;
One p-type semiconductor layer, it is disposed on described luminescent layer;
One N-shaped electrode, it is disposed on described N-shaped semiconductor layer with ohmic contact; And
One p-type electrode, it is disposed on described p-type semiconductor layer with ohmic contact.
Semiconductor light-emitting elements of the present invention at least comprises above-mentioned nitride semiconductor structure, and a substrate and two-phase provide N-shaped electrode and the p-type electrode of electric energy ordinatedly; Thus, when the stress release layer of tool time micron grade thickness reduces its crystalline substance of heap of stone, because lattice does not mate produced residual stress, to reduce the interface dislocation defects density of epitaxial structure, the characteristic of tool time micron thickness more can accurately be controlled In simultaneously
xga
1-xn layer and In
yga
1-ythe proportion of composing of N layer, effectively to control the quality of light-emitting diode; Moreover the well layer that more can lower luminescent layer due to the minimizing of compression stress is compressed the impact of stress, and electronics and electric hole in well layer are spatially more assembled, and effectively electronics electricity hole is confined in each well layer, to promote internal quantum; Meanwhile, also can strengthen the interfacial characteristics of adjacent GaN barrier layer and InGaN well interlayer, improve the carrier loss of interface, to increase internal quantum, make semiconductor light-emitting elements can obtain good luminous efficiency.
According to the specific embodiment of the present invention, preferably, in above-mentioned semiconductor light-emitting elements, can between substrate and N-shaped semiconductor layer, dispose a resilient coating, resilient coating is by chemical formula aluminium gallium nitride alloy Al
zga
1-zthe material that N represents forms, and wherein 0 < z < 1, arranges phenomenon in order to the of heap of stone brilliant difference solving because producing because of crystal lattice difference between substrate and N-shaped semiconductor layer.
Accompanying drawing explanation
The generalized section of the nitride semiconductor structure that Fig. 1 provides for a preferred embodiment of the present invention.
The generalized section of the semiconductor light-emitting elements that Fig. 2 is the nitride semiconductor structure made that provides according to a preferred embodiment of the invention.
Primary clustering symbol description:
1 substrate 2 resilient coatings
3 N-shaped semiconductor layer 31 N-shaped electrodes
4 stress release layers
41 In
xga
1-xn layer
42 In
yga
1-yn layer
5 luminescent layer 51 barrier layers
52 well layer 6 p-type carrier barrier layer
7 p-type semiconductor layer 71 p-type electrodes
Embodiment
Advantage in object of the present invention and structural design function thereof, will be explained according to the following drawings and preferred embodiment, the present invention is had to more deep and concrete understanding.
First, in the description of following examples, for the sake of clarity, amplified the thickness of lamination and region in accompanying drawing, and be to be understood that when point out one deck (or film) or a structure be configured in another substrate, another layer (or film) or another structure " on " or during D score, it can be positioned at " directly " other substrate, layer (or film) or another structure, also or between the two there is more than one intermediate layer and configure in " indirectly " mode, can be with reference to the accompanying drawings of every one deck position.
Refer to shown in Fig. 1, the generalized section of the nitride semiconductor structure that it provides for a preferred embodiment of the present invention, it comprises a N-shaped semiconductor layer 3, luminescent layer 5 and a p-type semiconductor layer 7, and in luminescent layer 5 and 3 of N-shaped semiconductor layers, dispose the stress release layer 4 of a micron grade thickness, described stress release layer 4 is by being no more than 8 couples of In of storehouse alternately each other
xga
1-xn layer 41 and In
yga
1-y42, N layer forms, and wherein x and y are for meeting the numerical value of 0 < x < 1,0 < y < 1, x < y; Moreover preferably, stress release layer 4 has the In that 3-5 is right
xga
1-xn layer 41 and In
yga
1-yn layer 42, more preferably, it includes 3 couples of In of repetition storehouse
xga
1-xn layer 41 and In
yga
1-yn layer 42, in a specific embodiment, stress release layer 4 is preferably with the In of 3 couples
0.1ga
0.9n layer and In
0.3ga
0.7n layer forms.
In addition, in building crystal to grow process, the gross thickness of stress release layer 4 is 0.1-0.5 micron, and contains the lower In of indium amount in stress release layer 4
xga
1-xthe thickness of N layer 41 is greater than containing the higher In of indium amount
yga
1-ythe thickness of N layer 42, preferably, In
xga
1-xthe thickness of N layer 41 is In
yga
1-ythe more than 2 times of N layer 42 thickness; Thus, stress release layer 4 with the less storehouse number of plies can reduce not mate because of lattice the residual stress being produced effectively, the interface dislocation defects density of epitaxial structure is reduced, and the stress release layer 4 of tool time micron (0.1-0.5 μ m) thickness, in brilliant process of heap of stone, can be controlled In more accurately
xga
1-xn layer 41 and In
yga
1-ythe proportion of composing of N layer 42, effectively to control the quality of light-emitting diode, and then the usefulness of lifting light-emitting diode.
Moreover, in stress release layer 4, contain the lower In of indium amount
xga
1-xn layer 41 can be 5 * 10 doped with concentration
16-5 * 10
18cm
-3n-shaped admixture (as silicon), increase thus crystallinity and the conductivity of nitride-based semiconductor.
Further, can dispose a p-type carrier barrier layer 6 in p-type semiconductor layer 7 and 5 of luminescent layers, p-type carrier barrier layer 6 is aluminum indium nitride gallium Al
wln
vga
1-w-vn, wherein w, v are for meeting the numerical value of 0 < w < 1,0 < v < 1,0 < w+v < 1, be preferably 0 < w≤0.4,0 < v≤0.2, p-type carrier barrier layer 6 can make electronics be confined in quantum well layer, to improve the laminating probability in electronics electricity hole, increase luminous efficiency, and then reach the effect of nitride-based semiconductor luminance raising.
When the nitride semiconductor structure of above-described embodiment is implemented to use in reality, the material of N-shaped semiconductor layer 3 can be for example the gallium nitride series material of silicon doping, and the material of p-type semiconductor layer 7 can be for example the gallium nitride series material of magnesium doping, the multiple quantum trap structure of luminescent layer 5 can be respectively for example but do not limit well layer 52 and the barrier layer 51 being formed by InGaN and GaN; Thus, with In
xga
1-xn layer 41 and In
yga
1-yalternately compare down each other by stress release layer 4 and the known superlattice layer of tool that storehouse forms time micron grade thickness for N layer 42, there is the characteristic that the number of plies is less, thickness is thicker, therefore, by stress release layer 4 of the present invention, not only can reduce not mate produced residual stress because of lattice, to reduce the interface dislocation defects density of epitaxial structure, more can accurately control In simultaneously
xga
1-xn layer 41 and In
yga
1-ythe proportion of composing of N layer 42, controls the quality of light-emitting diode effectively; In addition, the well layer 52 that more can lower luminescent layer 5 due to the minimizing of compression stress is compressed the impact of stress, electronics and electric hole in well layer 52 are spatially more assembled, effectively electronics electricity hole is confined in each well layer 52, to promote internal quantum; Moreover, also can strengthen the interfacial characteristics of 52, adjacent GaN barrier layer 51 and InGaN well layer, improve the carrier loss of interface, to increase internal quantum.
Refer to shown in Fig. 2, above-mentioned nitride semiconductor structure can be applicable in semiconductor light-emitting elements, the generalized section of the semiconductor light-emitting elements that Fig. 2 is the nitride semiconductor structure made that provides according to a preferred embodiment of the invention.Described semiconductor light-emitting elements at least includes:
One substrate 1;
One N-shaped semiconductor layer 3, it is disposed on substrate 1; Wherein, the material of N-shaped semiconductor layer 3 can be for example the gallium nitride series material of silicon doping;
One luminescent layer 5, it is disposed on N-shaped semiconductor layer 3, and luminescent layer 5 has multiple quantum trap structure, and multiple quantum trap structure comprises a plurality of alternately well layer 52 and the barrier layers 51 of storehouse each other, and 51 of every two-layer barrier layers have a well layer 52; Wherein, well layer 52 can be formed by InGaN and GaN respectively with barrier layer 51, so that electronics and electric hole are more easily confined in well layer 52, to increase the laminating probability in electronics electricity hole, promotes internal quantum;
One stress release layer 4, it is disposed at 3 of luminescent layer 5 and N-shaped semiconductor layers, and stress release layer 4 is by being no more than 8 couples of In of storehouse alternately each other
xga
1-xn layer 41 and In
yga
1-y42, N layer forms, and wherein x and y are for meeting the numerical value of 0 < x < 1,0 < y < 1, x < y; In addition, preferably, stress release layer 4 has the In that 3-5 is right
xga
1-xn layer 41 and In
yga
1-yn layer 42, and In
xga
1-xthe thickness of N layer 41 is In
yga
1-ythe more than 2 times of N layer 42 thickness, and the gross thickness of stress release layer 4 is 0.1-0.5 micron;
One p-type semiconductor layer 7, it is disposed on luminescent layer 5; Wherein, the gallium nitride series material that the material of p-type semiconductor layer 7 can for example adulterate for magnesium;
One N-shaped electrode 31, it is disposed on N-shaped semiconductor layer 3 with ohmic contact; And
One p-type electrode 71, it is disposed on p-type semiconductor layer 7 with ohmic contact; Wherein, N-shaped electrode 31 matches electric energy is provided with p-type electrode 71, and can following material but to be not limited only to these materials made: titanium, aluminium, gold, chromium, nickel, platinum and alloy thereof etc.; Its process is that persons skilled in the art are known, and is not emphasis of the present invention, therefore, no longer in the present invention, is repeated.
In addition, 3 of substrate 1 and N-shaped semiconductor layers dispose a resilient coating 2, and resilient coating 2 is by chemical formula aluminium gallium nitride alloy Al
zga
1-zthe material that N represents forms, and 0 < z < 1 wherein, in order to solve the of heap of stone brilliant poor phenomenon of arranging producing because of crystal lattice difference because of 3 of substrate 1 and N-shaped semiconductor layers; Moreover 5 of p-type semiconductor layer 7 and luminescent layers further may be configured with a p-type carrier barrier layer 6, p-type carrier barrier layer 6 is by chemical formula aluminum indium nitride gallium Al
wln
vga
1-w-vthe material that N represents forms, wherein w and v are for meeting the numerical value of 0 < w≤0.4,0 < v < 0.2, so that carrier can be confined in quantum well layer 52, to improve the laminating probability in electronics electricity hole, increase luminous efficiency, and then reach the effect of semiconductor light-emitting elements luminance raising.
Thus, semiconductor light-emitting elements of the present invention passes through In
xga
1-xn layer 41 and In
yga
1-yn layer 42 replaces the stress release layer 4 of tool that storehouse forms time micron grade thickness each other, it has the characteristic that the number of plies is less, thickness is thicker, not only can reduce stress release layer 4 of heap of stone when brilliant because lattice does not mate produced residual stress, to reduce the interface dislocation defects density of epitaxial structure, more can accurately control In simultaneously
xga
1-xn layer 41 and In
yga
1-ythe proportion of composing of N layer 42, effectively to control the quality of light-emitting diode; In addition, because the minimizing of compression stress also can strengthen the interfacial characteristics between adjacent barrier layer 51 and well layer 52, improve the carrier loss of interface, to increase internal quantum, make semiconductor light-emitting elements can obtain good luminous efficiency.
In sum, the nitride semiconductor structure of tool stress release layer of the present invention and semiconductor light-emitting elements, can pass through above-mentioned disclosed embodiment really, reaches desired use effect.
Above-mentioned disclosed accompanying drawing and explanation, be only the preferred embodiments of the present invention, not for limiting protection scope of the present invention; Persons skilled in the art, according to feature of the present invention, other equivalence of doing changes or modifies, and all should be considered as not departing from protection scope of the present invention.
Claims (9)
1. a nitride semiconductor structure, comprise a N-shaped semiconductor layer, luminescent layer and a p-type semiconductor layer, in between described luminescent layer and described N-shaped semiconductor layer, dispose the stress release layer of a micron grade thickness, described stress release layer is by being no more than 8 couples of In that replace each other storehouse
xga
1-xn layer and In
yga
1-yn layer forms, and wherein x and y are for meeting the numerical value of 0 < x < 1,0 < y < 1, x < y.
2. nitride semiconductor structure as claimed in claim 1, wherein, described stress release layer has the In that 3-5 is right
xga
1-xn layer and In
yga
1-yn layer.
3. nitride semiconductor structure as claimed in claim 1, wherein, the In of described stress release layer
xga
1-xthe thickness of N layer is greater than described In
yga
1-ythe thickness of N layer.
4. nitride semiconductor structure as claimed in claim 1, wherein, the In of described stress release layer
xga
1-xthe thickness of N layer is described In
yga
1-ythe more than 2 times of the thickness of N layer.
5. nitride semiconductor structure as claimed in claim 1, wherein, the gross thickness of described stress release layer is 0.1-0.5 micron.
6. nitride semiconductor structure as claimed in claim 1, wherein, the In of described stress release layer
xga
1-xn layer is 5 * 10 doped with concentration
16-5 * 10
18cm
-3n-shaped admixture.
7. nitride semiconductor structure as claimed in claim 1 wherein, further disposes a p-type carrier barrier layer between described p-type semiconductor layer and described luminescent layer, and described p-type carrier barrier layer is aluminum indium nitride gallium Al
wln
vga
1-w-vn, wherein w and v are for meeting the numerical value of 0 < w≤0.4,0 < v≤0.2.
8. a semiconductor light-emitting elements, it at least includes:
One substrate;
One N-shaped semiconductor layer, it is disposed on described substrate;
One luminescent layer, it is disposed on described N-shaped semiconductor layer, and described luminescent layer has multiple quantum trap structure, and described multiple quantum trap structure comprises a plurality of alternately well layer and the barrier layers of storehouse each other, and well layer described in having between every two-layer described barrier layer;
One stress release layer, it is disposed between described luminescent layer and described N-shaped semiconductor layer, and described stress release layer is by being no more than 8 couples of In that replace each other storehouse
xga
1-xn layer and In
yga
1-yn layer forms, and wherein x and y are for meeting the numerical value of 0 < x < 1,0 < y < 1, x < y;
One p-type semiconductor layer, it is disposed on described luminescent layer;
One N-shaped electrode, it is disposed on described N-shaped semiconductor layer with ohmic contact; And
One p-type electrode, it is disposed on described p-type semiconductor layer with ohmic contact.
9. semiconductor light-emitting elements as claimed in claim 8, wherein, disposes a resilient coating between described N-shaped semiconductor layer and described substrate, and described resilient coating is aluminium gallium nitride alloy Al
zga
1-zn, wherein 0 < z < 1.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
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