CN108400209A - The production method of epitaxial structure, light emitting diode and epitaxial structure - Google Patents

The production method of epitaxial structure, light emitting diode and epitaxial structure Download PDF

Info

Publication number
CN108400209A
CN108400209A CN201810432678.5A CN201810432678A CN108400209A CN 108400209 A CN108400209 A CN 108400209A CN 201810432678 A CN201810432678 A CN 201810432678A CN 108400209 A CN108400209 A CN 108400209A
Authority
CN
China
Prior art keywords
layer
barrier layer
quantum barrier
quantum
gallium nitride
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201810432678.5A
Other languages
Chinese (zh)
Other versions
CN108400209B (en
Inventor
祝庆
汪琼
陈柏君
陈柏松
李若雅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
WUHU DEHAO RUNDA OPTOELECTRONICS TECHNOLOGY Co Ltd
Original Assignee
WUHU DEHAO RUNDA OPTOELECTRONICS TECHNOLOGY Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by WUHU DEHAO RUNDA OPTOELECTRONICS TECHNOLOGY Co Ltd filed Critical WUHU DEHAO RUNDA OPTOELECTRONICS TECHNOLOGY Co Ltd
Priority to CN201810432678.5A priority Critical patent/CN108400209B/en
Publication of CN108400209A publication Critical patent/CN108400209A/en
Application granted granted Critical
Publication of CN108400209B publication Critical patent/CN108400209B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H01L33/32Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

Abstract

This application involves the production methods to a kind of epitaxial structure, light emitting diode and epitaxial structure.The multiple quantum well layer that epitaxial structure includes epitaxial structure includes quantum well layer and the first quantum barrier layer, and the first quantum barrier layer is formed in the upper surface of quantum well layer, the accounting of accounting the first quantum barrier layer phosphide element of phosphide element in quantum well layer.Lattice mismatch between quantum well layer and the first quantum barrier layer can be reduced using this epitaxial structure, to reduce droop effects, improve the luminance of light emitting diode.

Description

The production method of epitaxial structure, light emitting diode and epitaxial structure
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of epitaxial structure, light emitting diode and epitaxy junction The production method of structure.
Background technology
With the development of semiconductor technology, light emitting diode (Light-Emitting Diode, LED) can be sent out as a kind of The semiconductor electronic component of light is favourably welcome due to the advantages such as its is small, low energy consumption, long lifespan, driving voltage are low, uses extensively In indicator light, display screen etc..
In order to improve the luminous efficiency of LED, LED epitaxial structure, the volume of the epitaxial structure of LED can be set on LED Sub- well layer is the main luminescent layer of LED, and multiple quantum well layer is formed by quantum well layer and quantum barrier layer alternating growth.
But since there are serious lattice mismatches between quantum well layer and the material of quantum barrier layer, lead to droop effects Obviously, so that lumination of light emitting diode rate is relatively low.
Invention content
Based on this, it is necessary to which in view of the above technical problems, droop effects can be reduced by providing one kind, improve light-emitting diodes The epitaxial structure of pipe luminance, the manufacturing method of light emitting diode and epitaxial structure.
In a first aspect, a kind of epitaxial structure, the epitaxial structure include:
The multiple quantum well layer of the epitaxial structure includes quantum well layer and the first quantum barrier layer, first quantum barrier layer It is formed in the upper surface of the quantum well layer;
First quantum barrier layer is the superlattice layer for including indium gallium nitride and gallium nitride, the indium member in the quantum well layer The accounting of element is more than the accounting of the phosphide element in first quantum barrier layer.
In the above embodiments, the quantum well layer is gallium-indium nitride layer, and the first quantum barrier layer is indium gallium nitride and nitrogen The superlattice layer for changing gallium reduces quantum well layer and the since the lattice constant of quantum well layer and first quantum barrier layer is close Lattice mismatch between one quantum barrier layer improves the luminance of diode to reduce droop effects.
First quantum barrier layer includes M the first superlattice layers of layer from bottom to top in one of the embodiments,;Each institute It includes gallium-indium nitride layer and gallium nitride layer to state the first superlattice layer;2≤M≤6.
Further include in one of the embodiments,:The thickness of the gallium-indium nitride layer is 0.15nm~0.25nm, the nitrogen The thickness for changing gallium layer is 0.15nm~0.25nm.
The multiple quantum well layer further includes the second quantum barrier layer in one of the embodiments, second quantum barrier layer It is formed in the upper surface of first quantum barrier layer;
Second quantum barrier layer is the superlattice layer for including aluminium indium nitrogen layer and gallium nitride layer.
In the above embodiments, second quantum barrier layer is the superlattice layer for including aluminium indium nitrogen and gallium nitride, due to Second quantum barrier layer adds aluminium element, improves the energy rank of the second quantum barrier layer, prevents electronics from overflowing so that electronics quilt It is strapped in light-emitting zone, to reduce droop effects, improves the luminance of light emitting diode.
Second quantum barrier layer includes N the second superlattice layers of layer, Mei Gesuo from bottom to top in one of the embodiments, It includes aluminium indium nitrogen layer and gallium nitride layer to state the second superlattice layer;5≤N≤15.
The thickness of the aluminium indium nitrogen layer is 0.08nm~0.12nm in one of the embodiments, the gallium nitride layer Thickness is 0.08nm~0.12nm.
The proportioning of aluminium element and phosphide element is 0.82 in the aluminium indium nitrogen layer in one of the embodiments,:0.18.
In the above embodiments, the proportioning of aluminium indium nitrogen layer aluminium element and phosphide element is 0.82:0.18, aluminium element and phosphide element Proportioning be 0.82:The lattice constant of 0.18 aluminium indium nitrogen and the lattice constant of gallium nitride are close, aluminium indium nitrogen layer and gallium nitride layer Lattice mismatch reduce;To reduce droop effects, the luminance of light emitting diode is improved.
The multiple quantum well layer further includes the upper surface for being formed in second quantum barrier layer in one of the embodiments, Third quantum barrier layer, the third quantum barrier layer is the gallium nitride layer for including element silicon, and the element silicon accounting is from bottom to top It is incremented by.
In above-described embodiment, the third quantum barrier layer, the third are formed on second quantum barrier layer upper surface The atomic quantity of the leading portion element silicon of quantum barrier layer is few, ensures that crystal quality is preferable, the atomicity quantitative change of back segment element silicon is more, can The effective electron injection that allows.
Second aspect, the present invention also provides a kind of structure of light emitting diode, the light emitting diode includes described On the one hand the structure of epitaxial structure is provided with first aspect any embodiment.
The advantageous effect of the structure of the light emitting diode of above-mentioned second aspect can be found in times of first aspect and first aspect The advantageous effect of one embodiment, details are not described herein again.
The third aspect, the present invention also provides a kind of manufacturing methods of epitaxial structure, including:
Under 750-830 DEG C of temperature environment, production quantity is deposited in the upper surface of the stress release layer of the epitaxial structure Sub- well layer;
Under 870-930 DEG C of temperature environment, in the upper surface of the quantum well layer, deposition generates the first quantum barrier layer;Institute It is the superlattice layer for including indium gallium nitride and gallium nitride to state the first quantum barrier layer, and the accounting of the phosphide element in the quantum well layer is big The accounting of phosphide element in first quantum barrier layer.
In the above-described embodiments, due to quantum well layer be gallium-indium nitride layer, the first quantum barrier layer be include indium gallium nitride and The lattice constant of the superlattice layer of gallium nitride, quantum well layer and the first quantum barrier layer is close, and lattice mismatch reduces, to reduce Droop effects improve the luminance of light emitting diode.
It is described under 870-930 DEG C of temperature environment in one of the embodiments, in the upper surface of the quantum well layer Deposition generates the first quantum barrier layer, including:
Under 870-930 DEG C of temperature environment, N the first superlattice layers of layer are generated from bottom to top;It is each described the first to surpass crystalline substance Compartment includes gallium-indium nitride layer and gallium nitride layer, and in generating process, phosphide element from the bottom up in the gallium-indium nitride layer Accounting is decremented to 0% from 20%.
The thickness of the gallium-indium nitride layer is 0.15nm~0.25nm, the gallium nitride layer in one of the embodiments, Thickness be 0.15nm~0.25nm.
The method further includes in one of the embodiments,:Under 870-930 DEG C of temperature environment, described first The upper surface deposition of quantum barrier layer generates the second quantum barrier layer;Wherein, second quantum barrier layer be include aluminium indium nitrogen and nitridation The superlattice layer of gallium.
It is described under 870-930 DEG C of temperature environment in one of the embodiments, in the upper of first quantum barrier layer Surface deposition generates the second quantum barrier layer, including:
Under 870-930 DEG C of temperature environment, M the second superlattice layers of layer are generated from bottom to top, it is each described the second to surpass crystalline substance Compartment includes aluminium indium nitrogen layer and mixes the gallium nitride layer of silicon.
In above-described embodiment, second quantum barrier layer is the superlattice layer for including aluminium indium nitrogen and gallium nitride, due to described Aluminium element is added in second quantum barrier layer so that the energy rank of second quantum barrier layer is improved, and prevents electronics from overflowing so that electronics It is bound in light-emitting zone, to reduce droop effects, improves the luminance of light emitting diode.
The thickness of the aluminium indium nitrogen layer is 0.08nm~0.12nm, the nitridation for mixing silicon in one of the embodiments, The thickness of gallium layer is 0.08nm~0.12nm.
The proportioning of aluminium element and phosphide element is 0.82 in the aluminium indium nitrogen layer in one of the embodiments,:0.18.
In above-described embodiment, since the proportioning of aluminium element and phosphide element is 0.82 in aluminium indium nitrogen layer:0.18, aluminium element and indium The proportioning of element is 0.82:The lattice constant of 0.18 aluminium indium nitrogen and the lattice constant of gallium nitride are close, and lattice mismatch reduces, from And droop effects are reduced, improve the luminance of light emitting diode.
The method further includes in one of the embodiments,:Under hydrogen environment and 870-930 DEG C of temperature environment, In the upper surface of second quantum barrier layer, deposition generates third quantum barrier layer;Wherein, the third quantum barrier layer be include silicon The gallium nitride layer of element, and in generating process, in the third quantum barrier layer from bottom to top the element silicon atom number by 0 per cubic centimeter is incremented to 2e+18 per cubic centimeter.
In above-described embodiment, third quantum barrier layer is the gallium nitride layer for including element silicon, and the atom number of element silicon is under Up it is incremented by, the atomic quantity of the leading portion element silicon of third quantum barrier layer is few, ensures that crystal quality is preferable, the original of back segment element silicon Subnumber quantitative change is more, can effectively allow electron injection, has protective effect to quantum well layer.
The density of protium gradually reduces from bottom to top in the hydrogen environment in one of the embodiments,.
In above-described embodiment, due to reducing the remaining hydrogen atom in the cavity of quantum well layer, reduce due to hydrogen The probability of atom remaining influence quantum well layer phosphide element being incorporated to has protective effect to quantum well layer.
Description of the drawings
Fig. 1 is a kind of structural schematic diagram of epitaxial structure in one embodiment;
Fig. 2 is the structural schematic diagram of the epitaxial structure of the prior art;
Fig. 3 is a kind of structural schematic diagram of epitaxial structure in another embodiment;
Fig. 4 is a kind of structural schematic diagram of epitaxial structure in another embodiment;
Fig. 5 is the structural schematic diagram of one embodiment epitaxial structures;
Fig. 6 is a kind of production method of epitaxial structure in one embodiment;
Fig. 7 is a kind of production method of epitaxial structure in another embodiment;
Fig. 8 is a kind of production method of epitaxial structure in another embodiment.
Reference sign:
10:Multiple quantum well layer;
101:Quantum well layer;
102:First quantum barrier layer;
103:Second quantum barrier layer;
104:Third quantum barrier layer;
20:Substrate;
30:Buffer layer;
40:UGaN layers;
50:NGaN layers;
60:Stress release layer;
70:Multiple quantum well layer;
701:Quantum well layer;
702:Quantum barrier layer;
80:P-type layer;
21:Substrate;
31:Buffer layer;
41:UGaN layers;
51:NGaN layers;
61:Stress release layer;
71:Multiple quantum well layer;
711:Quantum well layer;
712:First quantum barrier layer;
713:Second quantum barrier layer;
714:Third quantum barrier layer;
81:P-type layer.
Specific implementation mode
It is with reference to the accompanying drawings and embodiments, right in order to make the object, technical solution and advantage of the application be more clearly understood The application is further elaborated.It should be appreciated that specific embodiment described herein is only used to explain the application, not For limiting the application.
Epitaxial structure provided by the present application can be applied in light emitting diode, and the epitaxial structure of the application reduces Multiple-quantum Lattice mismatch in well layer between quantum well layer and quantum barrier layer improves light emitting diode to reduce droop effects Luminance.
Fig. 1 is a kind of structural schematic diagram for epitaxial structure that one embodiment provides, as shown in Figure 1, the epitaxial structure Multiple quantum well layer 10 includes quantum well layer 101 and the first quantum barrier layer 102, and the first quantum barrier layer 102 is formed in quantum well layer 101 Upper surface;First quantum barrier layer 102 is the superlattice layer for including indium gallium nitride and gallium nitride, the indium member in quantum well layer 101 The accounting of element is more than the accounting of the phosphide element in the first quantum barrier layer 102.
In the present embodiment, quantum well layer 101 can be gallium-indium nitride layer, the first quantum barrier layer 102 be indium gallium nitride and The superlattice layer of gallium nitride, superlattices the interlaminating growth and protect with several nanometers to tens nanometers that be two kinds of different constituent elements The multilayer film of strict periodicity is held, is in fact exactly the stratiform Fine Composite of particular form.
Since quantum well layer 101 is gallium-indium nitride layer, the first quantum barrier layer 102 is the superlattices of indium gallium nitride and gallium nitride Layer so that the lattice constant of quantum well layer 101 and the first quantum barrier layer 102 is close, then quantum well layer 101 and the first quantum barrier layer 102 lattice is adapted to.
It in the present embodiment, can be under 750-830 DEG C of temperature environment, in the upper table of the stress release layer of epitaxial structure Face deposition generates quantum well layer 101, and quantum well layer 101 is gallium-indium nitride layer;And under 870-930 ° of temperature environment, in quantum The upper surface deposition of well layer generates the first quantum barrier layer 102.Wherein, the first quantum barrier layer can be from bottom to top by indium gallium nitride The superlattice layer alternately produced with gallium nitride.
Fig. 2 is a kind of structural schematic diagram for epitaxial structure that the prior art provides, as shown in Fig. 2, epitaxial structure includes lining Bottom 20, buffer layer 30, UGaN layers 40, NGaN layers 50, stress release layer 60, multiple quantum well layer 70 and P-type layer 80.As it can be seen that traditional Epitaxial structure multiple quantum well layer 70 include quantum well layer 701 and quantum barrier layer 702, quantum well layer 701 be gallium-indium nitride layer, Quantum barrier layer 702 is gallium nitride layer, since indium gallium nitride is different with the molecular structure of gallium nitride so that quantum well layer 701 and amount There are serious lattice mismatches between sub- barrier layer 702, apparent so as to cause droop effects.Epitaxial structure in the application includes Quantum well layer 101 and the first quantum barrier layer 102, quantum well layer 101 are gallium-indium nitride layer, and the first quantum barrier layer 102 is gallium nitride The superlattice layer of indium and gallium nitride, the phosphide element that the phosphide element accounting in quantum well layer 101 is more than in the first quantum barrier layer 102 account for Than since the first quantum barrier layer 102 includes indium gallium nitride so that the lattice constant and amount of material in the first quantum barrier layer 102 The lattice constant of material relatively, reduces the lattice mismatch between quantum well layer and quantum barrier layer in sub- well layer 101, to Droop effects are reduced, the luminance of light emitting diode is improved.
Epitaxial structure provided by the embodiments of the present application, multiple quantum well layer 10 include quantum well layer 101 and the first quantum barrier layer 102, the first quantum barrier layer 102 is formed in the upper surface of quantum well layer 101;First quantum barrier layer 102 be include indium gallium nitride and The superlattice layer of gallium nitride, the accounting of the phosphide element in quantum well layer 101 are more than accounting for for the phosphide element in the first quantum barrier layer 102 Than the lattice mismatch for reducing quantum well layer 101 and the first quantum barrier layer 102 improves so as to reduce droop effects The luminance of light emitting diode.
Optionally, in the embodiment shown in fig. 1, the first quantum barrier layer 102 includes M the first superlattice layers of layer from bottom to top; Each first superlattice layer includes gallium-indium nitride layer and gallium nitride layer;2≤M≤6.
In the present embodiment, in 102 growth course of the first quantum barrier layer, M layers can be generated from bottom to top and the first surpasses crystalline substance Compartment, each first superlattice layer includes gallium-indium nitride layer and gallium nitride layer, is equivalent to gallium-indium nitride layer and gallium nitride layer alternating Form the first quantum barrier layer 102.Those skilled in the art can select the number of plies of the first superlattice layer, example according to actual demand Such as, 5 layer of first superlattice layer can be sequentially generated from bottom to top, and each first superlattice layer includes gallium-indium nitride layer and gallium nitride Layer.In growth course, one layer of gallium nitride layer, then the upper table in gallium nitride layer can be generated in the upper surface of quantum well layer 101 Face generates one layer of gallium-indium nitride layer, then generates one layer of gallium nitride layer in the upper surface of gallium-indium nitride layer, recycles successively, symbiosis is at 5 The first superlattice layer of layer.Alternatively, in growth course, one layer of gallium-indium nitride layer can be generated in the upper surface of quantum well layer 101, One layer of gallium nitride layer is generated in the upper surface of gallium-indium nitride layer again, then one layer of indium gallium nitride is generated in the upper surface of gallium nitride layer Layer, recycles, symbiosis is at 5 layer of first superlattice layer successively.
Optionally, the thickness of gallium-indium nitride layer is 0.15nm~0.25nm, the thickness of gallium nitride layer be 0.15nm~ 0.25nm。
Fig. 3 is a kind of structural schematic diagram for epitaxial structure that another embodiment provides, as shown in figure 3, multiple quantum well layer 10 Further include the second quantum barrier layer 103, the second quantum barrier layer 103 is formed in the upper surface of the first quantum barrier layer 102;Second quantum is built Layer 103 is the superlattice layer for including aluminium indium nitrogen and gallium nitride.
In the present embodiment, the second quantum barrier layer 103, the second quantum are formed on the upper surface of the first quantum barrier layer 102 Barrier layer 103 is the superlattice layer for including aluminium indium nitrogen and gallium nitride, due to adding aluminium element in the second quantum barrier layer 103, is made The energy rank for obtaining the second quantum barrier layer 103 is improved, and prevents electronics from overflowing so that electronics is bound in light-emitting zone, to reduce Droop effects improve the luminance of light emitting diode.
Optionally, the phosphide element in the first quantum barrier layer 102 successively decreases from bottom to top, for example, the accounting of phosphide element can be certainly Under be up reduced to 0% by 20%.
In the present embodiment, quantum well layer 101 is gallium-indium nitride layer, and the second quantum barrier layer 103 is aluminium indium nitrogen and gallium nitride Superlattice layer, the phosphide element in the first quantum barrier layer 102 successively decreases from bottom to top, in quantum well layer 101 and the second quantum barrier layer It plays a transition role between 103.
In the present embodiment, life can be deposited in the upper surface of quantum well layer 101 under 870-930 DEG C of temperature environment It at the first quantum barrier layer 102, keeps under 870-930 DEG C of temperature environment, deposits and generate in the upper surface of the first quantum barrier layer 102 Second quantum barrier layer 103.
Optionally, the second quantum barrier layer 103 includes N the second superlattice layers of layer, each second superlattice layer packet from bottom to top Include aluminium indium nitrogen layer and gallium nitride layer;5≤N≤15.
In the present embodiment, the second quantum barrier layer 103 may include the second superlattice layer of multilayer, for example, the second quantum is built Layer 103 may include 10 layer of second superlattice layer from bottom to top, and each second superlattice layer includes aluminium indium nitrogen layer and gallium nitride layer. In growth course, one layer of gallium nitride layer, then the upper table in gallium nitride layer can be generated in the upper surface of the first quantum barrier layer 102 Face generates one layer of aluminium indium nitrogen layer, then generates one layer of gallium nitride layer in the upper surface of aluminium indium nitrogen layer, recycles successively, and symbiosis is at 10 layers the Two superlattice layers.Alternatively, in growth course, one layer of aluminium indium nitrogen layer can be generated in the upper surface of the first quantum barrier layer 102, then One layer of gallium nitride layer is generated in the upper surface of aluminium indium nitrogen layer, is recycled successively, symbiosis is at 10 layer of second superlattice layer.
Optionally, the thickness of aluminium indium nitrogen layer be 0.08nm~0.12nm, mix the gallium nitride layer of silicon thickness be 0.08nm~ 0.12nm。
Optionally, the proportioning of aluminium element and phosphide element is 0.82 in aluminium indium nitrogen layer:0.18.
In the present embodiment, the proportioning of aluminium element and phosphide element is 0.82 in aluminium indium nitrogen layer:The lattice of 0.18 aluminium indium nitrogen The lattice constant of constant and gallium nitride is close, and lattice mismatch reduces, and to reduce droop effects, improves light emitting diode Luminance.
It should be noted that aluminium element and phosphide element can also use other proportioning modes, the application in aluminium indium nitrogen layer In be not limited thereto.
Fig. 4 is a kind of structural schematic diagram for epitaxial structure that another embodiment provides, as shown in figure 4, multiple quantum well layer 10 Further include the third quantum barrier layer 104 for the upper surface for being formed in the second quantum barrier layer 103, third quantum barrier layer 104 be include silicon The gallium nitride layer of element.
It in the present embodiment, can be under hydrogen environment and 870-930 DEG C of temperature environment, in the second quantum barrier layer 103 Upper surface generates the third quantum barrier layer 104 of the gallium nitride layer including mixing silicon from bottom to top.
Optionally, the element silicon in third quantum barrier layer 104 is incremented by from bottom to top.
In the present embodiment, element silicon atom number is gradually incremented by third quantum barrier layer 104 from bottom to top, for example, third Element silicon atom number is incremented to 2e+18 per cubic centimeter to quantum barrier layer 104 by 0 per cubic centimeter from bottom to top.
It should be noted that the atom number of element silicon can also use other numerical value in third quantum barrier layer 104, this It is not limited thereto in application.
Epitaxial structure provided by the embodiments of the present application forms third quantum barrier layer on 103 upper surface of the second quantum barrier layer 104, third quantum barrier layer 104 is the gallium nitride layer for including element silicon, and the accounting of element silicon is incremented by from bottom to top, ensures crystal matter While measuring preferable, the injection of electronics is not influenced, and there is protective effect to quantum well layer 101.
Fig. 5 is a kind of schematic diagram of epitaxial structure provided by the embodiments of the present application, as shown in figure 5, the epitaxial structure is under Include up substrate 21, buffer layer 31, UGaN layers 41, NGaN layers 51, stress release layer 61, multiple quantum well layer 71 and p-type successively Layer 81, wherein each layer of structure in the quantum barrier layer in multiple quantum well layer 71 is referred to above-mentioned Fig. 1, Fig. 3 and Fig. 4 institutes Show embodiment, details are not described herein again.
In the present embodiment, the first quantum barrier layer 712 is formed on the upper surface of quantum well layer 711, quantum well layer 711 is Gallium-indium nitride layer, the first quantum barrier layer 712 are the superlattice layer of indium gallium nitride and gallium nitride, the crystalline substance of material in quantum well layer 711 The lattice constant of material is close in lattice constant and the first quantum barrier layer 712, reduces between quantum well layer and the first quantum barrier layer Lattice mismatch improve the luminance of diode to reduce droop effects.
In the present embodiment, the second quantum barrier layer 713, the second quantum are formed on the upper surface of the first quantum barrier layer 712 Barrier layer 713 is the superlattice layer of aluminium indium nitrogen and gallium nitride, due to adding aluminium element in the second quantum barrier layer 713 so that the The energy rank of two quantum barrier layers 713 is improved, and prevents electronics from overflowing so that electronics is bound in light-emitting zone, to reduce droop Effect improves the luminance of light emitting diode.
In the present embodiment, third quantum barrier layer 714, third quantum are formed on the upper surface of the second quantum barrier layer 713 Well layer 714, third quantum barrier layer 714 are the gallium nitride layer for including element silicon, and the atom number of element silicon is incremented by from bottom to top, the The atomic quantity of the leading portion element silicon of three quantum barrier layers 714 is few, ensures that crystal quality is preferable, the atomicity quantitative change of back segment element silicon It is more, it can effectively allow electron injection, there is protective effect to quantum well layer 711.
The present embodiment also provides a kind of light emitting diode, includes the epitaxial structure such as Fig. 1, Fig. 3-Fig. 5 any embodiments.
The present embodiment provides a kind of light emitting diode, epitaxial structure uses any embodiment such as Fig. 1, Fig. 3-Fig. 5, can be with Droop effects are reduced, the luminance of light emitting diode is improved.
Fig. 6 is a kind of production method for epitaxial structure that one embodiment provides, and the manufacturing method of the epitaxial structure is used for Epitaxial structure as shown in Figure 1 above is manufactured, as shown in fig. 6, this method includes:
Step 101, under 750-830 DEG C of temperature environment, stress release layer upper surface deposition generate quantum well layer.
Specifically, under 750-830 DEG C of temperature environment, deposits and generate in the upper surface of the stress release layer of epitaxial structure Quantum well layer, quantum well layer are gallium-indium nitride layer.
Step 102, under 870-930 DEG C of temperature environment, quantum well layer upper surface deposition generate the first quantum build Layer.
The production method of epitaxial structure provided in this embodiment, under 870-930 DEG C of temperature environment, in quantum well layer Upper surface deposition generates the first quantum barrier layer, and the first quantum barrier layer is the superlattice layer for including indium gallium nitride and gallium nitride, quantum The accounting of phosphide element in well layer is more than the accounting of the phosphide element in the first quantum barrier layer, since quantum well layer is indium gallium nitride Layer, the first quantum barrier layer is the superlattice layer for including indium gallium nitride and gallium nitride, the lattice of quantum well layer and the first quantum barrier layer Constant is close, and lattice mismatch reduces, and to reduce droop effects, improves the luminance of light emitting diode.
Optionally, on the basis of embodiment shown in Fig. 6, step 102 is " under 870-930 DEG C of temperature environment, in quantum Well layer upper surface deposition generate the first quantum barrier layer " a kind of possible realization method may include:In 870-930 DEG C of temperature It spends under environment, generates M the first superlattice layers of layer from bottom to top;Each first superlattice layer includes gallium-indium nitride layer and gallium nitride Layer, and in generating process, the accounting of phosphide element is decremented to 0% from 20% from the bottom up in gallium-indium nitride layer.
For example, under 870-930 DEG C of temperature environment, 5 layer of first superlattice layer is generated from bottom to top;It is each the first to surpass crystalline substance Compartment includes gallium-indium nitride layer and gallium nitride layer, and in generating process, the accounting of phosphide element from the bottom up in gallium-indium nitride layer It is decremented to 0% from 20%.
Optionally, the thickness of gallium-indium nitride layer is 0.15nm~0.25nm, the thickness of gallium nitride layer be 0.15nm~ 0.25nm。
Optionally, on the basis of embodiment as shown in Figure 6, the second quantum barrier layer can also be generated, as shown in fig. 7, should Method includes:
Step 101, under 750-830 DEG C of temperature environment, epitaxial structure stress release layer upper surface deposit life At quantum well layer.
Step 102, under 870-930 DEG C of temperature environment, quantum well layer upper surface deposition generate the first quantum build Layer;First quantum barrier layer is the superlattice layer for including indium gallium nitride and gallium nitride, and the accounting of the phosphide element in quantum well layer is more than The accounting of phosphide element in first quantum barrier layer.
Optionally, the phosphide element in the first quantum barrier layer successively decreases from bottom to top, in the present embodiment, in the first quantum barrier layer The accounting of phosphide element is decremented to 0% by 20%.
Step 103, under 870-930 DEG C of temperature environment, the first quantum barrier layer upper surface deposition generate the second amount Sub- barrier layer;Wherein, the second quantum barrier layer is the superlattice layer for including aluminium indium nitrogen and gallium nitride.
The production method of the epitaxial structure provided in the present embodiment, under 870-930 DEG C of temperature environment, in the first quantum The upper surface deposition of barrier layer generates the second quantum barrier layer, since the second quantum barrier layer is the superlattices for including aluminium indium nitrogen and gallium nitride Layer, due to adding aluminium element in the second quantum barrier layer so that the energy rank of the second quantum barrier layer is improved, and prevents electronics from overflowing, So that electronics is bound in light-emitting zone, to reduce droop effects, the luminance of light emitting diode is improved.
Optionally, on the basis of embodiment shown in Fig. 7, step 103 is " under 870-930 DEG C of temperature environment, in quantum Well layer upper surface deposition generate the second quantum barrier layer " a kind of possible realization method may include:In 870-930 DEG C of temperature It spends under environment, generates N the second superlattice layers of layer from bottom to top;Each first superlattice layer includes aluminium indium nitrogen layer and gallium nitride layer.
Specifically, under 870-930 DEG C of temperature environment, 10 layer of second superlattice layer, Mei Ge are generated from bottom to top Two superlattice layers include aluminium indium nitrogen layer and mix the gallium nitride layer of silicon.
Optionally, the thickness of aluminium indium nitrogen layer is 0.08nm~0.12nm, and the thickness of gallium nitride layer is 0.08nm~0.12nm.
Optionally, the proportioning of aluminium element and phosphide element is 0.82 in aluminium indium nitrogen layer:0.18.
In the present embodiment, the proportioning of aluminium indium nitrogen layer aluminium element and phosphide element is 0.82:0.18, aluminium element and phosphide element are matched Than being 0.82:The lattice constant of 0.18 aluminium indium nitrogen and the lattice constant of gallium nitride are close, the crystalline substance of aluminium indium nitrogen layer and gallium nitride layer Lattice mismatch reduces;To reduce droop effects, the luminance of light emitting diode is improved.
Optionally, on the basis of embodiment as shown in Figure 7, third quantum barrier layer can also be generated, as shown in figure 8, should Method includes:
Step 101, under 750-830 DEG C of temperature environment, epitaxial structure stress release layer upper surface deposit life At quantum well layer.
Step 102, under 870-930 DEG C of temperature environment, quantum well layer upper surface deposition generate the first quantum build Layer;First quantum barrier layer is the superlattice layer for including indium gallium nitride and gallium nitride, and the accounting of the phosphide element in quantum well layer is more than The accounting of phosphide element in first quantum barrier layer.
Step 103, under 870-930 DEG C of temperature environment, the first quantum barrier layer upper surface deposition generate the second amount Sub- barrier layer;Wherein, the second quantum barrier layer is the superlattice layer for including aluminium indium nitrogen and gallium nitride.
Step 104, under hydrogen environment and 870-930 DEG C of temperature environment, the second quantum barrier layer upper surface deposit Generate third quantum barrier layer;Wherein, third quantum barrier layer is the gallium nitride layer for including element silicon, and in generating process, third Element silicon atom number is incremented by from bottom to top in quantum barrier layer.
Optionally, element silicon atom number is incremented to by 0 per cubic centimeter often stands from bottom to top in third quantum barrier layer Square centimetre 2e+18.
Optionally, third quantum barrier layer is generated under hydrogen environment, and the content of hydrogen is successively decreased from bottom to top.
In the present embodiment, third quantum barrier layer is the gallium nitride layer for including element silicon, and the atom number of element silicon is under Up it is incremented by, the atomic quantity of the leading portion element silicon of third quantum barrier layer is few, ensures that crystal quality is preferable, the original of back segment element silicon Subnumber quantitative change is more, can effectively allow electron injection.
In the present embodiment, third quantum barrier layer is generated under hydrogen environment, and the content of hydrogen is successively decreased from bottom to top, by In reducing the remaining hydrogen atom in the cavity of quantum well layer, reduce due to hydrogen atom remaining influence quantum well layer indium member The probability of element being incorporated to has protective effect to quantum well layer.
The production method of the epitaxial structure provided in the present embodiment further includes sequentially forming substrate from bottom to top, buffer layer, UGaN layers, NGaN layers, stress release layer, multiple quantum well layer and P-type layer form epitaxial structure as shown in Figure 5.
In the present embodiment, using sapphire as substrate, those skilled in the art can be according to actual demand more rebush Bottom materials can also be Si substrates or SiC substrate, but be not limited to above-mentioned material.
In the present embodiment, under 500 DEG C~550 DEG C temperature environments, forming a layer thickness on the upper surface of the substrate is The buffer layer of 20~40nm.
In the present embodiment, under 1100 DEG C of temperature environments, UGaN layers are formed on the upper surface of buffer layer, UGaN layers are The gallium nitride layer of silicon, thickness about 0.4um~0.6um are not mixed.
In the present embodiment, form NGaN layers on UGaN layers of upper surface, NGaN layers be a layer thickness be 1.3~ The gallium nitride layer for including element silicon of 1.6um.
In the present embodiment, stress release layer is formed on UGaN layers of upper surface.Stress release layer include phosphide element and The gallium nitride layer of element silicon.
In the present embodiment, under 750-830 DEG C of temperature environment, Quantum Well is formed in the upper surface of stress release layer Layer, quantum well layer is gallium-indium nitride layer, thickness 2-3nm;In the present embodiment, it under 870-930 DEG C of temperature environment, is measuring Form the first quantum barrier layer on the upper surface of sub- well layer, the first quantum barrier layer, generation M the first superlattices of layer that can be from bottom to top Layer, each first superlattice layer includes gallium-indium nitride layer and gallium nitride layer, and those skilled in the art can be according to actual demand The number of plies of the first superlattice layer is selected, for example, 5 layer of first superlattice layer can be sequentially generated from bottom to top, it is each the first to surpass crystalline substance Compartment includes gallium-indium nitride layer and gallium nitride layer.The thickness of gallium-indium nitride layer is 0.15nm in wherein each group of the first superlattice layer ~0.25nm, the wherein accounting of phosphide element are decremented to 0% from 20% from bottom to top;The thickness of gallium nitride layer be 0.15nm~ 0.25nm。
In the present embodiment, under 870-930 DEG C of temperature environment, P-type layer is formed on the upper surface of multiple quantum well layer, P-type layer is the gallium nitride layer for including magnesium elements, thickness 100-120nm.Each technical characteristic of above example can be appointed The combination of meaning, to keep description succinct, combination not all possible to each technical characteristic in above-described embodiment is all described, However, as long as contradiction is not present in the combination of these technical characteristics, it is all considered to be the range of this specification record.
Above example only expresses the several embodiments of the application, the description thereof is more specific and detailed, but can not Therefore it is construed as limiting the scope of the patent.It should be pointed out that for those of ordinary skill in the art, Under the premise of not departing from the application design, various modifications and improvements can be made, these belong to the protection domain of the application. Therefore, the protection domain of the application patent should be determined by the appended claims.

Claims (18)

1. a kind of epitaxial structure, which is characterized in that the multiple quantum well layer of the epitaxial structure includes quantum well layer and the first quantum Barrier layer, first quantum barrier layer are formed in the upper surface of the quantum well layer;
First quantum barrier layer is the superlattice layer for including indium gallium nitride and gallium nitride, the phosphide element in the quantum well layer Accounting is more than the accounting of the phosphide element in first quantum barrier layer.
2. epitaxial structure according to claim 1, which is characterized in that first quantum barrier layer includes M layers from bottom to top First superlattice layer;Each first superlattice layer includes gallium-indium nitride layer and gallium nitride layer;2≤M≤6.
3. epitaxial structure according to claim 2, which is characterized in that the thickness of the gallium-indium nitride layer be 0.15nm~ The thickness of 0.25nm, the gallium nitride layer are 0.15nm~0.25nm.
4. according to claim 1-3 any one of them epitaxial structures, which is characterized in that the multiple quantum well layer further includes second Quantum barrier layer, second quantum barrier layer are formed in the upper surface of first quantum barrier layer;
Second quantum barrier layer is the superlattice layer for including aluminium indium nitrogen layer and gallium nitride layer.
5. epitaxial structure according to claim 4, which is characterized in that second quantum barrier layer includes N layers from bottom to top Second superlattice layer, each second superlattice layer includes aluminium indium nitrogen layer and gallium nitride layer;5≤N≤15.
6. epitaxial structure according to claim 5, which is characterized in that the thickness of the aluminium indium nitrogen layer be 0.08nm~ The thickness of 0.12nm, the gallium nitride layer are 0.08nm~0.12nm.
7. epitaxial structure according to claim 5 or 6, which is characterized in that aluminium element and phosphide element in the aluminium indium nitrogen layer Proportioning be 0.82:0.18.
8. epitaxial structure according to claim 5 or 6, which is characterized in that the multiple quantum well layer further includes being formed in institute The third quantum barrier layer of the upper surface of the second quantum barrier layer is stated, the third quantum barrier layer is the gallium nitride layer for including element silicon.
9. a kind of light emitting diode, which is characterized in that including such as claim 1-8 any one of them epitaxial structure.
10. a kind of production method of epitaxial structure, which is characterized in that including:
Under 750-830 DEG C of temperature environment, Quantum Well is generated in the upper surface deposition of the stress release layer of the epitaxial structure Layer;
Under 870-930 DEG C of temperature environment, in the upper surface of the quantum well layer, deposition generates the first quantum barrier layer;Described One quantum barrier layer is the superlattice layer for including indium gallium nitride and gallium nitride, and the accounting of the phosphide element in the quantum well layer is more than institute State the accounting of the phosphide element in the first quantum barrier layer.
11. according to the method described in claim 10, it is characterized in that, described under 870-930 DEG C of temperature environment, described The upper surface deposition of quantum well layer generates the first quantum barrier layer, including:
Under 870-930 DEG C of temperature environment, N the first superlattice layers of layer are generated from bottom to top;Each first superlattice layer Including gallium-indium nitride layer and gallium nitride layer, and in generating process, the accounting of phosphide element from the bottom up in the gallium-indium nitride layer It is decremented to 0% from 20%.
12. according to the method for claim 11, which is characterized in that the thickness of the gallium-indium nitride layer be 0.15nm~ The thickness of 0.25nm, the gallium nitride layer are 0.15nm~0.25nm.
13. according to claim 10-12 any one of them methods, which is characterized in that the method further includes:
Under 870-930 DEG C of temperature environment, in the upper surface of first quantum barrier layer, deposition generates the second quantum barrier layer;Its In, second quantum barrier layer is the superlattice layer for including aluminium indium nitrogen and gallium nitride.
14. according to the method for claim 13, which is characterized in that it is described under 870-930 DEG C of temperature environment, described The upper surface deposition of first quantum barrier layer generates the second quantum barrier layer, including:
Under 870-930 DEG C of temperature environment, M the second superlattice layers of layer, each second superlattice layer are generated from bottom to top Including aluminium indium nitrogen layer and the gallium nitride layer for mixing silicon.
15. according to the method for claim 14, which is characterized in that the thickness of the aluminium indium nitrogen layer be 0.08nm~ The thickness of 0.12nm, the gallium nitride layer for mixing silicon are 0.08nm~0.12nm.
16. the method according to claims 14 or 15, which is characterized in that aluminium element and phosphide element in the aluminium indium nitrogen layer Proportioning is 0.82:0.18.
17. according to claim 10-12 any one of them methods, which is characterized in that the method further includes:
Under hydrogen environment and 870-930 DEG C of temperature environment, in the upper surface of second quantum barrier layer, deposition generates third Quantum barrier layer;Wherein, the third quantum barrier layer is the gallium nitride layer for including element silicon, and in generating process, the third The element silicon atom number is incremented to 2e+18 per cubic centimeter by 0 per cubic centimeter from bottom to top in quantum barrier layer.
18. according to the method for claim 17, which is characterized in that the density of protium is from bottom to top in the hydrogen environment It gradually reduces.
CN201810432678.5A 2018-05-08 2018-05-08 The production method of epitaxial structure, light emitting diode and epitaxial structure Active CN108400209B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201810432678.5A CN108400209B (en) 2018-05-08 2018-05-08 The production method of epitaxial structure, light emitting diode and epitaxial structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810432678.5A CN108400209B (en) 2018-05-08 2018-05-08 The production method of epitaxial structure, light emitting diode and epitaxial structure

Publications (2)

Publication Number Publication Date
CN108400209A true CN108400209A (en) 2018-08-14
CN108400209B CN108400209B (en) 2019-05-24

Family

ID=63101640

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201810432678.5A Active CN108400209B (en) 2018-05-08 2018-05-08 The production method of epitaxial structure, light emitting diode and epitaxial structure

Country Status (1)

Country Link
CN (1) CN108400209B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113451460A (en) * 2020-11-20 2021-09-28 重庆康佳光电技术研究院有限公司 Light emitting device and method of manufacturing the same
CN114038955A (en) * 2021-02-25 2022-02-11 重庆康佳光电技术研究院有限公司 Epitaxial structure of light-emitting chip, light-emitting chip and display back plate

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5583878A (en) * 1993-06-23 1996-12-10 The Furukawa Electric Co., Ltd. Semiconductor optical device
US20070085097A1 (en) * 2005-10-17 2007-04-19 Samsung Electro-Mechanics Co., Ltd. Nitride semiconductor light emitting device
CN103972342A (en) * 2013-01-25 2014-08-06 新世纪光电股份有限公司 Nitride semiconductor structure and semiconductor light-emitting component
CN104201260A (en) * 2014-09-01 2014-12-10 苏州新纳晶光电有限公司 LED epitaxial structure capable of adjusting In content in gradient quantum barrier layer by temperature control
CN105206726A (en) * 2015-08-28 2015-12-30 山东浪潮华光光电子股份有限公司 LED structure and growth method thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5583878A (en) * 1993-06-23 1996-12-10 The Furukawa Electric Co., Ltd. Semiconductor optical device
US20070085097A1 (en) * 2005-10-17 2007-04-19 Samsung Electro-Mechanics Co., Ltd. Nitride semiconductor light emitting device
CN103972342A (en) * 2013-01-25 2014-08-06 新世纪光电股份有限公司 Nitride semiconductor structure and semiconductor light-emitting component
CN104201260A (en) * 2014-09-01 2014-12-10 苏州新纳晶光电有限公司 LED epitaxial structure capable of adjusting In content in gradient quantum barrier layer by temperature control
CN105206726A (en) * 2015-08-28 2015-12-30 山东浪潮华光光电子股份有限公司 LED structure and growth method thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113451460A (en) * 2020-11-20 2021-09-28 重庆康佳光电技术研究院有限公司 Light emitting device and method of manufacturing the same
CN113451460B (en) * 2020-11-20 2022-07-22 重庆康佳光电技术研究院有限公司 Light emitting device and method of manufacturing the same
CN114038955A (en) * 2021-02-25 2022-02-11 重庆康佳光电技术研究院有限公司 Epitaxial structure of light-emitting chip, light-emitting chip and display back plate

Also Published As

Publication number Publication date
CN108400209B (en) 2019-05-24

Similar Documents

Publication Publication Date Title
Iida et al. 633-nm InGaN-based red LEDs grown on thick underlying GaN layers with reduced in-plane residual stress
Guo et al. InGaN/GaN disk-in-nanowire white light emitting diodes on (001) silicon
TWI352436B (en)
CN100547814C (en) N type III group-III nitride semiconductor laminated construction
Du et al. Enhancing the quantum efficiency of InGaN yellow-green light-emitting diodes by growth interruption
JPH02288371A (en) Semiconductor light emitting element and manufacture thereof
JP2008252096A (en) Light emitting diode having well layer of superlattice structure and/or barrier layer thereof
JP2012151472A (en) Metamorphic substrate system, method of forming metamorphic substrate system, and iii-nitride semiconductor device
Chang et al. High efficiency InGaN/GaN light emitting diodes with asymmetric triangular multiple quantum wells
CN102683508B (en) Methods of forming III/V semiconductor materials, and semiconductor structures formed using such methods
CN108400209B (en) The production method of epitaxial structure, light emitting diode and epitaxial structure
CN102822944A (en) III-V semiconductor structures and methods for forming the same
JP3954335B2 (en) Group III nitride multilayer film
Lin et al. Effects of Mg-doped AlN/AlGaN superlattices on properties of p-GaN contact layer and performance of deep ultraviolet light emitting diodes
CN105914270B (en) The manufacturing method of silicon based gallium nitride LED epitaxial structure
Akasaki Fascinating journeys into blue light (Nobel Lecture)
Chiu et al. Highly efficient and bright LEDs overgrown on GaN nanopillar substrates
CN103703576A (en) Multiple quantum well for ultraviolet light emitting diode and a production method therefor
KR100992499B1 (en) Semiconductor light-emitting diode
Wang et al. Quasi-van der Waals Epitaxy of a Stress-Released AlN Film on Thermally Annealed Hexagonal BN for Deep Ultraviolet Light-Emitting Diodes
Hirayama Growth techniques of AlN/AlGaN and development of high-efficiency deep-ultraviolet light-emitting diodes
CN110137319A (en) LED epitaxial structure and preparation method thereof
Yamamoto et al. Green electroluminescence from ZnCdO multiple quantum-well light-emitting diodes grown by remote-plasma-enhanced metal–organic chemical vapor deposition
CN108598235A (en) Gan base led structure and preparation method thereof
Li et al. Selective area epitaxy of monolithic white-light InGaN/GaN quantum well microstripes with dual color emission

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant