CN108598235A - Gan base led structure and preparation method thereof - Google Patents

Gan base led structure and preparation method thereof Download PDF

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Publication number
CN108598235A
CN108598235A CN201810438378.8A CN201810438378A CN108598235A CN 108598235 A CN108598235 A CN 108598235A CN 201810438378 A CN201810438378 A CN 201810438378A CN 108598235 A CN108598235 A CN 108598235A
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layer
gan
type doping
gan layer
zngen
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CN108598235B (en
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李若雅
汪琼
祝庆
陈柏君
陈柏松
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WUHU DEHAO RUNDA OPTOELECTRONICS TECHNOLOGY Co Ltd
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WUHU DEHAO RUNDA OPTOELECTRONICS TECHNOLOGY Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/16Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

The invention discloses a kind of GaN base LED structures, include successively from bottom to up:Substrate, the first n-type doping GaN layer, the first ZnGeN2Barrier layer, the second n-type doping GaN layer, multiple quantum well layer, p-type doped gan layer.The invention also discloses a kind of preparation methods of GaN base LED structure.

Description

GaN base LED structure and preparation method thereof
Technical field
The present invention relates to light emitting diode fields, more particularly to a kind of GaN base LED structure and preparation method thereof.
Background technology
Light emitting diode (Light-Emitting Diode, LED) is a kind of semiconductor electronic component that can be luminous.Because Have the advantages that small, low energy consumption, long lifespan, driving voltage are low etc. and be favourably welcome, is widely used in indicator light, display screen etc.. Pursuit high brightness, high-performance have become a kind of trend, to meet the needs of growing, the promotion of the luminous efficiency of LED chip It is extremely urgent.LED illumination substitution traditional lighting has become visible trend, and LED illumination will march toward the fast growth phase.And LED illumination Universal key is that the promotion of blue-ray LED epitaxial chip technology power, the breakthrough development of technology will drive the promotion of brightness of illumination With price fall, accelerate LED illumination universalness.
As LED is apparent in illumination and the raising year by year of backlight market application range, the application demand of middle high-power component Increase, but LED has luminous efficiency decaying under Bulk current injection, limits great power LED to a certain extent Exploitation, also constrain development of the LED in general illumination field.
Invention content
Based on this, it is necessary to provide a kind of GaN base LED structure and preparation method thereof, improve the luminous efficiency of LED.
A kind of GaN base LED structure includes successively from bottom to up:Substrate, the first n-type doping GaN layer, the first ZnGeN2Resistance Barrier, the second n-type doping GaN layer, multiple quantum well layer and p-type doped gan layer.
Further include buffer layer and the 2nd ZnGeN in one of the embodiments,2Barrier layer, the buffer layer are arranged in institute It states between substrate and the first n-type doping GaN layer, the 2nd ZnGeN2Barrier layer setting is in the buffer layer and described the Between one n-type doping GaN layer.
2nd ZnGeN in one of the embodiments,2The thickness on barrier layer is 5-6nm, the first ZnGeN2Resistance The thickness of barrier is 5-6nm.
Further include GaN transition layer in one of the embodiments, the GaN transition layer includes cycle superposition from bottom to up Third n-type doping GaN layer and the 4th GaN layer, GaN transition layer setting is in the first n-type doping GaN layer and described the Between one barrier layers ZnGeN2, the doping of the doping of the first n-type doping GaN layer and the third n-type doping GaN layer The doping of the respectively greater than described second n-type doping GaN layer, the doping of the first n-type doping GaN layer and the 3rd N The doping of type doped gan layer is respectively greater than the doping of the 4th GaN layer.
The material of the first n-type doping GaN layer is expressed as Si in one of the embodiments,xGa1-xN, the x's takes Value ranging from 0.1~0.15;The material of the second n-type doping GaN layer 52 is expressed as SiyGa1-yN, the value range of the y It is 0.005~0.006;The material of the third n-type doping GaN layer is expressed as SimGa1-mThe value range of N, the m are 0.1 ~0.15;And the material of the 4th GaN layer is expressed as SinGa1-nThe value range of N, the n are 0~0.006.
The thickness of the first n-type doping GaN layer is 0.5-1um, the GaN transition layer in one of the embodiments, Thickness be 0.5-1um, the thickness of the second n-type doping GaN layer is 0.5-1um.
A kind of preparation method of GaN base LED structure, includes the following steps:
Substrate is provided;And
The first n-type doping of epitaxial growth GaN layer, the first ZnGeN successively over the substrate2Barrier layer, the second n-type doping GaN layer, multiple quantum well layer and p-type doped gan layer.
It is further comprising the steps of in one of the embodiments, before not growing the first n-type doping GaN layer:
Epitaxial growth buffer over the substrate;And
The 2nd ZnGeN of epitaxial growth on the buffer layer2Barrier layer.
The step of growing the first n-type doping GaN layer in one of the embodiments, is (90 including being passed through flow-rate ratio ~95):50:Silane, ammonia and the trimethyl gallium of (550~590), the step of growth and the growth of the second n-type doping GaN layer Rapid includes being passed through flow-rate ratio as (4~6):60:Silane, ammonia and the trimethyl gallium of (550~590).
First ZnGeN in one of the embodiments,2Barrier layer and the 2nd ZnGeN2The growth on barrier layer Temperature is 850 DEG C~950 DEG C.
In one of the embodiments, in NH3And H2In environment, it is passed through the metal vapors of Zn and Ge, the body of the Zn and Ge The ratio of product flow is (45~55):(45~55).
By ZnGeN2As the material on the sides N barrier layer, the electronics under Bulk current injection can effectively be inhibited to overflow to non-amount With hole non-radiative recombination occurs for sub- well region, the efficiency extending transversely of electronics is improved, to improve hairs of the LED under Bulk current injection Light efficiency.Simultaneously as ZnGeN2Orthorhombic structure is similar with the wurtzite structure of GaN, ZnGeN2With the lattice constant of GaN Mismatch be less than 1%, band gap width difference is very small, therefore is inserted into ZnGeN between n-type doping GaN layer2Barrier layer, can The epitaxial structure for forming the lattice that matches each other, improves the quality and performance of LED.
Description of the drawings
Fig. 1 is the structural schematic diagram of the GaN base LED of one embodiment of the invention;
Fig. 2 is the structural schematic diagram of the GaN base LED of another embodiment of the present invention.
Specific implementation mode
In order to make the purpose , technical scheme and advantage of the present invention be clearer, by the following examples, it and combines attached The GaN base LED structure and preparation method thereof of the present invention is further elaborated in figure.It should be appreciated that described herein Specific examples are only used to explain the present invention, is not intended to limit the present invention.
Term as used herein " vertical ", " horizontal ", "left", "right" and similar statement simply to illustrate that Purpose.Various difference objects are drawn in convenient for the ratio of enumerating explanation in embodiment attached drawing, rather than in the ratio of actual component It draws.
The structure of traditional GaN base LED component includes successively from bottom to top:Substrate, n-type doping GaN layer, multiple quantum wells Layer and p-type doped gan layer.In the application of middle high-power component, LED structure can have luminous efficiency under Bulk current injection The problem of decaying.
In GaN base LED component, electronics enters multiple quantum well layer from n-type doping GaN layer and is injected with from p-type doped gan layer Hole-recombination, to generate radioluminescence.Cause under Bulk current injection LED structure there are luminous efficiency decaying may be due to Caused by electronics overflows to non-quantum well region and hole generation non-radiative recombination under Bulk current injection.
Referring to Fig. 1, the embodiment of the present invention provides a kind of GaN base LED structure, include successively from bottom to up:Substrate 10, One n-type doping GaN layer 51, the first ZnGeN2Barrier layer 41, the second n-type doping GaN layer 52, multiple quantum well layer 70 and p-type doping GaN layer 80.It is direction from bottom to up along the substrate 10 to the direction of the p-type doped gan layer 80.
By ZnGeN2As the material on the sides N barrier layer, the electronics under Bulk current injection can effectively be inhibited to overflow to non-amount With hole non-radiative recombination occurs for sub- well region, the efficiency extending transversely of electronics is improved, to improve hairs of the LED under Bulk current injection Light efficiency.Simultaneously as ZnGeN2Orthorhombic structure is similar with the wurtzite structure of GaN, ZnGeN2With the lattice constant of GaN Mismatch be less than 1%, band gap width difference is very small, therefore adds ZnGeN in n-type doping GaN layer2Barrier layer, can The epitaxial structure for forming the lattice that matches each other, improves the quality and performance of LED.In one embodiment, the substrate 10 can be Sapphire blue substrate, Si, SiC etc..
Referring to Fig. 2, preferred, the GaN base LED structure further includes buffer layer 20 and the 2nd ZnGeN2Barrier layer 42, The buffer layer 20 is arranged in the substrate 10 close to the surface of the first n-type doping GaN layer 51, the 2nd ZnGeN2 Barrier layer 42 is arranged between the buffer layer 20 and the first n-type doping GaN layer 51.
The material of the buffer layer 20 can be GaN, and the buffer layer 20 is mixed for being released effectively the substrate 10 with N-type The stress that miscellaneous GaN layer is generated by coefficient of thermal expansion difference, can also reduce and be answered caused by substrate 10 and GaN lattice constant differences Power improves epitaxial growth quality.The thickness of the buffer layer 20 can be 2nm~50nm.
Preferably, in the lower part of the first n-type doping GaN layer 51, the first n-type doping GaN layer 51 and described ZnGeN is respectively set between two n-type doping GaN layers 522Barrier layer, forming multiple blocking in n-type doping GaN layer can be preferably It prevents electronics from overflowing to non-quantum well area, makes luminous efficiency highers of the LED under Bulk current injection.One embodiment wherein In, the 2nd ZnGeN2Barrier layer 42 and the first ZnGeN2The structure on barrier layer 41 can be identical.
Preferably, further include graphene layer between the substrate 10 and the buffer layer 20, due to graphene and substrate 10 Between can be keyed with faint molecule, by graphene layer be arranged between the substrate 10 and other epitaxially grown layers, easily Other epitaxially grown layers are more convenient in peeling liner bottom 10 from the substrate 10 to remove.
Preferably, the GaN base LED structure further includes filling and leading up layer 30, and the layer 30 of filling and leading up is arranged in the buffer layer 20 With the 2nd ZnGeN2Between barrier layer 42.The layer 30 of filling and leading up can fill and lead up three-dimensional structure crystalline substance island, the extension after being Structure growth provides a film ground layer.The layer 30 of filling and leading up can be GaN layer.The thickness for filling and leading up layer 30 can be 1 μm ~5 μm.
Preferably, the first n-type doping GaN layer 51 and/or the second n-type doping GaN layer 52 are that Si adulterates GaN Layer.It is furthermore preferred that the first n-type doping GaN layer 51 can be adjusted by adjusting concentration of the gas containing Si in epitaxial growth And/or in the second n-type doping GaN layer 52 Si doping ratio.In one embodiment, Si is in the first n-type doping GaN Layer 51 doping be more than Si the second n-type doping GaN layer 52 doping.The material of the first n-type doping GaN layer 51 Material can be expressed as SixGa1-xThe value range of N, the x can be 0.1~0.15.Preferably, the second n-type doping GaN The material of layer 52 can be expressed as SiyGa1-yThe value range of N, the y can be 0.005~0.006.
In one embodiment, the GaN base LED structure further includes GaN transition layer 53.The setting of the GaN transition layer 53 exists The first n-type doping GaN layer 51 and the first ZnGeN2Between barrier layer 41.Preferably, the GaN transition layer 53 includes The third n-type doping GaN layer and the 4th GaN layer of superposition are recycled from bottom to up, and the GaN transition layer 53 is arranged in the first N Type doped gan layer and the first ZnGeN2Between barrier layer 41, the doping of the first n-type doping GaN layer 51 and described The doping of third n-type doping GaN layer is respectively greater than the doping of GaN52 layers of second n-type doping, and first N-type is mixed The doping of the doping of miscellaneous GaN layer 51 and the third n-type doping GaN layer is respectively greater than the doping of the 4th GaN layer. The material of the third n-type doping GaN layer can be expressed as SimGa1-mThe value range of N, the m can be 0.1~0.15. The material of 4th GaN layer can be expressed as SinGa1-nThe value range of N, the n can be 0~0.006.The GaN mistakes Layer 53 is crossed as the buffer layer between the first n-type doping GaN layer 51 and the second n-type doping GaN layer 52, passes through cycle The 4th GaN layer that highly doped third n-type doping GaN layer and low-mix is arranged makes first n-type doping highly doped in LED structure Whole lattice mismatch rate between GaN layer 51 and the second n-type doping GaN layer 52 of low-mix reduces, forward electric to reduce It presses (VF) so that electronics release increases.It is furthermore preferred that the n is 0, the material of the 4th GaN layer can be non-impurity-doped GaN Layer.
Preferably, the first n-type doping GaN layer 51, the second n-type doping GaN layer 52 and the GaN transition layer 53 Thickness it is essentially identical.In one embodiment, the thickness of the first n-type doping GaN layer 51 is 0.5-1um, second N-type The thickness of doped gan layer 52 is 0.5-1um, and the thickness of the GaN transition layer 53 is 0.5-1um.In one embodiment, described Two ZnGeN2The thickness on barrier layer 42 is 5-6nm, the first ZnGeN2The thickness on barrier layer 41 is 5-6nm.In an embodiment In, the recurring number of third n-type doping GaN layer and the 4th GaN layer described in the GaN transition layer 53 can be 75~80, i.e., 75 Third n-type doping GaN layer and the 4th GaN layer are overlapped mutually described in~80 groups.It can make the GaN in this range of DO The buffering effect of transition zone 53 is more preferable.
The multiple quantum well layer 70 can be by InxGa1-xN potential well layers and the alternately laminated composition of GaN barrier layers, the x's takes Value may range from 0.20-0.22, different InxGa1-xThe x values of N potential well layers can be identical.In described in single layerxGa1-xN potential well layers Thickness can be 2-3nm, different InxGa1-xThe thickness of N potential well layers can be identical.The thickness of single layer GaN barrier layers can be The thickness of 10-12nm, different GaN barrier layers can be identical.The multiple quantum well layer 70 may include 5-12 cycle it is described InxGa1-xN potential well layers and GaN barrier layers.Overall thickness can be 145-165nm.
InGaN Quantum Well and the lattice mismatch that GaN quantum are built are big, and well layer defect concentration height causes internal quantum efficiency low etc. Problem.Preferably, the GaN base LED structure further includes stress release layer 60, and the stress release layer 60 is located at the 2nd N Between type doped gan layer 52 and the multiple quantum well layer 70.The stress release layer 60 can be by InyGa1-yN layers and GaN layer friendship For composition, the y value ranges can be 0-0.1, and the InyGa1-yN layers of thickness tapers into from the bottom to top.It is described to answer InGaN layer thickness in power releasing layer 60 is gradually reduced, and defect concentration increases caused by being improved to avoid indium component, reduces more The stress of quantum well layer 70 improves the luminous intensity of light emitting diode.In the stress release layer 60, described in single layer InyGa1-yN layers of thickness can be 3.4-2.6nm, and GaN layer thickness described in single layer can be 10-16nm.The stress release layer 60 may include the In of 3-9 cycleyGa1-yN layers and GaN layer.Preferably, different InyGa1-yN layers of y values can phase Together or with the InyGa1-yThe reduction of N layers of thickness and be gradually reduced.
The p-type doped gan layer can be the GaN layer of Mg doping.The thickness of the p-type doped gan layer can be 90nm- 110nm。
Preferably, the GaN base LED structure further includes transparency conducting layer 90, and the transparency conducting layer 90 is arranged in the P The surface far from the multiple quantum well layer 70 of type doped gan layer.Preferably, the GaN base LED structure further includes n electricity Pole 101 and p-electrode 102, the n-electrode 101 and p-electrode 102 are separately positioned on the second n-type doping GaN layer 52 and described transparent The surface of conductive layer 90.
The embodiment of the present invention also provides a kind of preparation method of the GaN base LED structure, includes the following steps:
Substrate 10 is provided;And
The first n-type doping of epitaxial growth GaN layer 51, the first ZnGeN successively on the substrate 102Barrier layer 41, the 2nd N Type doped gan layer 52, multiple quantum well layer 70 and p-type doped gan layer 80.
In one embodiment, further comprising the steps of before not growing the first n-type doping GaN layer 51:
The epitaxial growth buffer 20 on the substrate 10;And
The 2nd ZnGeN of epitaxial growth on the buffer layer 202Barrier layer 42.
The growth temperature of the buffer layer can be 950 DEG C~1050 DEG C.In one embodiment, after the buffer layer 30, Further include the steps that growth is filled and led up layer before growing the first n-type doping GaN layer 51.The growth temperature for filling and leading up layer 30 It can be 1050 DEG C~1150 DEG C.
2nd ZnGeN2The growth conditions on barrier layer 42 can be with the first ZnGeN2The growth conditions on barrier layer 41 It is identical.2nd ZnGeN2The growth temperature on barrier layer 42 and the first ZnGeN2The growth temperature on barrier layer 41 can be 850 DEG C~950 DEG C.
The first ZnGeN is grown in one of the embodiments,2The step of barrier layer 41 may include:In NH3And H2 In environment, it is passed through the metal vapors of Zn and Ge, the ratio of the volume flow of the Zn and Ge can be (45~55):(45~ 55).The growth step on the 2nd barrier layers ZnGeN2 42 can be with the growth step phase on the first barrier layers ZnGeN2 41 Together.
In one embodiment, grow the first n-type doping GaN layer 51 the step of may include be passed through flow-rate ratio be (90 ~95):50:Silane, ammonia and the trimethyl gallium of (550~590).In one embodiment, the second n-type doping GaN is grown The step of layer 52 includes that can be passed through flow-rate ratio as (4~6):60:Silane, ammonia and the trimethyl gallium of (550~590).
Preferably, after growing the first n-type doping GaN layer 51, do not grow the first barrier layers ZnGeN2 41 it Before, further include the steps that growth GaN transition layer 53.In one embodiment, the step of growing the GaN transition layer 53 may include Three n-type doping GaN layer of alternate cycles growth regulation and the 4th GaN layer.The alternate cycles number can be 75~80.Described in growth The step of third n-type doping GaN layer may include being passed through flow-rate ratio as (90~95):60:The silane of (550~590), ammonia and Trimethyl gallium.The step of growing four GaN layer may include being passed through flow-rate ratio as (0~6):60:The silicon of (550~590) Alkane, ammonia and trimethyl gallium, it is 60 to be preferably passed through mass ratio:The ammonia and trimethyl gallium of (550~590).
Grow the first n-type doping GaN layer 51, the second n-type doping GaN layer 52 and the GaN transition layer 53 Temperature can be identical, can be 1000 DEG C~1100 DEG C.Preferably 1050 DEG C~1090 DEG C.
In one embodiment, the step of growing the multiple quantum well layer 70 may include being grown at 780-830 DEG C of low temperature InxGa1-xN potential well layers (x=0.20-0.22), then temperature is increased to 850-930 DEG C of growth GaN barrier layer, the InxGa1-xN gesture Well layer and the total 8-12 cycle of GaN barrier layer alternating growths.Preferably, it before the step of growing the multiple quantum well layer 70, also wraps It includes the surface growth stress releasing layer 60 of the second n-type doping GaN layer 52 the step of.Grow the stress release layer 60 Step may include that the In of 3-9 cycle is grown at 850 DEG C~950 DEG CyGa1-yN layers (y value ranges are 0-0.1, with cycle Number increase and be gradually reduced) and low-mix Si GaN layer.
Preferably, may include stone the step of forming graphene layer before the step of growing buffer layer 20 Chemical vapour deposition technique (CVD) formation may be used in black alkene layer, and the formation temperature of the graphene layer can be 500 DEG C~600 ℃。
In one embodiment, the temperature of growing P-type doped gan layer can be 1050 DEG C~1090 DEG C.The p-type is grown Further include the steps that growth transparency conducting layer 90 after doped gan layer, the growth temperature of the transparency conducting layer 90 can be 300 DEG C~400 DEG C.Preferably, the surface point of the second n-type doping GaN layer 52 and the transparency conducting layer 90 can also be included in It Xing Cheng not n-electrode 101 and the step of p-electrode 102.
Embodiment
(1) Sapphire Substrate 10 is provided;
(2) Cu is evaporated in the Sapphire Substrate 10 with means of electron beam deposition (PVD);
(3) one layer of 20nm graphene layer is grown under the conditions of 540 DEG C with chemical vapour deposition technique (CVD);
(4) it is passed through ammonia, hydrogen and trimethyl gallium, grows the buffer layer of 20nm on the graphene layer at 1000 DEG C 20;
(5) it is passed through ammonia, hydrogen and trimethyl gallium, growing 1.5 μm on the buffer layer 20 at 1080 DEG C fills and leads up Layer 30;
(6) it is passed through ammonia, hydrogen, Zn metal vapors and Ge metal vapors, is grown on the buffer layer 30 at 900 DEG C The 2nd ZnGeN of 5.5nm2Barrier layer 42;
(7) it is passed through silane (SiH4), ammonia, hydrogen and trimethyl gallium, grown on the buffer layer 20 at 1080 DEG C The first doped N-type doped gan layer 51 of 0.8um;
(8) it is passed through silane (SiH4), ammonia, hydrogen and trimethyl gallium, in first doped N-type at 1080 DEG C Grown in doped gan layer 51 90 cycles third doped N-type doped gan layer and the 4th GaN layer as GaN transition layer 53, When the middle growth third doped gan layer, the silane (SiH4), the flow-rate ratio that is passed through of ammonia and trimethyl gallium be 90:60: 550, it is not passed through SiH when growing four GaN layer4
(8) it is passed through ammonia, hydrogen, Zn metal vapors and Ge metal vapors, is given birth in the GaN transition layer 53 at 900 DEG C The first ZnGeN of long 5.5nm2Barrier layer 41;
(7) it is passed through silane (SiH4), ammonia, hydrogen and trimethyl gallium, in the first ZnGeN at 1070 DEG C2It is raw on barrier layer 41 The second n-type doping GaN layer 52 of long 0.8um;
The In of 6 cycles is grown at (8) 900 DEG CyGa1-yN layers (y value ranges are 0-0.1, gradual with recurring number increase Reduce) and low-mix Si GaN layer as stress release layer 60, the InyGa1-yN layers of thickness is 3.4-2.6nm (with recurring number Increase and be gradually reduced), GaN layer thickness described in single layer is 13nm;
(9) In of 2-3nm is grown at 780-830 DEG C of low temperature on the stress release layer 60xGa1-xN potential well layers (x= 0.20-0.22), then temperature is increased to 850-930 DEG C of growth 10-12nm GaN barrier layer, the InxGa1-xN potential well layers and GaN Totally 10 cycles are used as the multiple quantum well layer 70 to barrier layer alternating growth;
(10) it is passed through two luxuriant magnesium, ammonia, nitrogen and trimethyl gallium, the thick p-types for mixing Mg of 100nm are grown at 1000 DEG C and are mixed Miscellaneous GaN layer 80;
Layer of transparent conductive layer 90 is grown at (11) 330 DEG C in p-type doped gan layer 80;
At (12) 600 DEG C, n is generated respectively on the surface of the transparency conducting layer 90 and the second n-type doping GaN layer 52 Electrode 101 and p-electrode 102.
Each technical characteristic of embodiment described above can be combined arbitrarily, to keep description succinct, not to above-mentioned reality It applies all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not deposited In contradiction, it is all considered to be the range of this specification record.
Several embodiments of the invention above described embodiment only expresses, the description thereof is more specific and detailed, but simultaneously Cannot the limitation to the scope of the claims of the present invention therefore be interpreted as.It should be pointed out that for those of ordinary skill in the art For, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to the guarantor of the present invention Protect range.Therefore, the protection domain of patent of the present invention should be determined by the appended claims.

Claims (11)

1. a kind of GaN base LED structure, which is characterized in that include successively from bottom to up:Substrate, the first n-type doping GaN layer, first ZnGeN2Barrier layer, the second n-type doping GaN layer, multiple quantum well layer and p-type doped gan layer.
2. GaN base LED structure according to claim 1, which is characterized in that further include buffer layer and the 2nd ZnGeN2Blocking Layer, the buffer layer are arranged between the substrate and the first n-type doping GaN layer, the 2nd ZnGeN2Barrier layer is set It sets between the buffer layer and the first n-type doping GaN layer.
3. GaN base LED structure according to claim 2, which is characterized in that the 2nd ZnGeN2The thickness on barrier layer is 5-6nm, the first ZnGeN2The thickness on barrier layer is 5-6nm.
4. GaN base LED structure according to claim 1, which is characterized in that further include GaN transition layer, the GaN transition Layer includes recycling the third n-type doping GaN layer and the 4th GaN layer of superposition from bottom to up, and the GaN transition layer setting is described the One n-type doping GaN layer and the first ZnGeN2Between barrier layer, the doping of the first n-type doping GaN layer and described The doping of three n-type doping GaN layers is respectively greater than the doping of the second n-type doping GaN layer, the first n-type doping GaN The doping of layer and the doping of the third n-type doping GaN layer are respectively greater than the doping of the 4th GaN layer.
5. GaN base LED structure according to claim 4, which is characterized in that the material table of the first n-type doping GaN layer It is shown as SixGa1-xThe value range of N, the x are 0.1~0.15;The material of the second n-type doping GaN layer 52 is expressed as SiyGa1-yThe value range of N, the y are 0.005~0.006;The material of the third n-type doping GaN layer is expressed as SimGa1- mThe value range of N, the m are 0.1~0.15;And the material of the 4th GaN layer is expressed as SinGa1-nN, the n's takes Value ranging from 0~0.006.
6. GaN base LED structure according to claim 4, which is characterized in that the thickness of the first n-type doping GaN layer is The thickness of 0.5-1um, the GaN transition layer are 0.5-1um, and the thickness of the second n-type doping GaN layer is 0.5-1um.
7. a kind of preparation method of GaN base LED structure, includes the following steps:
Substrate is provided;And
The first n-type doping of epitaxial growth GaN layer, the first ZnGeN successively over the substrate2Barrier layer, the second n-type doping GaN Layer, multiple quantum well layer and p-type doped gan layer.
8. the preparation method of GaN base LED structure according to claim 7, which is characterized in that do not growing the first N It is further comprising the steps of before type doped gan layer:
Epitaxial growth buffer over the substrate;And
The 2nd ZnGeN of epitaxial growth on the buffer layer2Barrier layer.
9. the preparation method of GaN base LED structure according to claim 7, which is characterized in that growth first N-type is mixed The step of miscellaneous GaN layer includes being passed through flow-rate ratio as (90~95):50:Silane, ammonia and the trimethyl gallium of (550~590), growth With include that be passed through flow-rate ratio be (4~6) the step of the growth of the second n-type doping GaN layer:60:The silane of (550~590), Ammonia and trimethyl gallium.
10. the preparation method of GaN base LED structure according to claim 8, which is characterized in that the first ZnGeN2Blocking Layer and the 2nd ZnGeN2The growth temperature on barrier layer is 850 DEG C~950 DEG C.
11. the preparation method of GaN base LED structure according to claim 8, which is characterized in that growth the first ZnGeN2 Barrier layer and the 2nd ZnGeN2The step of barrier layer includes:In NH3And H2In environment, it is passed through the metal vapors of Zn and Ge, institute The ratio for stating the volume flow of Zn and Ge is (45~55):(45~55).
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