CN103887158A - Ex situ process method for titanium silicon compound - Google Patents
Ex situ process method for titanium silicon compound Download PDFInfo
- Publication number
- CN103887158A CN103887158A CN201210557492.5A CN201210557492A CN103887158A CN 103887158 A CN103887158 A CN 103887158A CN 201210557492 A CN201210557492 A CN 201210557492A CN 103887158 A CN103887158 A CN 103887158A
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- Prior art keywords
- silicon compound
- titanium
- cvd
- titanium silicon
- deposition
- Prior art date
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- UGACIEPFGXRWCH-UHFFFAOYSA-N [Si].[Ti] Chemical compound [Si].[Ti] UGACIEPFGXRWCH-UHFFFAOYSA-N 0.000 title claims abstract description 27
- 238000011066 ex-situ storage Methods 0.000 title claims abstract description 13
- 238000000034 method Methods 0.000 title abstract description 17
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims abstract 3
- 238000005229 chemical vapour deposition Methods 0.000 claims description 26
- 238000000151 deposition Methods 0.000 claims description 20
- 238000004519 manufacturing process Methods 0.000 claims description 15
- 238000007669 thermal treatment Methods 0.000 claims description 10
- 229910052751 metal Inorganic materials 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims description 5
- 230000005611 electricity Effects 0.000 claims description 4
- 239000002002 slurry Substances 0.000 claims description 4
- 239000010936 titanium Substances 0.000 abstract description 17
- 230000008021 deposition Effects 0.000 abstract description 9
- 238000005137 deposition process Methods 0.000 abstract description 2
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 17
- 229910052719 titanium Inorganic materials 0.000 description 7
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 6
- 238000005240 physical vapour deposition Methods 0.000 description 5
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 5
- 229910052721 tungsten Inorganic materials 0.000 description 5
- 239000010937 tungsten Substances 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 239000012790 adhesive layer Substances 0.000 description 3
- 239000010410 layer Substances 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000004062 sedimentation Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
The invention relates to an ex situ process method for titanium silicon compound. Ti deposition in a PVD deposition system and TiN deposition in a CVD deposition system are respectively carried out, an RTA process is carried out before TiN deposition, stress generated in the deposition process is released, so cavities in the titanium silicon compound are eliminated. The ex situ process method for the titanium silicon compound improves the structure of the titanium silicon compound, improves quality of the titanium silicon compound, reduces contact resistance and improves the yield rate of products.
Description
Technical field
The present invention relates to field of semiconductor manufacture, relate in particular to a kind of ex situ manufacturing method thereof of titanium-silicon compound.
Background technology
The manufacture process of silicon chip is divided into the processing procedure of leading portion components and parts and the connection of back segment plain conductor and passivation layer processing procedure, and FEOL mainly comprises following steps: 1, STI(shallow trench isolation) formation (isolation between definition active region and device); 2, well region Implantation is in order to adjust electrically; 3, the formation of grid; 4, the formation of source/drain electrode; 5, the formation of silicide.Wherein, the processing procedure of silicide comprises following steps: 1, Ti(titanium)+TiN(titanium nitride) deposition; 2, RTA(rapid thermal treatment) form titanium-silicon compound; 3. the deposition of W (tungsten).Titanium-silicon compound is contact resistance value for reducing contact, and contact is the coupling part of device and metal wire, and it is distributed on polysilicon and active area, and the processing procedure of contact comprises following steps: 1, the photoetching of contact; 2, the etching of contact and photoresist are removed; 3, the deposition of adhesive layer; 4, W(tungsten) deposition.Due to W(tungsten) more difficult being attached on titanium-silicon compound, and adhesive layer is the one deck adding in order to strengthen adhesiveness, so must first deposit adhesion layer deposit W(tungsten again).The composition of this adhesive layer is Ti and TiN, adopts respectively PVD(physical vapour deposition (PVD)) and CVD(chemical vapour deposition (CVD)) mode makes.
As shown in Figure 1, on silicon substrate, first form titanium-silicon compound, then deposit adhesion layer Ti/TiN, then deposit W(tungsten).The processing procedure of titanium-silicon compound is to utilize in-situ method depositing Ti (titanium) and TiN(titanium nitride at present),, first in first settling chamber in an integrated depositing system of complete PVD/CVD, adopt IMP(ionized metal electricity slurry) mode depositing Ti (titanium), then in second settling chamber, adopt CVD(chemical vapour deposition (CVD)) mode depositing TiN (titanium nitride), afterwards device is taken out in depositing system, carry out RTA(rapid thermal treatment).But due to successive sedimentation Ti(titanium) and TiN(titanium nitride) very large stress can be produced, this stress upwards can be by Ti(titanium) up draw, thereby in titanium-silicon compound, produce cavity as shown in Figure 1, the structure of titanium-silicon compound is destroyed, Quality Down, this just causes contact resistance to become large.When wafer is done to WAT testing electrical property, the resistance of contact resistance can be up to 10
5Ω (normal value is approximately 300 Ω), this yield to product has produced adverse effect.
Summary of the invention
The ex situ manufacturing method thereof of a kind of titanium-silicon compound provided by the invention, has eliminated the stress producing in processing procedure well, has improved the structure of titanium-silicon compound, has promoted product quality.
In order to achieve the above object, the invention provides a kind of ex situ manufacturing method thereof of titanium-silicon compound, comprise following steps:
Step 1, employing IMP ionized metal electricity slurry mode depositing Ti;
Step 2, the RTA rapid thermal treatment of carrying out;
Step 3, employing CVD chemical vapour deposition (CVD) mode depositing TiN;
Step 4, employing CVD chemical vapour deposition (CVD) mode deposit W.
The temperature of described RTA rapid thermal treatment is 500~900 degree.
The time range of described RTA rapid thermal treatment is 10 seconds~2 minutes.
The present invention has eliminated the stress producing in processing procedure well, has improved the structure of titanium-silicon compound, has promoted product quality.
Brief description of the drawings
Fig. 1 is the schematic diagram that adopts the titanium-silicon compound with cavity blemish of original position manufacturing method thereof production in background technology;
Fig. 2 is the schematic diagram that adopts the titanium-silicon compound of ex situ manufacturing method thereof production of the present invention.
Embodiment
Illustrate preferred embodiment of the present invention according to Fig. 2 below.
The ex situ manufacturing method thereof that the invention provides a kind of titanium-silicon compound, comprises following steps:
Step 1, employing IMP(ionized metal electricity slurry) mode depositing Ti (titanium);
Step 2, the RTA(rapid thermal treatment of carrying out);
Step 3, employing CVD(chemical vapour deposition (CVD)) mode depositing TiN (titanium nitride);
Step 4, employing CVD chemical vapour deposition (CVD) mode deposit W.
The temperature of RTA rapid thermal treatment is 500~900 degree, and time range is 10 seconds~2 minutes.
As shown in Figure 2, according to ex situ manufacturing method thereof, respectively in PVD depositing system depositing Ti and in CVD depositing system depositing TiN, before RTA process is advanceed to depositing TiN, carry out, so just discharged the stress producing in deposition process, eliminated the cavity in titanium-silicon compound, improve the structure of titanium-silicon compound, the quality that has improved titanium-silicon compound, has reduced contact resistance, has promoted product yield.
Although content of the present invention has been done detailed introduction by above preferred embodiment, will be appreciated that above-mentioned description should not be considered to limitation of the present invention.Read after foregoing those skilled in the art, for multiple amendment of the present invention and substitute will be all apparent.Therefore, protection scope of the present invention should be limited to the appended claims.
Claims (3)
1. an ex situ manufacturing method thereof for titanium-silicon compound, is characterized in that, comprises following steps:
Step 1, employing IMP ionized metal electricity slurry mode depositing Ti;
Step 2, the RTA rapid thermal treatment of carrying out;
Step 3, employing CVD chemical vapour deposition (CVD) mode depositing TiN;
Step 4, employing CVD chemical vapour deposition (CVD) mode deposit W.
2. the ex situ manufacturing method thereof of titanium-silicon compound as claimed in claim 1, is characterized in that, the temperature of described RTA rapid thermal treatment is 500~900 degree.
3. the ex situ manufacturing method thereof of titanium-silicon compound as claimed in claim 2, is characterized in that, the time range of described RTA rapid thermal treatment is 10 seconds~2 minutes.
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CN201210557492.5A CN103887158A (en) | 2012-12-20 | 2012-12-20 | Ex situ process method for titanium silicon compound |
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CN201210557492.5A CN103887158A (en) | 2012-12-20 | 2012-12-20 | Ex situ process method for titanium silicon compound |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105336717A (en) * | 2014-07-14 | 2016-02-17 | 北大方正集团有限公司 | Lead wire hole and manufacturing method thereof, transistor and CMOS transistor |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1263637A (en) * | 1997-07-11 | 2000-08-16 | 艾利森电话股份有限公司 | A process for manufacturing IC-components to be used at radio frequencies |
CN1630044A (en) * | 2003-12-18 | 2005-06-22 | 上海华虹Nec电子有限公司 | Method for forming titanium-silicon compound on sub-micron digital integrated circuit |
US20080124915A1 (en) * | 2006-06-14 | 2008-05-29 | Sanyo Electric Co., Ltd. | Method for manufacturing semiconductor device |
CN101192560A (en) * | 2006-11-28 | 2008-06-04 | 中芯国际集成电路制造(上海)有限公司 | Contact hole filling method |
-
2012
- 2012-12-20 CN CN201210557492.5A patent/CN103887158A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1263637A (en) * | 1997-07-11 | 2000-08-16 | 艾利森电话股份有限公司 | A process for manufacturing IC-components to be used at radio frequencies |
CN1630044A (en) * | 2003-12-18 | 2005-06-22 | 上海华虹Nec电子有限公司 | Method for forming titanium-silicon compound on sub-micron digital integrated circuit |
US20080124915A1 (en) * | 2006-06-14 | 2008-05-29 | Sanyo Electric Co., Ltd. | Method for manufacturing semiconductor device |
CN101192560A (en) * | 2006-11-28 | 2008-06-04 | 中芯国际集成电路制造(上海)有限公司 | Contact hole filling method |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105336717A (en) * | 2014-07-14 | 2016-02-17 | 北大方正集团有限公司 | Lead wire hole and manufacturing method thereof, transistor and CMOS transistor |
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