CN103885518A - Small-area and ultralow-noise LDO - Google Patents
Small-area and ultralow-noise LDO Download PDFInfo
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- CN103885518A CN103885518A CN201410117905.7A CN201410117905A CN103885518A CN 103885518 A CN103885518 A CN 103885518A CN 201410117905 A CN201410117905 A CN 201410117905A CN 103885518 A CN103885518 A CN 103885518A
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Abstract
The invention belongs to the field of power management and particularly relates to a small-area and ultralow-noise LDO. The LDO comprises a fore-stage pre-regulation module and a post-stage regulation module. The fore-stage pre-regulation module comprises an error amplifier, a resistance potential-divider network and an RC low-pass filter, wherein the error amplifier, the resistance potential-divider network and the RC low-pass filter are connected in sequence. The post-stage regulation module comprises a post-stage error amplifier and a PMOS pass transistor. The output of the fore-stage pre-regulation module is connected with the input of the post-stage regulation module, and the input of the post-stage regulation module is connected with a load current source. According to the LDO, it can be guaranteed that a low-pass filter circuit has very low cut-off frequency just through very small capacitance to filter out noise produced by a reference voltage source, and voltage obtained after conversion can be output with ultralow noise; meanwhile, the area of a chip is greatly reduced and the noise performance of the circuit is greatly improved; furthermore, a high power supply rejection ratio can be achieved.
Description
Technical field
The invention belongs to field of power management, especially relate to the LDO linear voltage regulator of a kind of small size and ultra-low noise.
Background technology
Along with the development of integrated circuit technique, integrated level and the frequency of operation of chip system constantly raise, and so just caused the continuous rising of chip power-consumption, and the variety of issue that high power consumption is brought can have a strong impact on the performance of chip.Thereby for a chip system, the quality of power management part has determined the performance of whole system to a great extent.
The chip of LDO linear voltage regulator has the advantages such as area is little, noise is low, quiescent current is little, peripheral components also lacks, and it is widely used in portable type electronic product.It not only can be used as independently power management chip is various portable type electronic product power supplies, more can be combined with DC-DC switching type power supply, the advantage of the two is given full play to, for client provides high-level efficiency and low noise electric power system.But current power management chip market is mainly occupied by offshore company, domestic development is still in the stage at the early-stage, and the LDO linear voltage regulator that therefore exploitation has an independent intellectual property right has a very big significance.
The volume of portable product is constantly dwindling, and cost is also in continuous reduction, and under the prerequisite of guaranteed performance, volume is less, cost is lower, the better product of performance is inevitable more competitive.How to make the package dimension of LDO linear voltage regulator integrated circuit more and more less, package thickness is more and more thinner, noise is more and more less has a far reaching significance.
Summary of the invention
The present invention solves the existing technical matters of prior art; Thereby the capacity area that provides a kind of capacitor amplifier circuit to reduce to use reduces the area of chip, and in the situation that using this little circuit, just can realize the ultra-low noise output of LDO linear voltage regulator, reduce greatly chip area and the noiseproof feature that has improved circuit, can produce a kind of small size of very high Power Supply Rejection Ratio and the LDO linear voltage regulator of ultra-low noise simultaneously.
Above-mentioned technical matters of the present invention is mainly solved by following technical proposals:
A LDO linear voltage regulator for small size and ultra-low noise, is characterized in that, comprises two-stage adjusting module, respectively: prime pre-adjustment module and rear class adjusting module; Described prime pre-adjustment module comprises the error amplifier, resistance pressure-dividing network and the RC low-pass filter that connect successively; Described rear class adjusting module comprises that rear class error amplifier, PMOS adjust pipe; The output of prime pre-adjustment module is connected with the input of rear class adjusting module; Described rear class adjusting module input connects load current source.
The invention after reference voltage is relatively exported, used noise filter circuit, by by the most filtering of noise after reference voltage source, thus ultra-low noise output that can implement device.In general circuit common, due to the relation of selected frequency band, in order to make filter effect better, require the filter capacitor of use very large, the usable floor area of this chip just increasing is difficult to realize on engineering is produced.This structure has overcome this difficulty, only uses very little electric capacity just can reach same performance, thereby has reduced greatly the occupied area of chip, engineering is produced and become feasible.
The structure of circuit that the present invention carries is to realize under the process structure of 0.18um.According to the simulation result of circuit, in the time that this LDO linear voltage stabilization apparatus is selected filter capacitor size for 5pF, in the selected frequency band of 10Hz-1KHz, can reach the output noise performance of 25.5uV, in the selected frequency band of 1KHz-1MHz, can reach the output noise performance of 56.4uV.Meanwhile, simulation result shows that the Power Supply Rejection Ratio PSR of this LDO linear voltage stabilization apparatus is at least can reach within the scope of 10Hz-1MHz-30dB at selected frequency band, at can reach-70dB of low frequency place.
At above-mentioned a kind of small size and the LDO linear voltage regulator of ultra-low noise, the negative termination of described error amplifier be reference voltage V
ref, positive terminal is connected between the resistance R 1 and resistance R 2 of resistance pressure-dividing network, and wherein resistance R 1 and resistance R 2 are connected, and resistance R 1 one termination PMOS adjust pipe, other end connecting resistance R2, resistance R 2 one terminating resistor R1, other end ground connection.The output terminal of error amplifier is connected to RC low-pass filter.
At above-mentioned a kind of small size and the LDO linear voltage regulator of ultra-low noise, described RC low-pass filter comprises resistance R and capacitor amplifier circuit; Described capacitor amplifier circuit comprises that little capacitor C m, mutual conductance are-trsanscondutance amplifier and the resistance R m of Gm; Wherein, resistance R connects error amplifier output, and the resistance R other end is connected with trsanscondutance amplifier, connecting resistance Rm after capacitor C m is in parallel with trsanscondutance amplifier, ground connection after the resistance R m other end is connected with resistance R 2.By this amplifying circuit, little capacitor C m can be zoomed into large electric capacity, with resistance R composition RC low-pass filter.
At above-mentioned a kind of small size and the LDO linear voltage regulator of ultra-low noise, the negative termination of described rear class error amplifier be the output through the prime pre-adjustment structure after low-pass filtering, the drain electrode that positive terminal and PMOS adjust pipe is connected to system output, the output termination of rear class error amplifier be the grid end that PMOS adjusts pipe.The grid that PMOS adjusts pipe is connected with the output of rear class error amplifier, source termination power, and drain terminal connects load current source; Load current source is analog equivalent load current.
Therefore, tool of the present invention has the following advantages: in (1) circuit structure, adopted two-stage reference source comparator circuit to make reference voltage more accurate, thereby can make the degree of accuracy of output voltage significantly improve; (2) in prime pre-adjustment structural circuit, used filtering circuit, made to come from the noise of band gap reference and obtained effective inhibition from the noise on electric resistance partial pressure, thereby total output noise is reduced; (3) filtering circuit in prime pre-adjustment structure has used electric capacity multiplying arrangement, we just can produce and the large identical effect of electric capacity after only need to using a very little electric capacity to amplify by trsanscondutance amplifier, reduce the use of chip area, the low occupation rate object of circuit is guaranteed; (4) the pre-adjustment reference voltage source of exporting after pre-adjustment does not basically contain noise after by filtering circuit, compare mutually the amplification that just can not cause noise to pass through second level error amplifier with traditional LDO linear voltage regulator, so noise can effectively be suppressed; (5) second level is adjusted in structure and is not carried out sampling and outputting voltage with electric resistance partial pressure device, thereby has avoided the voltage of output terminal to be subject to the impact of resistance noise, has realized the ultra-low noise output of circuit; (6) LDO linear voltage stabilization apparatus as herein described, due to the output of its ultra-low noise, can reach very high Power Supply Rejection Ratio, has improved significantly the performance of voltage changer.
Accompanying drawing explanation
Accompanying drawing 1 is the circuit theory diagrams of traditional LDO linear transformation apparatus.
Accompanying drawing 2 is noise analysis schematic diagrams of traditional LDO linear transformation apparatus.
But accompanying drawing 3 is can realize low noise the circuit theory diagrams that but can not solve the LDO linear transformation apparatus of chip area problems of too.
Accompanying drawing 4 is physical circuit schematic diagrams of the LDO linear transformation apparatus after improvement of the present invention.
Accompanying drawing 5 is simulation result figure that described LDO linear transformation apparatus adopts the output noise of different sized capacitors to change within the scope of 10Hz-1KHz.
Accompanying drawing 6 is simulation result figure that described LDO linear transformation apparatus adopts the output noise of different sized capacitors to change within the scope of 1KHz-1MHz.
Accompanying drawing 7 is described LDO linear transformation apparatus simulation result figure that its Power Supply Rejection Ratio changes within the scope of 10Hz-1MHz.
Embodiment
Below by embodiment, and by reference to the accompanying drawings, technical scheme of the present invention is described in further detail.
Embodiment:
Figure 1 shows that the ultimate principle figure of traditional LDO linear transformation apparatus, be mainly divided into reference voltage source (not providing in way), error amplifier, PMOS power delivery pipe and resitstance voltage divider sampling network.Wherein the reference voltage of reference voltage source is provided by band-gap reference.One end access reference voltage source of error amplifier, the sampled voltage of other end access electric resistance partial pressure device, difference input, through error amplifier rear drive PMOS power tube, obtains needed output voltage in the time that circuit arrives steady state (SS).
Circuit diagram shown in Fig. 2 is the Noise Theory analytical model figure of traditional LDO linear transformation apparatus, and wherein overriding noise derives from the output noise V of bandgap voltage reference
2 n,
bG, the input noise V of error amplifier
2 n,
ampthermonoise V with resistance generation in resitstance voltage divider
2 n,
r1and V
2 n,
r2.
Circuit diagram shown in Fig. 3 is the circuit theory diagrams of the LDO linear transformation apparatus after general improvement, and its circuit is divided into pre-adjustment part and adjustment member two-layer configuration.The pre-adjustment part of circuit is made up of band-gap reference impact damper and R-C low-pass filter circuit, the sampled voltage that wherein front end of amplifier input bandgap voltage reference and resitstance voltage divider R1 and R2 produce, pre-reference voltage source is exported in rear end, can remove the noise being produced by bandgap voltage reference and amplifier by the effect of R-C low-pass filter circuit, the pre-reference voltage source obtaining is as the benchmark input of late-class circuit.The adjustment member of circuit is made up of error amplifier and PMOS power drive pipe.Wherein, the front end of error amplifier is input as the pre-reference voltage source of prime output and with the voltage follow mode output voltage obtaining of sampling, drives PMOS power tube to obtain needed output voltage by after error amplifier.In this structure because prime noise has obtained filtering under the effect of low-pass filter, and in late-class circuit, do not use resitstance voltage divider, so the noise of whole circuit mainly comes from error amplifier, can realize the ultra-low noise output of circuit.But, in order to realize the noise filtering of front stage circuits, the cutoff frequency of the R-C wave filter in circuit must be accomplished very low, this just requires resistance R and the capacitor C that circuit adopts must be very large, thereby can cause very large chip area, this obviously just increases the cost that engineering is manufactured greatly, therefore produces and is difficult to realize.
Fig. 4 is the circuit theory diagrams of the LDO linear voltage regulator with the output of little chip area and ultra-low noise of the present invention, is the design of R-C wave filter with the main difference part of circuit described in Fig. 3.The present invention improves filtering circuit on the basis of Fig. 3, and the structure that has adopted a kind of electric capacity to amplify reduces needed large electric capacity.Wherein, the capacitor C in Fig. 3 is replaced by very little resistance R m, Cm and negative trsanscondutance amplifier-Gm.When the value of C and the size of Rm, Cm, Gm product when roughly equal circuit can realize identical effect.The shared chip area of large electric capacity original in this circuit is very large, after using capacitor amplifier circuit, its chip area has obtained very large minimizing, can't significantly increase the cost that engineering is manufactured, and can realize the ultra-low noise output of circuit simultaneously, make commercial production become possibility.
Figure 5 shows that the present invention is the noise testing simulation result within the scope of 10Hz-1KHz at selected frequency band in the time selecting different capacitance size Cm.Show that by the result in analogous diagram circuit output noise effect can increase greatly and slightly along with the change of dielectric amplifier gain.
Figure 6 shows that the present invention is the noise testing simulation result within the scope of 1KHz-1MHz at selected frequency band in the time selecting different capacitance size Cm.Show that by the result in analogous diagram circuit output noise effect can be along with the change of dielectric amplifier gain changes greatly.
Can obtain one by the simulation result of Fig. 5 and Fig. 6 and selected parameter thereof and gather form in table 1.
The noiseproof feature simulation result of LDO in table 1 the design
Figure 7 shows that the present invention is the test emulation result of the Power Supply Rejection Ratio PSR within the scope of 10Hz-1MHz at selected frequency band.Show at least can reach-30dB of the Power Supply Rejection Ratio PSR of the present invention in selected frequency band by the result in analogous diagram, at can reach-70dB of low frequency place.
Specific embodiment described herein is only to the explanation for example of the present invention's spirit.Those skilled in the art can make various modifications or supplement or adopt similar mode to substitute described specific embodiment, but can't depart from spirit of the present invention or surmount the defined scope of appended claims.
Claims (4)
1. a LDO linear voltage regulator for small size and ultra-low noise, is characterized in that, comprises two-stage adjusting module, respectively: prime pre-adjustment module and rear class adjusting module; Described prime pre-adjustment module comprises the error amplifier, resistance pressure-dividing network and the RC low-pass filter that connect successively; Described rear class adjusting module comprises that rear class error amplifier, PMOS adjust pipe; The output of prime pre-adjustment module is connected with the input of rear class adjusting module; Described rear class adjusting module input connects load current source.
2. the LDO linear voltage regulator of a kind of small size according to claim 1 and ultra-low noise, is characterized in that, the negative termination of described error amplifier be reference voltage V
ref, positive terminal is connected between the resistance R 1 and resistance R 2 of resistance pressure-dividing network, and wherein resistance R 1 and resistance R 2 are connected, resistance R 1 one termination PMOS adjust pipe, other end connecting resistance R2, resistance R 2 one terminating resistor R1, other end ground connection, the output terminal of error amplifier is connected to RC low-pass filter.
3. the LDO linear voltage regulator of a kind of small size according to claim 2 and ultra-low noise, is characterized in that, described RC low-pass filter comprises resistance R and capacitor amplifier circuit; Described capacitor amplifier circuit comprises that little capacitor C m, mutual conductance are-trsanscondutance amplifier and the resistance R m of Gm; Wherein, resistance R connects error amplifier output, the resistance R other end is connected with trsanscondutance amplifier, connecting resistance Rm after capacitor C m is in parallel with trsanscondutance amplifier, ground connection after the resistance R m other end is connected with resistance R 2, by this amplifying circuit, little capacitor C m can be zoomed into large electric capacity, with resistance R composition RC low-pass filter.
4. the LDO linear voltage regulator of a kind of small size according to claim 3 and ultra-low noise, it is characterized in that, the negative termination of described rear class error amplifier be the output through the prime pre-adjustment structure after low-pass filtering, the drain electrode that positive terminal and PMOS adjust pipe is connected to system output, the output termination of rear class error amplifier be that PMOS adjusts the grid end of pipe, the grid that PMOS adjusts pipe is connected with the output of rear class error amplifier, source termination power, and drain terminal connects load current source; Load current source is analog equivalent load current.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410117905.7A CN103885518A (en) | 2014-03-26 | 2014-03-26 | Small-area and ultralow-noise LDO |
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| CN201410117905.7A CN103885518A (en) | 2014-03-26 | 2014-03-26 | Small-area and ultralow-noise LDO |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105892545A (en) * | 2016-06-13 | 2016-08-24 | 西安电子科技大学昆山创新研究院 | Voltage conversion circuit |
| CN108459649A (en) * | 2018-03-13 | 2018-08-28 | 李启同 | A kind of low-dropout regulator and multiple-way supply device of high stability |
| CN113359918A (en) * | 2021-06-01 | 2021-09-07 | 深圳市时代速信科技有限公司 | LDO circuit capable of outputting low noise and high PSRR |
| US11693439B2 (en) | 2021-05-25 | 2023-07-04 | Gutschsemi Limited | Voltage regulator capable of providing stable output voltage signal |
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| US4587437A (en) * | 1984-03-19 | 1986-05-06 | Rockwell International Corporation | Coupling/decoupling capacitor multiplier |
| US6522114B1 (en) * | 2001-12-10 | 2003-02-18 | Koninklijke Philips Electronics N.V. | Noise reduction architecture for low dropout voltage regulators |
| CN1825240A (en) * | 2006-03-24 | 2006-08-30 | 启攀微电子（上海）有限公司 | Low voltage difference linear voltage stabilizer circuit |
| US7397226B1 (en) * | 2005-01-13 | 2008-07-08 | National Semiconductor Corporation | Low noise, low power, fast startup, and low drop-out voltage regulator |
| CN103166582A (en) * | 2011-12-15 | 2013-06-19 | 无锡中星微电子有限公司 | Improved type capacity amplifying circuit |
| CN203745942U (en) * | 2014-03-26 | 2014-07-30 | 常州矽能电子科技有限公司 | Small-area ultra-low noise low drop out (LDO) linear voltage regulator |
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Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4587437A (en) * | 1984-03-19 | 1986-05-06 | Rockwell International Corporation | Coupling/decoupling capacitor multiplier |
| US6522114B1 (en) * | 2001-12-10 | 2003-02-18 | Koninklijke Philips Electronics N.V. | Noise reduction architecture for low dropout voltage regulators |
| US7397226B1 (en) * | 2005-01-13 | 2008-07-08 | National Semiconductor Corporation | Low noise, low power, fast startup, and low drop-out voltage regulator |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105892545A (en) * | 2016-06-13 | 2016-08-24 | 西安电子科技大学昆山创新研究院 | Voltage conversion circuit |
| CN108459649A (en) * | 2018-03-13 | 2018-08-28 | 李启同 | A kind of low-dropout regulator and multiple-way supply device of high stability |
| US11693439B2 (en) | 2021-05-25 | 2023-07-04 | Gutschsemi Limited | Voltage regulator capable of providing stable output voltage signal |
| CN113359918A (en) * | 2021-06-01 | 2021-09-07 | 深圳市时代速信科技有限公司 | LDO circuit capable of outputting low noise and high PSRR |
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Application publication date: 20140625 |