CN103871949B - The DFM method of domain - Google Patents
The DFM method of domain Download PDFInfo
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- CN103871949B CN103871949B CN201210552740.7A CN201210552740A CN103871949B CN 103871949 B CN103871949 B CN 103871949B CN 201210552740 A CN201210552740 A CN 201210552740A CN 103871949 B CN103871949 B CN 103871949B
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- 238000000034 method Methods 0.000 title claims abstract description 52
- 238000013461 design Methods 0.000 claims abstract description 26
- 238000001914 filtration Methods 0.000 claims abstract description 14
- 238000012937 correction Methods 0.000 claims abstract description 9
- 238000007689 inspection Methods 0.000 claims abstract description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 14
- 229910052710 silicon Inorganic materials 0.000 claims description 14
- 239000010703 silicon Substances 0.000 claims description 14
- 238000002310 reflectometry Methods 0.000 claims description 13
- 230000000737 periodic effect Effects 0.000 claims description 5
- 238000001259 photo etching Methods 0.000 abstract description 8
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
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Abstract
The invention discloses a kind of DFM method of domain, comprise step: respectively local pattern density inspection is carried out to current layer and front layer domain.Filter out the region that local pattern density is all less than the first pattern density specification value, fill redundant pattern in this region.The local pattern density filtering out front layer domain is less than the region of second graph density specification value, adjusts the critical size of the figure in the same area of current layer domain.The local pattern density filtering out front layer domain is less than the region of the 3rd pattern density specification value, filter out in the same area of current layer domain figure CD be less than size minimum gauge value and and the figure of front layer domain between interval be less than the second graph of distance minimum gauge value, this critical size and interval are adjusted.OPC correction is carried out to revised current layer domain.The present invention can eliminate the impact of front layer pattern, reduces photoetching process difficulty, makes design layout more easily manufactured.
Description
Technical field
The present invention relates to a kind of semiconductor integrated circuit method of manufacturing technology, particularly relate to a kind of applicable industrial design (DesignforManufacturing, DFM) method of domain.
Background technology
Along with the development of ultra-large semiconductor integrated circuit manufacturing process, the transistor number of unit are constantly increases, and the size of corresponding single transistor is constantly reducing.And the pattern technology of main flow realizes mainly through photoetching.And constantly reducing along with design size, transistor size is more and more close to the limit of optical resolution.Now much small changes in process parameters all can have an impact to litho pattern.Wherein exposure energy, focal length, exposure wavelength, numerical aperture etc. technological parameter is known, but has other parameters a lot of to be then uncared-for.Shoulder height difference wherein below 500 dusts and the pattern density of regional area, wherein ignore by people, but in below 45nm manufacturing process, or in the photoetching process of k1 < 0.3, the impact of this difference is very large.Recently the similar phenomenon of a lot of bibliographical information has been had.
Applicable industrial design is also manufacturing design method DFM (DesignForManufacturing) is a kind of new method for designing proposed for this problem.By revising circuit design layout, evading some and comparing the design configuration being difficult to manufacture, making circuit design more easily manufactured.In all DFM methods, it is a kind of more common method that redundant pattern fills (dummyinserting), it can solve the figure load effect (PatternLoadingEffect) in CMP and etching technics, also been proposed much concrete method of operation in this field.But there is following problem in common dummy fill method: more pay attention to the requirement meeting global pattern density after filling, and the density ignoring regional area figure judges.As long as its reason it has been generally acknowledged that in conventional lithography process that the change of local pattern density can not affect photoetching process in rational scope, but in fact can have an impact in the technique of k1<0.3.
Simultaneously existing DFM method comprises redundant pattern and fills and all substantially do not consider front layer pattern, and only considers this layer pattern, and its reason it has been generally acknowledged that techniques such as only having etching, CMP just has figure load effect, and this effect is relevant with current layer figure.And in a lithographic process, bottom anti-reflection layer (BARC) technique can be used to eliminate the difference of substrate level and reflectivity to small size figure, traditional concept thinks for the photoetching process having BARC, and lower floor's figure is the performance not affecting photoetching process.
Even if but found through experiments and in fact employ BARC technique, for the current layer litho pattern of k1<0.3, the following factors of lower floor's figure still can have an impact, and line density is larger, and more hour, this impact is more obvious for critical size:
1. lower floor's pattern density
2. the distance of lower floor's figure and current layer figure
3. the size of current layer figure
As shown in Figure 1, be one and do not consider front layer pattern according to existing DFM method, after only current layer figure being revised, the actual critical size of the figure at diverse location place and depth of focus curve in current layer domain; Fig. 1 illustrates the impact of front layer pattern on current layer figure.
Wherein abscissa P1 ~ P5 is the distance of layer pattern before current layer Graph Distance, front layer pattern is the square of 200 microns × 200 microns, and there are not other figures in 1000 microns × 1000 um region, the step that a height is 200 dusts is formed between this front layer pattern and silicon chip, this technique meets p=k1 × λ/NA, wherein k1=0.29.Wherein:
The CD dimension curve being made in the actual graphical on silicon chip corresponding to current layer layout patterns of the identical critical size (CD) of P1 ~ P5 diverse location when curve 101 is for there being a BARC.
The CD dimension curve being made in the actual graphical on silicon chip corresponding to current layer layout patterns of the identical critical size (CD) of P1 ~ P5 diverse location when curve 102 is not for having a BARC.
Depth of focus (DOF) block diagram being made in the actual graphical on silicon chip corresponding to current layer layout patterns of the identical critical size (CD) of P1 ~ P5 diverse location when column Figure 103 is for there being a BARC.
The depth of focus block diagram being made in the actual graphical on silicon chip corresponding to current layer layout patterns of the identical critical size (CD) of P1 ~ P5 diverse location when column Figure 104 is not for having a BARC.
Can obviously see, the CD size of P1 ~ P5 position and DOF all have difference, if want to make the current layer figure of P1 position to obtain the identical performance with P5 position, must consider that front layer pattern is revised current layer figure.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of DFM method of domain, and before eliminating, layer pattern is on the impact of current layer figure, reduces the difficulty of photoetching process, makes design layout more easily manufactured.
For solving the problems of the technologies described above, the DFM method of domain provided by the invention is used for carrying out DFM correction to design layout, described design layout comprises multilayer domain, DFM revises and carries out for wherein one deck domain each time, this layer of domain is current layer domain, front one deck domain of described current layer domain is front layer domain, and the first figure of described front layer domain can form step on silicon chip, and described DFM method adopts following steps to carry out DFM correction to described current layer domain:
Step one, carry out local pattern density inspection respectively to described current layer domain and described front layer domain, the local pattern density of the local pattern density distribution and described front layer domain that obtain described current layer domain distributes.
Step 2, set the first pattern density specification value, the local pattern density filtering out described current layer domain and described front layer domain is all less than the primary importance region of described first pattern density specification value, redundant pattern is filled in the described primary importance region of described current layer domain, this redundant pattern is arranged by multiple redundant pattern block and forms, the not overlapping and segment distance of being separated by of first figure of described redundant pattern and described front layer domain, the not overlapping and segment distance of being separated by of the second graph of described redundant pattern and described current layer domain.
Step 3, setting second graph density specification value, the local pattern density filtering out described front layer domain is less than the second place region of described second graph density specification value, in described current layer domain, select three band of position identical with the second place regional location of described front layer domain, to described current layer domain be arranged in described 3rd band of position and and described first figure of described front layer domain have the critical size of overlapping second graph to adjust.
The distance minimum gauge value of step 4, setting the 3rd pattern density specification value, the size minimum gauge value of second graph size of described current layer domain, the distance between the second graph of described current layer domain and the first figure of described front layer domain, the local pattern density filtering out described front layer domain is less than the 4th band of position of described 3rd pattern density specification value, selects five band of position identical with the 4th position, the band of position of described front layer domain in described current layer domain; Filter out in the 5th band of position of described current layer domain graphics critical dimension be less than described size minimum gauge value and and do not have between described first figure overlapping and and interval between described first figure be less than the second graph of described distance minimum gauge value, the critical size of described second graph is adjusted, the interval between described second graph and the first figure of corresponding described front layer domain is adjusted.
Step 5, carry out optical approach effect correction (OpticalProximityCorrection, OPC) to through the revised described current layer domain of above-mentioned DFM.
Further improvement is, the described local pattern density inspection carried out domain in step one comprises as follows step by step:
11st step, set the pattern density difference maximum specification value of pattern density difference of the first stepping cell size, the first single step value, pattern density maximum specification value, adjacent cells.
12nd step, in X direction or Y-direction domain is scanned, scanning element is of a size of described first stepping cell size, and the step value between scanning element is described first single step value, calculates the pattern density of each scanning element of domain.
13rd step, the pattern density of each two adjacent scanning elements calculating domain are poor.
14th step, filter out the scanning element that pattern density is greater than described pattern density maximum specification value, and filter out each adjacent scanning element that pattern density difference is greater than described pattern density difference maximum specification value.
Further improvement is, the method for filling described redundant pattern in step 2 comprises as follows step by step:
21st step, the minimum dimension setting described redundant pattern block and minimum spacing.
22nd step, the local pattern density filtering out described current layer domain and described front layer domain are all less than the described primary importance region of described first pattern density specification value.
23rd step, be can fill the first subregion of described redundant pattern block and the second subregion of described redundant pattern block can not be filled by the described primary importance Region dividing of described current layer domain; The criterion of described second subregion for: described second subregion by the first graphic limit being positioned at described front layer domain stretch out region one that value that described minimum dimension adds described minimum spacing surrounds and the second graph border that is positioned at described current layer domain stretch out region two that value that described minimum dimension adds described minimum spacing surrounds or computing obtain.
24th step, be initial with the outer boundary of described second subregion, in described first subregion, carry out ring-type filling along the second graph of the first figure of described front layer domain or described current layer domain.
Further improvement is, step 3 comprises as follows step by step:
The region that the difference of the reflectivity that the first figure of the 31st step, selected described front layer domain is formed outside the reflectivity of the first figure of the poor and described front layer domain of the shoulder height being greater than 100 dusts and the first figure on silicon chip is greater than 2%.
32nd step, set the second stepping cell size, the second single step value and described second graph density specification value.
33rd step, in X direction or Y-direction described front layer domain is scanned, scanning element is of a size of described second stepping cell size, step value between scanning element is described second single step value, calculate the pattern density of each scanning element of described front layer domain, filter out the described second place region that local pattern density is less than described second graph density specification value.
34th step, in described current layer domain, select three band of position identical with the second place regional location of described front layer domain.
35th step, to described current layer domain be arranged in described 3rd band of position and and described first figure of described front layer domain have the critical size of overlapping second graph to adjust.
Further improvement is, the second stepping cell size described in the 32nd step is 50 microns ~ 200 microns, the second single step value is 50 microns ~ 200 microns.
Further improvement is, step 4 comprises as follows step by step:
The region that the difference of the reflectivity that the first figure of the 41st step, selected described front layer domain is formed outside the reflectivity of the first figure of the poor and described front layer domain of the shoulder height being greater than 100 dusts and the first figure on silicon chip is greater than 2%.
42nd step, setting the 3rd stepping unit size, the 3rd single step value, described 3rd pattern density specification value, described size minimum gauge value and described distance minimum gauge value.
43rd step, in X direction or Y-direction described front layer domain is scanned, scanning element is of a size of described 3rd stepping unit size, step value between scanning element is described 3rd single step value, calculate the pattern density of each scanning element of described front layer domain, filter out described 4th band of position that local pattern density is less than described 3rd pattern density specification value.
44th step, in described current layer domain, select five band of position identical with the 4th position, the band of position of described front layer domain.
45th step, filter out in the 5th band of position of described current layer domain graphics critical dimension be less than described size minimum gauge value and and do not have between described first figure overlapping and and interval between described first figure be less than the second graph of described distance minimum gauge value, the critical size of described second graph is adjusted, the interval between described second graph and the first figure of corresponding described front layer domain is adjusted.
Further improvement is, adjusts the space periodic and shape that do not change design configuration, only zoom in or out the critical size of described second graph in step 3 and step 4 to the critical size of described second graph.
Further improvement is, in step 4, the space periodic and shape that do not change design configuration are adjusted to the interval between described second graph and the first figure of corresponding described front layer domain, only the interval between described second graph and the first figure of corresponding described front layer domain is zoomed in or out.
The inventive method is when revising current layer domain, take into account the pattern density of front layer domain and the impact of shoulder height, and according to the pattern density of front layer domain or shoulder height, distance between the graphics critical dimension of current layer domain and the figure of current layer domain and front layer domain is adjusted, make the actual graphical adopting revised current layer domain to be formed no longer by the impact of front layer pattern, so the present invention can eliminate the impact of front layer pattern on current layer figure, reduce the difficulty of photoetching process, make design layout more easily manufactured.
Accompanying drawing explanation
Below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation:
Fig. 1 is actual critical size and the depth of focus curve of the figure at existing DFM method diverse location place;
Fig. 2 is the flow chart of the DFM method of embodiment of the present invention domain;
Fig. 3 A-Fig. 3 G is the domain schematic diagram in each step of embodiment of the present invention method.
Embodiment
As shown in Figure 2, be the flow chart of DFM method of embodiment of the present invention domain; As shown in Fig. 3 A to Fig. 3 G, it is the domain schematic diagram in each step of embodiment of the present invention method.The DFM method of embodiment of the present invention domain is used for carrying out DFM correction to design layout, described design layout comprises multilayer domain, DFM revises and carries out for wherein one deck domain each time, this layer of domain is current layer domain, front one deck domain of described current layer domain is front layer domain, and the first figure of described front layer domain can form step on silicon chip, this shoulder height >
representative value is
described first figure can be the formation figure etc. of active area (ActiveLayer) or grid (PolyLayer), and described DFM method adopts following steps to carry out DFM correction to described current layer domain:
Step one, respectively local pattern density inspection is carried out to described current layer domain and described front layer domain, obtain the local pattern density distribution of described current layer domain and the local pattern density distribution of described front layer domain, the local pattern density inspection of described current layer domain or described front layer domain comprised as follows step by step:
11st step, as shown in Figure 3A, domain 1 sets the pattern density difference maximum specification value of pattern density difference of the first stepping cell size, the first single step value, pattern density maximum specification value, adjacent cells, and described domain 1 is described current layer domain or described front layer domain.Described in the embodiment of the present invention, the span of the first stepping cell size is 50 microns ~ 10000 microns, is preferably 200 microns ~ 2000 microns.Described first single step value is identical with described first stepping cell size, or described first single step value is 1/2 of described first stepping cell size.Described first stepping cell size gets smaller value can not make the inspection precision of single stepping unit increase, but can filter out the pattern density of the irregular area more among a small circle further in the 12nd follow-up step.
The scope of described pattern density maximum specification value is 20% ~ 70%, and described pattern density difference maximum specification value is 20% ~ 35%; When the level of the second graph that described current layer domain defines is different, the scope that described pattern density maximum specification value is concrete can adjust, as as described in second graph correspond to active area figure time as described in pattern density maximum specification value be 28 ~ 62%, described second graph is 20 ~ 70% corresponding to described pattern density maximum specification value during polysilicon graphics, and described second graph is 25 ~ 60% corresponding to described pattern density maximum specification value during metallic pattern.The described pattern density difference of adjacent cells is the absolute value of the difference of pattern density.
12nd step, as shown in Figure 3A, in X direction or Y-direction domain 1 is scanned, scanning element 2 is of a size of described first stepping cell size, and the step value d between scanning element 2 is described first single step value, calculates the pattern density of each scanning element 2 of domain 1.
13rd step, as shown in Figure 3A, the pattern density calculating each two adjacent scanning elements 2 of domain 1 is poor.
As shown in Figure 3 B, the scanning element 2 of described current layer domain includes figure 31 and 32.
As shown in Figure 3 C, the scanning element 2 of described current layer domain includes figure 31 and 32, includes figure 4 in the scanning element 2 of the same area of described front layer domain.
14th step, as shown in Figure 3A, filter out the scanning element that pattern density is greater than described pattern density maximum specification value, the region that pattern density is greater than described pattern density maximum specification value needs designer again to design domain.And filter out the poor each adjacent scanning element 2 being greater than described pattern density difference maximum specification value of pattern density.
Step 2, set the first pattern density specification value, the local pattern density filtering out described current layer domain and described front layer domain is all less than the primary importance region of described first pattern density specification value, redundant pattern is filled in the described primary importance region of described current layer domain, this redundant pattern is arranged by multiple redundant pattern block 5 and forms, the not overlapping and segment distance of being separated by of first figure of described redundant pattern and described front layer domain, the not overlapping and segment distance of being separated by of the second graph of described redundant pattern and described current layer domain.The method of filling described redundant pattern comprises as follows step by step:
21st step, as shown in Figure 3 D, set minimum dimension and the minimum spacing of described redundant pattern block 5.
22nd step, as shown in Figure 3 D, the local pattern density filtering out described current layer domain and described front layer domain is all less than the described primary importance region of described first pattern density specification value.
The described primary importance Region dividing of described current layer domain is can fill the first subregion of described redundant pattern block 5 and can not fill the second subregion of described redundant pattern block 5 by the 23rd step, as shown in Figure 3 D; The criterion of described second subregion for: described second subregion by the first figure 4 border being positioned at described front layer domain stretch out region one that value that described minimum dimension adds described minimum spacing surrounds and the second graph border that is positioned at described current layer domain stretch out region two that value that described minimum dimension adds described minimum spacing surrounds or computing obtain.
24th step, as shown in Figure 3 D, be initial with the outer boundary of described second subregion, in described first subregion, carry out ring-type filling along the first figure 4 of described front layer domain or the second graph 31,32 of described current layer domain.
Step 3, setting second graph density specification value, the local pattern density filtering out described front layer domain is less than the second place region of described second graph density specification value, in described current layer domain, select three band of position identical with the second place regional location of described front layer domain, to described current layer domain be arranged in described 3rd band of position and and the first figure of described front layer domain have the critical size of overlapping second graph to adjust.The scope of the density specification of second graph described in embodiment of the present invention value is 18% ~ 68%.This step comprises as follows step by step:
31st step, as shown in FIGURE 3 E, the region that the difference of the reflectivity that the first figure 4 of selected described front layer domain is formed outside the reflectivity of the first figure 4 of the poor and described front layer domain of the shoulder height being greater than 100 dusts and the first figure on silicon chip is greater than 2%.
32nd step, as shown in FIGURE 3 E, set the second stepping cell size, the second single step value and described second graph density specification value.Described second stepping cell size is at least less than 1/2 of described first stepping cell size, described second single step value is at least less than 1/2 of described first single step value, is preferably: described second stepping cell size is 50 microns ~ 200 microns, the second single step value is 50 microns ~ 200 microns.
33rd step, as shown in Figure 3A, in X direction or Y-direction described front layer domain is scanned, scanning element 2 is of a size of described second stepping cell size, step value between scanning element 2 is described second single step value, calculate the pattern density of each scanning element 2 of described front layer domain, filter out the described second place region that local pattern density is less than described second graph density specification value.
34th step, as shown in FIGURE 3 E, in described current layer domain, select three band of position identical with the second place regional location of described front layer domain.
35th step, as shown in FIGURE 3 E, to described current layer domain be arranged in described 3rd band of position and and described first figure 4 of described front layer domain have the critical size of overlapping second graph 31 to adjust, the critical size of described second graph 31 is adjusted to the space periodic and shape that do not change design configuration, only the critical size of described second graph 31 is zoomed in or out; As the intensive pattern line for 140 nanometers (minimum feature)/140 nanometer (minimum ditch groove width), 130 nanometer/150 nanometers or 150 nanometer/130 nanometers can be adjusted to, shown in Fig. 3 E, second graph 31a amplifies the figure after adjustment to the carrying out of described second graph 31.
The distance minimum gauge value of step 4, setting the 3rd pattern density specification value, the size minimum gauge value of second graph size of described current layer domain, the distance between the second graph of described current layer domain and the first figure 4 of described front layer domain, the local pattern density filtering out described front layer domain is less than the 4th band of position of described 3rd pattern density specification value, selects five band of position identical with the 4th position, the band of position of described front layer domain in described current layer domain; Filter out in the 5th band of position of described current layer domain graphics critical dimension be less than described size minimum gauge value and and do not have between the first figure 4 of described front layer domain overlapping and and interval between the first figure 4 of described front layer domain be less than the second graph 32 of described distance minimum gauge value, the critical size of this second graph 32 is adjusted; Interval between this second graph 32 and the first figure 4 of corresponding described front layer domain is adjusted.Described in the embodiment of the present invention, the scope of the 3rd pattern density specification value is 18% ~ 68%.The described size minimum gauge value of described current layer layout patterns can be not identical with minimum design dimension, and such as, if minimum design rule is 120 nanometers in the present embodiment, then described size minimum gauge value can be set as 140 nanometers.Described current layer layout patterns can be not identical with minimum design dimension with the distance minimum gauge value of described front layer Graph Distance yet, and such as, if minimum design rule is 140 nanometers in the present embodiment, then described distance minimum gauge value can be set as 280 nanometers.This step comprises as follows step by step:
41st step, as illustrated in Figure 3 F, the region that the difference of the reflectivity that the first figure 4 of selected described front layer domain is formed outside the reflectivity of the first figure 4 of the poor and described front layer domain of the shoulder height being greater than 100 dusts and the first figure on silicon chip is greater than 2%.
42nd step, as illustrated in Figure 3 F, setting the 3rd stepping unit size, the 3rd single step value, described 3rd pattern density specification value, described size minimum gauge value and described distance minimum gauge value.Described 3rd stepping unit size can be identical with described second stepping cell size, and described 3rd single step value can be identical with described second single step value.
43rd step, as shown in Figure 3A, in X direction or Y-direction described front layer domain is scanned, scanning element 2 is of a size of described 3rd stepping unit size, step value between scanning element 2 is described 3rd single step value, calculate the pattern density of each scanning element of described front layer domain, filter out described 4th band of position that local pattern density is less than described 3rd pattern density specification value.
44th step, as illustrated in Figure 3 F, in described current layer domain, select five band of position identical with the 4th position, the band of position of described front layer domain.
45th step, as illustrated in Figure 3 F, filter out in the 5th band of position of described current layer domain graphics critical dimension be less than described size minimum gauge value and and between the first figure 4 of described front layer domain not overlapping and and interval between the first figure 4 of described front layer domain be less than the second graph 32 of described distance minimum gauge value.
The critical size of this second graph 32 is adjusted; Method of adjustment is zoom in or out the critical size of described second graph 32.As the isolation pattern lines for 140 nanometer/1000 nanometers, 180 nanometer/1000 nanometers can be adjusted to.
Interval between described second graph 32 and the first figure 4 of corresponding described front layer domain is zoomed in or out; As by second graph 32 and corresponding as described in front layer domain the first figure 4 between interval be adjusted to 1 micron from 140 nanometers.
As described in Fig. 3 F, second graph 32a carries out the figure after amplifying adjustment to carry out critical size and the interval of described second graph 32.
As shown in Figure 3 G, the graphic structure of the scanning element 2 of the domain that the DFM through above-mentioned steps for described current layer domain revises, includes figure 31a, 32a and pattern filling 5.
Above by specific embodiment to invention has been detailed description, but these are not construed as limiting the invention.Without departing from the principles of the present invention, those skilled in the art also can make many distortion and improvement, and these also should be considered as protection scope of the present invention.
Claims (8)
1. the DFM method of a domain, it is characterized in that, DFM method is used for carrying out DFM correction to design layout, described design layout comprises multilayer domain, DFM revises and carries out for wherein one deck domain each time, and this layer of domain is current layer domain, and front one deck domain of described current layer domain is front layer domain, and the first figure of described front layer domain can form step on silicon chip, described DFM method adopts following steps to carry out DFM correction to described current layer domain:
Step one, carry out local pattern density inspection respectively to described current layer domain and described front layer domain, the local pattern density of the local pattern density distribution and described front layer domain that obtain described current layer domain distributes;
Step 2, set the first pattern density specification value, the local pattern density filtering out described current layer domain and described front layer domain is all less than the primary importance region of described first pattern density specification value, redundant pattern is filled in the described primary importance region of described current layer domain, this redundant pattern is arranged by multiple redundant pattern block and forms, the not overlapping and segment distance of being separated by of first figure of described redundant pattern and described front layer domain, the not overlapping and segment distance of being separated by of the second graph of described redundant pattern and described current layer domain;
Step 3, setting second graph density specification value, the local pattern density filtering out described front layer domain is less than the second place region of described second graph density specification value, in described current layer domain, select three band of position identical with the second place regional location of described front layer domain, to described current layer domain be arranged in described 3rd band of position and and described first figure of described front layer domain have the critical size of overlapping second graph to adjust;
The distance minimum gauge value of step 4, setting the 3rd pattern density specification value, the size minimum gauge value of second graph size of described current layer domain, the distance between the second graph of described current layer domain and the first figure of described front layer domain, the local pattern density filtering out described front layer domain is less than the 4th band of position of described 3rd pattern density specification value, selects five band of position identical with the 4th position, the band of position of described front layer domain in described current layer domain; Filter out in the 5th band of position of described current layer domain graphics critical dimension be less than described size minimum gauge value and and do not have between described first figure overlapping and and interval between described first figure be less than the second graph of described distance minimum gauge value, the critical size of the described second graph filtered out in the 5th band of position of described current layer domain is adjusted, the interval between the described second graph filtered out in the 5th band of position of described current layer domain and the first figure of corresponding described front layer domain is adjusted;
Step 5, carry out OPC correction to through the revised described current layer domain of above-mentioned DFM.
2. the method for claim 1, is characterized in that: the described local pattern density inspection carried out domain in step one comprises as follows step by step:
11st step, set the pattern density difference maximum specification value of pattern density difference of the first stepping cell size, the first single step value, pattern density maximum specification value, adjacent cells;
12nd step, in X direction or Y-direction domain is scanned, scanning element is of a size of described first stepping cell size, and the step value between scanning element is described first single step value, calculates the pattern density of each scanning element of domain;
13rd step, the pattern density of each two adjacent scanning elements calculating domain are poor;
14th step, filter out the scanning element that pattern density is greater than described pattern density maximum specification value, and filter out each adjacent scanning element that pattern density difference is greater than described pattern density difference maximum specification value.
3. the method for claim 1, is characterized in that: the method for filling described redundant pattern in step 2 comprises as follows step by step:
21st step, the minimum dimension setting described redundant pattern block and minimum spacing;
22nd step, the local pattern density filtering out described current layer domain and described front layer domain are all less than the described primary importance region of described first pattern density specification value;
23rd step, be can fill the first subregion of described redundant pattern block and the second subregion of described redundant pattern block can not be filled by the described primary importance Region dividing of described current layer domain; The criterion of described second subregion for: described second subregion by the first graphic limit being positioned at described front layer domain stretch out region one that value that described minimum dimension adds described minimum spacing surrounds and the second graph border that is positioned at described current layer domain stretch out region two that value that described minimum dimension adds described minimum spacing surrounds or computing obtain;
24th step, be initial with the outer boundary of described second subregion, in described first subregion, carry out ring-type filling along the second graph of the first figure of described front layer domain or described current layer domain.
4. the method for claim 1, is characterized in that, step 3 comprises as follows step by step:
The region that the difference of the reflectivity that the first figure of the 31st step, selected described front layer domain is formed outside the reflectivity of the first figure of the poor and described front layer domain of the shoulder height being greater than 100 dusts and the first figure on silicon chip is greater than 2%;
32nd step, set the second stepping cell size, the second single step value and described second graph density specification value;
33rd step, in X direction or Y-direction described front layer domain is scanned, scanning element is of a size of described second stepping cell size, step value between scanning element is described second single step value, calculate the pattern density of each scanning element of described front layer domain, filter out the described second place region that local pattern density is less than described second graph density specification value;
34th step, in described current layer domain, select three band of position identical with the second place regional location of described front layer domain;
35th step, to described current layer domain be arranged in described 3rd band of position and and described first figure of described front layer domain have the critical size of overlapping second graph to adjust.
5. method as claimed in claim 4, is characterized in that, the second stepping cell size described in the 32nd step is 50 microns ~ 200 microns, the second single step value is 50 microns ~ 200 microns.
6. the method for claim 1, is characterized in that, step 4 comprises as follows step by step:
The region that the difference of the reflectivity that the first figure of the 41st step, selected described front layer domain is formed outside the reflectivity of the first figure of the poor and described front layer domain of the shoulder height being greater than 100 dusts and the first figure on silicon chip is greater than 2%;
42nd step, setting the 3rd stepping unit size, the 3rd single step value, described 3rd pattern density specification value, described size minimum gauge value and described distance minimum gauge value;
43rd step, in X direction or Y-direction described front layer domain is scanned, scanning element is of a size of described 3rd stepping unit size, step value between scanning element is described 3rd single step value, calculate the pattern density of each scanning element of described front layer domain, filter out described 4th band of position that local pattern density is less than described 3rd pattern density specification value;
44th step, in described current layer domain, select five band of position identical with the 4th position, the band of position of described front layer domain;
45th step, in the 5th band of position of described current layer domain, filter out graphics critical dimension be less than described size minimum gauge value, and and not overlapping between described first figure, and and interval between described first figure be less than the second graph of described distance minimum gauge value, the critical size of the described second graph filtered out in the 5th band of position of described current layer domain is adjusted, interval between the described second graph filtered out in the 5th band of position of described current layer domain and the first figure of corresponding described front layer domain is adjusted.
7. the method as described in claim 1 or 4 or 6, it is characterized in that: in step 3 and step 4, the space periodic and shape that do not change design configuration are adjusted to the critical size of described second graph, only the critical size of described second graph is zoomed in or out.
8. the method as described in claim 1 or 6, it is characterized in that: in step 4, the space periodic and shape that do not change design configuration are adjusted to the interval between described second graph and the first figure of corresponding described front layer domain, only the interval between described second graph and the first figure of corresponding described front layer domain is zoomed in or out.
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| CN106294935B (en) * | 2016-07-28 | 2019-08-20 | 上海华力微电子有限公司 | A kind of process modeling modeling and modification method based on pattern density |
| CN108009352A (en) * | 2017-11-30 | 2018-05-08 | 上海华力微电子有限公司 | A kind of filling flow of lithography layout and the design method of photo etched mask |
| CN108830004A (en) * | 2018-06-26 | 2018-11-16 | 上海华力微电子有限公司 | The judgment method of layout patterns risk zones |
| CN109270785A (en) * | 2018-08-15 | 2019-01-25 | 上海华力集成电路制造有限公司 | Well layer lithography layout, its forming method and its Optical Proximity Correction processing method |
| CN109359363B (en) * | 2018-09-30 | 2023-07-18 | 上海华力微电子有限公司 | Analysis method of pattern density |
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