CN103870616A - Parameter adjusting system for analog modules - Google Patents

Parameter adjusting system for analog modules Download PDF

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Publication number
CN103870616A
CN103870616A CN201210529547.1A CN201210529547A CN103870616A CN 103870616 A CN103870616 A CN 103870616A CN 201210529547 A CN201210529547 A CN 201210529547A CN 103870616 A CN103870616 A CN 103870616A
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parameter
module
analog
register
bus
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CN201210529547.1A
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CN103870616B (en
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雷冬梅
赵锋
张爱东
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Abstract

The invention discloses a parameter adjusting system for analog modules. The parameter adjusting system comprises a built-in self-testing module, a user function module, a bus switch and a plurality of analog modules, the analog modules totally have a plurality of parameters, the built-in self-testing module is connected with the bus switch through a register access bus, the user function module is connected with the bus switch through the register access bus, the bus switch is connected with the analog modules through the register access bus, the register access bus comprises an address bus, a data bus and a control bus, one or a plurality of parameter registers are internally arranged in each analog module in the whole parameter adjusting system for the analog modules, the number of the parameter registers built in each analog module is equal to that of the parameters of the analog module, and each parameter register is provided with a unique register address. The parameter adjusting system has the advantages of standard structure, small area and clear connecting line.

Description

The parameter adjustment system of analog module
Technical field
The application relates to a kind of special IC (ASIC, Application-specific integrated circuit), particularly relates to a kind of for adjusting the system of parameter of multiple analog modules.
Background technology
Refer to Fig. 1, this is a kind of parameter adjustment system of existing analog module, comprises built-in self-test module 10, user function module 20, highway switching 30 and multiple analog module 40.In Fig. 1, exemplarily express five analog modules 40.All analog modules 40 relate to K parameter altogether, and K is greater than 2 natural number, and each parameter also has different bit wides.In Fig. 1, exemplarily express K=9.
In built-in self-test module 10, be built-in with first group of parameter register 11, its quantity is K, and size corresponds respectively to the bit wide of K parameter, is used for respectively preserving K parameter.Built-in self-test module 10 is connected with highway switching 30 by first group of data line.The quantity of this first group of data line is K, and size corresponds respectively to the bit wide of K parameter, is used for respectively transmitting K parameter.In Fig. 1, exemplarily first group of data line is expressed as to B1~B9.
In user function module 20, be built-in with second group of parameter register 21, its quantity is K, and size corresponds respectively to the bit wide of K parameter, is used for respectively preserving K parameter.User function module 20 is connected with highway switching 30 by second group of data line.The quantity of this second group of data line is K, and size corresponds respectively to the bit wide of K parameter, is used for respectively transmitting K parameter.In Fig. 1, exemplarily second group of data line is expressed as to U1~U9.
Between highway switching 30 and all analog module 40, be connected by the 3rd group of data line.The quantity of this 3rd group of data line is K, and size corresponds respectively to the bit wide of K parameter, is used for respectively transmitting K parameter.In Fig. 1, exemplarily the 3rd group of data line is expressed as to P1~P9.But between highway switching 30 and each analog module 40, only have L data lines to be connected, L is the quantity of the related parameter of this analog module 40,1≤L≤K.
In Fig. 1, the bit wide of every data lines is all represented by square bracket, and front one digit number in square bracket is deducted after rear one digit number, and adding 1 is exactly the bit wide of this data lines.For example, [3:0] represents that bit wide is 4 bits.
The parameter adjustment system of the existing analog module shown in Fig. 1 has following shortcoming:
One, the quantity K of the parameter that all analog modules relate to altogether, the bit wide of each parameter can change along with quantity, the type etc. of analog module.Each inside commutation circuit that just need to reconnect three groups of data lines, the quantity that changes two groups of registers and size, adjustment highway switching that changes, causes and connects complexity, easily makes mistakes, and is unfavorable for standardization.
Its two, in built-in testing module and user function module, respectively have one group of parameter register, there is redundancy.
Its three, highway switching is used for switching between three groups of data lines, every group of data line has K root, in the time that the value of K is larger, it is very complicated that the commutation circuit of highway switching inside will become.
Summary of the invention
The application's technical matters to be solved is to provide a kind of parameter adjustment system of analog module, and clear in structure and area are less.
For solving the problems of the technologies described above, the parameter adjustment system of the application's analog module comprises built-in self-test module, user function module, highway switching and multiple analog module; All analog modules have multiple parameters altogether;
Described built-in self-test module is connected with highway switching by register access bus;
Described user function module is connected with highway switching by register access bus;
Between described highway switching and each analog module, be also connected by register access bus;
Described register access bus is made up of address bus, data bus, control bus;
In the Parameter Modulation system of whole analog module, only built-in one or more parameter registers in each analog module; The quantity of the parameter that in each analog module, the quantity of built-in parameter register has for this analog module; Each parameter register has unique register address.
Compared with the parameter adjustment system of the application and existing analog module, the Stability Analysis of Structures of each module, is no longer subject to the impact that the quantity K of the related parameter of all analog modules and the bit wide of each parameter change, and is conducive to standardization.And reduce the parameter register of redundancy, not only saved cost, and reduced circuit area.For dissimilar and analog module quantity, the line relation between each module is simple, clear.
Accompanying drawing explanation
Fig. 1 is the structural representation of the parameter adjustment system of existing analog module;
Fig. 2 is the structural representation of the parameter adjustment system of the application's analog module.
Description of reference numerals in figure:
10 is built-in self-test module; 11 is first group of parameter register; 20 is user function module; 21 is second group of parameter register; 30 is highway switching; 40 is analog module.
Embodiment
Refer to Fig. 2, the parameter adjustment system of the application's analog module comprises built-in self-test module 10, user function module 20, highway switching 30 and multiple analog module 40.In Fig. 2, exemplarily express five analog modules 40.All analog modules 40 relate to K parameter altogether, and K is greater than 2 natural number, and each parameter also has different bit wides.In Fig. 2, exemplarily express K=9.
Described built-in testing module 10 is mainly used under test pattern, the parameter of each analog module 40 being adjusted, the output of test simulation module 40 under relevant parameter, the finally optimum working parameter of definite analog module 40.Built-in self-test module 10 is also carried out other test to each analog module 40 conventionally.In built-in self-test module 10, there is no parameter-embedded register.Built-in self-test module 10 is connected with highway switching 30 by register access bus.
Described user function module 20, under non-test pattern, arranges corresponding parameter and normally works according to the logic function of design each analog module 40.In user function module 20, there is no parameter-embedded register yet.User function module 20 is connected with highway switching 30 by register access bus.
Between described highway switching 30 and each analog module 40, be also connected by register access bus.Highway switching 30 is for switching the register access bus of built-in testing module 10 and the register access bus of user function module 20, make both one of be connected with the register access bus of each analog module 40.
Described register access bus comprises address bus, data bus, control bus.Preferably, the bit wide of address bus is M, the maximum address 2 that it can represent m-1 necessary>=maximum register address.The bit wide of data bus is N, N is necessary >=and the breadth extreme of parameter register.Control bus bit wide is 3 bits, comprises the reading writing signal line of 1 bit, the read-write gating signal line of 1 bit, the clock cable of 1 bit.
Described analog module 40 is for example voltage control module, clock oscillator module etc., needs outside input parameter to adjust the control circuit of analog module 40 inside, makes the output of analog module 40 meet designing requirement.A built-in L parameter register in each analog module 40, L is the quantity of the related parameter of this analog module 40,1≤L≤K.The size of this L parameter register corresponds respectively to the related L of this analog module 40 parameter, and is used for respectively transmitting this L parameter.The quantity summation of the parameter register in all analog modules 40 is K.Needed parameter when these parameter registers provide the circuit working of analog module 40.And these parameters can be read or be revised by the read-write of parameter register.Adopt address, data, control bus access mode to read and write to the access of parameter register.Each parameter register is in the corresponding unique address of system.The L value of each analog module 40 can be different, in Fig. 2, exemplarily five corresponding L of analog module 40 are expressed as to 2,1,2,2,2 from top to bottom.
The parameter adjustment system of the analog module shown in Fig. 2 has two kinds of mode of operations: test pattern and non-test pattern.
Under test pattern, tester table sends instruction by the serial communication interface of built-in testing module 10 each analog module 40 is carried out to parameter adjustment and test.Now, highway switching 30 couples together the register access bus of built-in testing module 10 and each analog module 40.Built-in testing module 10 is read and write different parameter registers by different addresses, thereby control simulation module 40 is operated under different parameters.Built-in testing module 10 is built-in with the test function module to analog module 40 conventionally, can realize adjustment and the setting of optimal parameter under the various states of system.
Under non-test pattern, highway switching 30 is connected to each analog module 40 the register access bus of user function module 20.User function module 20 can directly be read and write each parameter register according to different addresses.
Compared with the parameter adjustment system of existing analog module, the application's tool has the following advantages:
One, no longer parameter-embedded register all in built-in self-test module 10 and user function module 20, this makes the Stability Analysis of Structures of these two modules, is no longer subject to the impact that the quantity K of the related parameter of all analog modules and the bit wide of each parameter change, thereby is conducive to standardization.
They are two years old, to originally be built in two groups of parameter registers in built-in self-test module 10 and user function module 20, change the parameter register built-in to own relevant by each analog module 40 into, reduced like this parameter register of redundancy, not only save cost, and reduced circuit area.
Its three, between each module and highway switching 30, be all connected by register access bus, register access bus is by three parts of fixing, and---address bus, data bus, control bus---forms.No matter how quantity, the type of analog module change, and can not affect the commutation circuit of highway switching 30 inside, also do not affect the annexation of the register access bus between each module.
Its four, in the parameter adjustment system of described analog module, conventionally have a storer (not shown), wherein stored the each parameter value of analog module after calibration.When these Parameter Conditions of each analog module work lower times, state is optimum.In the time powering on, first system needs the optimized parameter in this storer to read and be assigned to corresponding analog module.Owing to having adopted register access bus structure, unique parameter register address corresponds respectively to a parameter separately.System can be read optimized parameter on one side from this storer with the fastest speed, be written in corresponding parameter register by register access bus on one side, thereby reduce decoding treatment process and time, complete rapidly the correct setting of analog parameter after powering on, make system reach rapidly normal operating conditions.
These are only the application's preferred embodiment, and be not used in restriction the application.For a person skilled in the art, the application can have various modifications and variations.All within the application's spirit and principle, any modification of doing, be equal to replacement, improvement etc., within all should being included in the application's protection domain.

Claims (6)

1. a parameter adjustment system for analog module, comprises built-in self-test module, user function module, highway switching and multiple analog module; All analog modules have multiple parameters altogether; It is characterized in that:
Described built-in self-test module is connected with highway switching by register access bus;
Described user function module is connected with highway switching by register access bus;
Between described highway switching and each analog module, be also connected by register access bus;
Described register access bus is made up of address bus, data bus, control bus;
In the Parameter Modulation system of whole analog module, only built-in one or more parameter registers in each analog module; The quantity of the parameter that in each analog module, the quantity of built-in parameter register has for this analog module; Each parameter register has unique register address.
2. the parameter adjustment system of analog module according to claim 1, is characterized in that, described analog module comprises voltage control module, clock oscillator module.
3. the parameter adjustment system of analog module according to claim 1, is characterized in that, the bit wide of described address bus is M, the maximum address 2 that it can represent m-1>=maximum register address;
The bit wide of described data bus is N, the maximum bit wide of N >=parameter register;
The bit wide of described control bus is 3 bits, comprises the reading writing signal line of 1 bit, the read-write gating signal line of 1 bit, the clock cable of 1 bit.
4. the parameter adjustment system of analog module according to claim 1, is characterized in that, in all analog modules, the quantity summation of built-in parameter register, equals the number of parameters that all analog modules have altogether.
5. the parameter adjustment system of analog module according to claim 1, is characterized in that, the bit wide of the parameter register in each analog module, the bit wide of the parameter having corresponding to this analog module.
6. the parameter adjustment system of analog module according to claim 1, is characterized in that, the parameter adjustment system of whole analog module has two kinds of mode of operations;
Under a kind of mode of operation, highway switching is connected the register access bus of built-in testing module with the register access bus of each analog module, and built-in testing module is read and write each parameter register by different addresses;
Under another kind of mode of operation, highway switching is connected the register access bus of user function module with the register access bus of each analog module, and user function module is read and write each parameter register according to different addresses.
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Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050240842A1 (en) * 2004-04-23 2005-10-27 Oki Electric Industry Co., Ltd. Circuit and method for testing semiconductor device
CN101059546A (en) * 2006-04-18 2007-10-24 盛群半导体股份有限公司 System chip with multiple test mode and the test method
CN101064276A (en) * 2006-04-27 2007-10-31 盛群半导体股份有限公司 Method for regulating integrate circuit parameter
CN101183406A (en) * 2007-12-25 2008-05-21 盛科网络(苏州)有限公司 Method for establishing network chip module level function checking testing platform
US7590902B1 (en) * 2005-09-12 2009-09-15 Virage Logic Corporation Methods and apparatuses for external delay test of input-output circuits
US7694202B2 (en) * 2004-01-28 2010-04-06 Micron Technology, Inc. Providing memory test patterns for DLL calibration
CN101799526A (en) * 2009-02-06 2010-08-11 杭州中科微电子有限公司 Method for calibrating high-precision RTC circuit in GPS receiver and module thereof
CN101876693A (en) * 2010-06-09 2010-11-03 合肥工业大学 Electric energy metering chip-based terminal calibration system
CN102479553A (en) * 2010-11-25 2012-05-30 上海华虹Nec电子有限公司 Application-specific integrated circuit with multiple analog circuits requiring to be trimmed

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7694202B2 (en) * 2004-01-28 2010-04-06 Micron Technology, Inc. Providing memory test patterns for DLL calibration
US20050240842A1 (en) * 2004-04-23 2005-10-27 Oki Electric Industry Co., Ltd. Circuit and method for testing semiconductor device
US7590902B1 (en) * 2005-09-12 2009-09-15 Virage Logic Corporation Methods and apparatuses for external delay test of input-output circuits
CN101059546A (en) * 2006-04-18 2007-10-24 盛群半导体股份有限公司 System chip with multiple test mode and the test method
CN101064276A (en) * 2006-04-27 2007-10-31 盛群半导体股份有限公司 Method for regulating integrate circuit parameter
CN101183406A (en) * 2007-12-25 2008-05-21 盛科网络(苏州)有限公司 Method for establishing network chip module level function checking testing platform
CN101799526A (en) * 2009-02-06 2010-08-11 杭州中科微电子有限公司 Method for calibrating high-precision RTC circuit in GPS receiver and module thereof
CN101876693A (en) * 2010-06-09 2010-11-03 合肥工业大学 Electric energy metering chip-based terminal calibration system
CN102479553A (en) * 2010-11-25 2012-05-30 上海华虹Nec电子有限公司 Application-specific integrated circuit with multiple analog circuits requiring to be trimmed

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