CN103869508B - 阵列基板的焊垫及其制作方法及阵列基板和液晶显示装置 - Google Patents

阵列基板的焊垫及其制作方法及阵列基板和液晶显示装置 Download PDF

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CN103869508B
CN103869508B CN201210540039.3A CN201210540039A CN103869508B CN 103869508 B CN103869508 B CN 103869508B CN 201210540039 A CN201210540039 A CN 201210540039A CN 103869508 B CN103869508 B CN 103869508B
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李卿硕
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Chengdu BOE Optoelectronics Technology Co Ltd
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Abstract

本发明公开一种阵列基板的焊垫,该焊垫包括:栅极‑氮化硅层(G‑SiNx)、第一铟锡氧化物(ITO)层、源/漏电极(S/D)层、保护层(PVX)、第二ITO层;其中,第一ITO层覆盖在G‑SiNx层上,S/D层覆盖在第一ITO层上,PVX层覆盖在S/D层上,第二ITO层覆盖在PVX层上;所述S/D层有焊垫过孔,所述第二ITO层通过所述焊垫过孔连接第一ITO层并不与S/D层接触;本发明同时还公开了一种阵列基板的焊垫的制作方法及阵列基板和液晶显示装置,通过本发明的方案,能够防止由第二ITO层进入水汽,而致使水汽与S/D层的金属接触形成原电池,避免了焊垫过孔内金属腐蚀,提高了产品良率及可靠性。

Description

阵列基板的焊垫及其制作方法及阵列基板和液晶显示装置
技术领域
本发明涉及液晶显示器(LCD)的制造技术,尤其涉及一种阵列基板的焊垫(Bonding Pad)及其制作方法及阵列基板和液晶显示装置。
背景技术
LCD产品在温湿度环境、环境模拟试验、模组组装、终端客户使用等过程中显示器单元(Unit Cell)出现焊垫过孔金属腐蚀,导致产品出现线不良、异常显示不良等。
根据对焊垫过孔内腐蚀的失效分析得出:如图1和图2所示,第二铟锡氧化物(ITO)层4覆盖在源/漏电极(S/D)层2表面并不致密,或因S/D层2在PVX过孔干(Dry)刻蚀时导致暴露位置的S/D层2金属表面不平整,导致ITO分子间存在空隙或断差,该空隙远大于水分子直径,致使水汽与S/D层2的金属钼(Mo)或铝(Al)或铝钕(AlNd)接触后形成原电池,在进行电化学反应后金属被腐蚀,使产品失效。
发明内容
有鉴于此,本发明的主要目的在于提供一种阵列基板的焊垫及其制作方法及阵列基板和液晶显示装置,能够避免焊垫过孔内金属腐蚀,提高产品良率和可靠性。
为达到上述目的,本发明的技术方案是这样实现的:
本发明提供的一种阵列基板的焊垫,该焊垫包括:栅极-氮化硅层(G-SiNx)、第一ITO层、S/D层、保护层(PVX)、第二ITO层;其中,第一ITO层覆盖在G-SiNx层上,S/D层覆盖在第一ITO层上,PVX层覆盖在S/D层上,第二ITO层覆盖在PVX层上;所述S/D层有焊垫过孔,所述第二ITO层通过所述焊垫过孔连接第一ITO层并不与S/D层接触。
上述方案中,所述焊垫过孔将S/D层的长边隔断。
上述方案中,所述焊垫过孔位于S/D层长边的上方一侧或下方一侧。
上述方案中,所述焊垫过孔位于S/D层中刻蚀的窗口中。
上述方案中,所述焊垫过孔位于S/D层长边的上下两侧。
上述方案中,所述焊垫包括:阵列基板上集成电路的焊垫和玻璃基板对盒的边缘位置的焊垫。
本发明提供的一种阵列基板的焊垫的制作方法,该方法包括:在G-SiNx层上覆盖第一ITO层,在第一ITO层上覆盖S/D层,所述S/D层在焊垫过孔位置露出第一ITO层,在S/D层上覆盖PVX层,并在焊垫过孔位置进行PVX打孔,在PVX层上覆盖第二ITO层,在焊垫过孔位置形成焊垫过孔,所述第二ITO层通过焊垫过孔连接第一ITO层并不与S/D层接触。
上述方案中,所述在第一ITO层上覆盖S/D层,所述S/D层在焊垫过孔位置露出第一ITO层,为:在第一ITO层上通过沉积、掩膜、半孔灰化和湿刻工艺覆盖一层S/D层,所述S/D层在焊垫过孔范围内的金属被刻蚀,暴露出第一ITO层。
本发明提供的一种阵列基板,该阵列基板包括上述的焊垫。
本发明提供的一种液晶显示装置,该液晶显示装置包括对合的上基板、下基板,以及上下基板间填充的液晶,所述下基板为上述的阵列基板。
本发明提供了一种阵列基板的焊垫及其制作方法及阵列基板和液晶显示装置,该焊垫包括栅极-氮化硅层(G-SiNx)、第一ITO层、S/D层、保护层(PVX)、第二ITO层;其中,第一ITO层覆盖在G-SiNx层上,S/D层覆盖在第一ITO层上,PVX层覆盖在S/D层上,第二ITO层覆盖在PVX层上;所述S/D层有焊垫过孔,所述第二ITO层通过所述焊垫过孔连接第一ITO层并不与S/D层接触;如此,能够防止由第二ITO层进入水汽,而致使水汽与S/D层的金属接触形成原电池,避免了焊垫过孔内金属腐蚀,提高了产品良率和可靠性。
附图说明
图1为现有技术中阵列基板的焊垫结构的立体示意图;
图2为现有技术中阵列基板的焊垫结构延A-A1方向的剖面图;
图3为本发明提供的阵列基板的焊垫结构的立体示意图;
图4为图3中阵列基板的焊垫结构延A-A1方向的剖面图;
图5为本发明提供的阵列基板的焊垫的位置示意图;
图6为本发明实施例中焊垫过孔位于S/D层长边的上下两侧时焊垫结构的立体示意图;
图7为图6中阵列基板的焊垫结构延A-A1方向的剖面图。
附图标记说明:1,G-SiNx层;2,S/D层;3,PVX层;4,第二ITO层;5,第一ITO层;6,焊垫过孔。
具体实施方式
本发明的基本思想是:本发明提供的阵列基板的焊垫,包括:G-SiNx层、第一ITO层、S/D层、PVX层、第二ITO层;其中,第一ITO层覆盖在G-SiNx层上,S/D层覆盖在第一ITO层上,PVX层覆盖在S/D层上,第二ITO层覆盖在PVX层上;所述S/D层有焊垫过孔,所述第二ITO层通过所述焊垫过孔连接第一ITO层并不与S/D层接触。
下面通过附图及具体实施例对本发明做进一步的详细说明。
本发明实现一种阵列基板的焊垫,如图3和4所示,该焊垫包括:G-SiNx层1、第一ITO层5、S/D层2、PVX层3、第二ITO层4;其中,第一ITO层5覆盖在G-SiNx层1上,S/D层2覆盖在第一ITO层5上,PVX层3覆盖在S/D层2上,第二ITO层4覆盖在PVX层3上;所述S/D层2有焊垫过孔6,所述第二ITO层4通过所述焊垫过孔连接第一ITO层5并不与S/D层2接触;
图5中a图为图3中以A-A1为S/D层长边、正面的横截面为下、反面的横截面为上的S/D层2俯视图,所述焊垫过孔6将S/D层2的长边隔断,这里,可以将S/D层2的长边从任何位置隔断,比如将S/D层2的长边从中间位置隔断;
进一步地,所述焊垫过孔6还可以位于S/D层2长边的上方一侧或下方一侧,如图5中b图所示,焊垫过孔6位于S/D层2长边的下方一侧;
进一步地,所述焊垫过孔6如图5中c图所示,在S/D层2中刻蚀出一个以上窗口,焊垫过孔6位于各窗口中;
进一步地,所述焊垫过孔6如图5中d图所示,焊垫过孔6位于S/D层2长边的上下两侧,这时,立体图与剖面图如图6和7所示。
上述阵列基板的焊垫包括:阵列基板上集成电路(IC)的焊垫和玻璃基板对盒的边缘位置的焊垫。
为了实现上述阵列基板的焊垫,本发明还提供一种阵列基板的焊垫的制作方法,该方法包括:在G-SiNx层上覆盖第一ITO层,在第一ITO层上覆盖S/D层,所述S/D层在焊垫过孔位置露出第一ITO层,在S/D层上覆盖PVX层,并在焊垫过孔位置进行PVX打孔,在PVX层上覆盖第二ITO层,在焊垫过孔位置形成焊垫过孔,所述第二ITO层通过焊垫过孔连接第一ITO层并不与S/D层接触;
所述在第一ITO层上覆盖S/D层,所述S/D层在焊垫过孔位置露出第一ITO层,为:在第一ITO层通过沉积、掩膜、半孔灰化和湿刻工艺覆盖一层S/D层,所述S/D层在焊垫过孔范围内的金属被刻蚀,暴露出第一ITO层。
如图5中a图所示,所述焊垫过孔6位于S/D层2中部,将S/D层2的长边隔断,这里,可以将S/D层2的长边从任何位置隔断,比如将S/D层2的长边从中间位置隔断;
进一步地,所述焊垫过孔6还可以位于S/D层2长边的上方一侧或下方一侧,如图5中b图所示,焊垫过孔6位于S/D层2长边的下方一侧;
进一步地,所述焊垫过孔6如图5中c图所示,在S/D层2中刻蚀出一个以上窗口,焊垫过孔6位于各窗口中;
进一步地,所述焊垫过孔6如图5中d图所示,焊垫过孔位于S/D层2长边的上下两侧,这时,立体图与剖面图如图6和7所示。
基于上述阵列基板的焊垫,本发明还实现一种阵列基板,该阵列基板包括上述的焊垫。
基于上述阵列基板,本发明还实现一种液晶显示装置,该液晶显示装置包括包括对盒的上基板、下基板,以及上下基板间填充的液晶,所述下基板为上述的阵列基板;所述液晶显示装置包括:液晶面板、液晶电视、液晶显示器件、数码相框、电子纸、手机等等终端产品。
以上所述,仅为本发明的较佳实施例而已,并非用于限定本发明的保护范围。

Claims (10)

1.一种阵列基板的焊垫,其特征在于,该焊垫包括:栅极-氮化硅层(G-SiNx)、第一铟锡氧化物(ITO)层、源/漏电极(S/D)层、保护层(PVX)、第二ITO层;其中,第一ITO层覆盖在G-SiNx层上,S/D层覆盖在第一ITO层上,PVX层覆盖在S/D层上,第二ITO层覆盖在PVX层上;所述S/D层有焊垫过孔,所述第二ITO层通过所述焊垫过孔连接第一ITO层并不与S/D层接触。
2.根据权利要求1所述的焊垫,其特征在于,所述焊垫过孔将S/D层的长边隔断。
3.根据权利要求1所述的焊垫,其特征在于,所述焊垫过孔位于S/D层长边的上方一侧或下方一侧。
4.根据权利要求1所述的焊垫,其特征在于,所述焊垫过孔位于S/D层中刻蚀的窗口中。
5.根据权利要求1所述的焊垫,其特征在于,所述焊垫过孔位于S/D层长边的上下两侧。
6.根据权利要求1所述的焊垫,其特征在于,所述焊垫包括:阵列基板上集成电路的焊垫和玻璃基板对盒的边缘位置的焊垫。
7.一种阵列基板的焊垫的制作方法,其特征在于,该方法包括:在G-SiNx层上覆盖第一ITO层,在第一ITO层上覆盖S/D层,所述S/D层在焊垫过孔位置露出第一ITO层,在S/D层上覆盖PVX层,并在焊垫过孔位置进行PVX打孔,在PVX层上覆盖第二ITO层,在焊垫过孔位置形成焊垫过孔,所述第二ITO层通过焊垫过孔连接第一ITO层并不与S/D层接触。
8.根据权利要求7所述的制作方法,其特征在于,所述在第一ITO层上覆盖S/D层,所述S/D层在焊垫过孔位置露出第一ITO层,为:在第一ITO层上通过沉积、掩膜、半孔灰化和湿刻工艺覆盖一层S/D层,所述S/D层在焊垫过孔范围内的金属被刻蚀,暴露出第一ITO层。
9.一种阵列基板,其特征在于,该阵列基板包括权利要求1至6任一项所述的焊垫。
10.一种液晶显示装置,其特征在于,该液晶显示装置包括对合的上基板、下基板,以及上下基板间填充的液晶,所述下基板为权利要求9所述的阵列基板。
CN201210540039.3A 2012-12-13 2012-12-13 阵列基板的焊垫及其制作方法及阵列基板和液晶显示装置 Expired - Fee Related CN103869508B (zh)

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US14/081,674 US9196569B2 (en) 2012-12-13 2013-11-15 Bonding pad of array substrate, method for producing the same, array substrate, and liquid crystal display apparatus

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