CN103856199B - Pulling up device for data bus - Google Patents
Pulling up device for data bus Download PDFInfo
- Publication number
- CN103856199B CN103856199B CN201210494059.1A CN201210494059A CN103856199B CN 103856199 B CN103856199 B CN 103856199B CN 201210494059 A CN201210494059 A CN 201210494059A CN 103856199 B CN103856199 B CN 103856199B
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- Prior art keywords
- pull
- current source
- source circuit
- bus
- serial
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Abstract
This invention discloses a pulling up device for a data bus. The data bus comprises a serial data line SDA and a serial clock line SCL. The serial data line SDA and the serial clock line SCL are respectively connected to a pulling up current source circuit. Through adopting a current source circuit to replace a pulling up resistor in the prior art, the problem that maximum value of a low electric level of the I2C bus is increased because the pulling up resistor is reduced and that the communication speed and stability are affected.
Description
Technical field
The present invention relates to serial communication bus field, especially relate to a kind of locked technical field of automatic recovery bus.
Background technology
As in I2C/SMbus interface bus in some communication systems of single-chip microcomputer, some need external pull-up resistor（Chip
Internal structure is drain/open collector）, I2C bus only needs to be made up of two holding wires, one taking I2C interface as a example
It is serial data line SDA, another is serial time clock line SCL.In systems, the typical connection of I2C bus is as shown in Fig. 1,
Need altogether when noting connecting.Itself SDA and SCL pin of device typically with I2C bus is all open-drain（Or current collection
Open a way in pole）Export structure.When therefore actually used, SDA and SCL holding wire all has to plus pull-up resistor Rp（Pull-Up
Resistor）.Pull-up resistor general value 3～10K Ω.
Benefit using Floating drain is：When bus free, SDA and SCL two signal line all keeps high level, no
Electric current can be consumed；Electrically compatible good.Pull-up resistor connects 5V power supply and just can meet 3V with 5V logical device interface, pull-up resistor
Power supply again can be with 3V logical device interface；Because being Floating drain, between SDA and SDA of different components, SCL with
The change-over circuit it is not necessary to extra can be joined directly together between SCL.
The rising time of the code requirement SDA/SCL of I2C bus is less than 1000us, and trailing edge is 300us.Meanwhile,
In I2C bus request bus, total equivalent capacity adds up less than 400pf.Due to shadow spuious, distribution capacity, inductance by bus
Ring, communication distance is longer, and device is more, then rising time is longer, and traffic rate/communication stability can decline, error/packet loss
Probability can rise.
If reducing the resistance of pull-up resistor, low level maximum can become big, become implacable contradiction, especially
It is in fast mode or plug-in interface protective circuit, to carry series resistance and TVS pipe.
The rise time of I2C bus is together decided on by pull-up resistor Rp, terminating resistor Rs, capacitive load Cb etc., total in I2C
When the line rise time determines, pull-up resistor Rp, terminating resistor Rs, capacitive load Cb mutual relation as shown in Figure 2.
As shown in Figure 2, the rise time of I2C bus is mainly determined by honoured load and pull-up resistor, in terminating resistor is
During certain numerical value, IC bus rise time tr is approximately directly proportional to the achievement of upper resistance and capacitive load, rises in I2C bus
During time-preserving, if the capacitive load of I2C bus increases, for ensureing the rise time inconvenience of I2C bus, it is desirable to reduce on
The numerical value of pull-up resistor.
Content of the invention
In order to solve above-mentioned technical problem, the invention discloses for the drawing upwardly device on data/address bus.
Of the present invention a kind of for the drawing upwardly device on data/address bus, described data/address bus includes a serial data line
SDA, and a serial time clock line SCL, described serial data line SDA and serial time clock line SCL connects a pull-up current respectively
Source circuit.
Further, described pull-up current source circuit includes at least two transistors.The first transistor and serial data line
SDA is connected, and transistor seconds is connected with serial time clock line SCL.
Further, two described transistors are PNP transistor.
Further, described pull-up current source circuit also includes two NPN transistors.
Further, described pull-up current source circuit also includes a resistance, and described resistance and a NPN transistor are connected,
The current value of described pull-up current source circuit can be adjusted.
Further, total equivalent capacity on described data/address bus is less than 400pf.
Further, the electric current flowing through each transistor in described pull-up current source circuit is equal.
It is an advantage of the current invention that：The present invention provide a kind of for the drawing upwardly device on data/address bus, described data/address bus
Including a serial data line SDA, with a serial time clock line SCL, described serial data line SDA and serial time clock line SCL divides
Lian Jie not a pull-up current source circuit.By pull-up resistor of the prior art is replaced using current source circuit, thoroughly solve
Because pull-up resistor reduces, the low level maximum of the I2C bus that leads to becomes big, thus affecting traffic rate and communication is steady
Qualitative.
Brief description
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
Have technology description in required use accompanying drawing be briefly described it should be apparent that, below describe in for the present invention
Accompanying drawing is only some embodiments of the present invention, for those of ordinary skill in the art, is not paying creative work
Under the premise of, other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is the connection circuit diagram of pull-up resistor and I2C bus in prior art；
Fig. 2 is the graph of a relation of pull-up resistor, capacitive load and I2C bus rise time in prior art；
Fig. 3 is the annexation figure of pull-up current source circuit of the present invention and I2C bus.
Specific embodiment
The present invention provide a kind of for the drawing upwardly device on data/address bus, as shown in figure 1, prior art pull-up resistor and
The connection circuit diagram of I2C bus, serial data line SDA and serial time clock line SCL connect a pull-up resistor 11 and 12 respectively, on
The Standard resistance range of pull-up resistor 11 and 12 is 3 K Ω～10K Ω.I2C bus connects a total equipment 10, total for being responsible for whole I2C
The traffic control of line communication, initiates various communications commands, I2C bus node also includes at least one from equipment 20, be used for connecing
The order of primary device 10, is processed accordingly.
Rise time due to the code requirement SDA/SCL of I2C bus is less than 1000us, and trailing edge is 300us.I2C
In bus request bus, total equivalent capacity adds up less than 400pf.Due to by bus spuious/distribution capacity/inductance affected,
Communication distance is longer, and device is more, then rising time is longer, and traffic rate/communication stability can decline, error/packet loss
Probability can rise.If reducing the resistance of pull-up resistor, low level maximum can become big, become implacable contradiction,
Especially carry series resistance and TVS pipe in fast mode or plug-in interface protective circuit.
The present embodiment to substitute pull-up resistor of the prior art using a current source circuit.Fig. 3 illustrates of the present invention
Pull-up current source circuit and I2C bus annexation figure, of the present invention a kind of for the drawing upwardly device on data/address bus,
Described data/address bus includes a serial data line SDA, and a serial time clock line SCL, described serial data line SDA and serial
Clock line SCL connects a pull-up current source circuit respectively.
Described pull-up current source circuit includes at least two transistors.Current source circuit shown in Fig. 3 includes 5 crystal
Pipe, wherein transistor 221, transistor 222 are PNP transistor, and transistor 221 is connected with serial data line SDA, transistor
222 are connected with serial time clock line SCL.Described pull-up current source circuit also includes two NPN transistors 224 and transistor 225,
Wherein transistor 224 connects a resistance 226, can adjust the current value of described pull-up current source circuit.Transistor 225 connects one
PNP transistor, for being adjusted to described pull-up current source circuit.Total equivalent electric on data/address bus of the present invention
Hold and be less than 400pf, meet the requirement of I2C bus.The electric current flowing through each transistor in described pull-up current source circuit is equal.
It is an advantage of the current invention that：The present invention provide a kind of for the drawing upwardly device on data/address bus, described data/address bus
Including a serial data line SDA, with a serial time clock line SCL, described serial data line SDA and serial time clock line SCL divides
Lian Jie not a pull-up current source circuit.By pull-up resistor of the prior art is replaced using current source circuit, thoroughly solve
Because pull-up resistor reduces, the low level maximum of the I2C bus that leads to becomes big, thus affecting traffic rate and communication is steady
Qualitative.
It should be understood that although this specification is been described by according to embodiment, but not each embodiment only comprises one
Individual independent technical scheme, only for clarity, those skilled in the art should will say this narrating mode of description
As an entirety, the technical scheme in each embodiment can also be through appropriately combined, and forming those skilled in the art can for bright book
With the other embodiment understanding.
The a series of detailed description of those listed above is only for the feasibility embodiment of the present invention specifically
Bright, they simultaneously are not used to limit the scope of the invention, all equivalent implementations made without departing from skill spirit of the present invention
Or change should be included within the scope of the present invention.
Claims (3)
1. a kind of for the drawing upwardly device on data/address bus, described data/address bus includes a serial data line SDA, and a string
Row clock line SCL it is characterised in that：Described serial data line SDA and serial time clock line SCL connects a pull-up current source electricity
Road, described pull-up current source circuit includes two PNP transistors and two NPN transistors, one of PNP transistor
It is connected with serial data line SDA, another PNP transistor is connected with serial time clock line SCL；Described pull-up current source circuit is also wrapped
Include a resistance, described resistance is connected with one of NPN transistor to adjust the current value of described pull-up current source circuit.
2. drawing upwardly device according to claim 1 it is characterised in that：On described data/address bus, total equivalent capacity is less than
400pf.
3. drawing upwardly device according to claim 1 it is characterised in that：Each crystal is flow through in described pull-up current source circuit
The electric current of pipe is equal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210494059.1A CN103856199B (en) | 2012-11-28 | 2012-11-28 | Pulling up device for data bus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210494059.1A CN103856199B (en) | 2012-11-28 | 2012-11-28 | Pulling up device for data bus |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103856199A CN103856199A (en) | 2014-06-11 |
| CN103856199B true CN103856199B (en) | 2017-02-08 |
Family
ID=50863466
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210494059.1A Expired - Fee Related CN103856199B (en) | 2012-11-28 | 2012-11-28 | Pulling up device for data bus |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103856199B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107562671B (en) * | 2017-08-02 | 2020-09-11 | 广东美的制冷设备有限公司 | Communication bus power supply circuit |
| CN110912791B (en) * | 2019-11-07 | 2021-06-29 | 苏州浪潮智能科技有限公司 | System management bus link and pull-up resistance determination method, device and equipment thereof |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1220795A (en) * | 1997-01-30 | 1999-06-23 | 皇家菲利浦电子有限公司 | Communications bus using different transmission rates |
| CN101150476A (en) * | 2007-10-23 | 2008-03-26 | 中兴通讯股份有限公司 | Bus realization method for point-to-point communication |
| CN101330580A (en) * | 2007-06-18 | 2008-12-24 | 康佳集团股份有限公司 | Flat television |
| US7514962B2 (en) * | 2006-04-28 | 2009-04-07 | Stmicroelectronics Pvt. Ltd. | Configurable I2C interface |
| CN101432705A (en) * | 2006-04-24 | 2009-05-13 | 爱特梅尔公司 | High speed dual- wire communications device requiring no passive pullup components |
| CN101599055A (en) * | 2009-07-24 | 2009-12-09 | 原亮 | Built-in isomerization CPU array system based on mutual pass bus |
-
2012
- 2012-11-28 CN CN201210494059.1A patent/CN103856199B/en not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1220795A (en) * | 1997-01-30 | 1999-06-23 | 皇家菲利浦电子有限公司 | Communications bus using different transmission rates |
| CN101432705A (en) * | 2006-04-24 | 2009-05-13 | 爱特梅尔公司 | High speed dual- wire communications device requiring no passive pullup components |
| US7514962B2 (en) * | 2006-04-28 | 2009-04-07 | Stmicroelectronics Pvt. Ltd. | Configurable I2C interface |
| CN101330580A (en) * | 2007-06-18 | 2008-12-24 | 康佳集团股份有限公司 | Flat television |
| CN101150476A (en) * | 2007-10-23 | 2008-03-26 | 中兴通讯股份有限公司 | Bus realization method for point-to-point communication |
| CN101599055A (en) * | 2009-07-24 | 2009-12-09 | 原亮 | Built-in isomerization CPU array system based on mutual pass bus |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103856199A (en) | 2014-06-11 |
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| CB02 | Change of applicant information |
Address after: 215126 Suzhou City Industrial Park, Suzhou, Su Sheng Tung Road, Hong Kong Street, No. 88 Applicant after: SUZHOU NEWHONGBO INTELLIGENT TECHNOLOGY Co.,Ltd. Address before: 215126 Suzhou City Industrial Park, Suzhou, Su Sheng Tung Road, Hong Kong Street, No. 88 Applicant before: Suzhou Nhb Smart Science Technology Co.,Ltd. |
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| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20190430 Address after: 215000 Fumin Phase III Factory Building, 818 Wusong Road, Guoxiang Street, Wuzhong Economic Development Zone, Suzhou City, Jiangsu Province Patentee after: SUZHOU AGIX OPTICAL TECHNOLOGY CO.,LTD. Address before: 215126 No. 88 Shenggang Street, East Susheng Road, Suzhou Industrial Park, Suzhou City, Jiangsu Province Patentee before: SUZHOU NEWHONGBO INTELLIGENT TECHNOLOGY Co.,Ltd. |
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| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170208 Termination date: 20211128 |