CN103855204A - Collector structure of reverse conducting IGBT and manufacturing method thereof - Google Patents
Collector structure of reverse conducting IGBT and manufacturing method thereof Download PDFInfo
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- CN103855204A CN103855204A CN201210524694.XA CN201210524694A CN103855204A CN 103855204 A CN103855204 A CN 103855204A CN 201210524694 A CN201210524694 A CN 201210524694A CN 103855204 A CN103855204 A CN 103855204A
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- 238000004519 manufacturing process Methods 0.000 title abstract 3
- 229910052732 germanium Inorganic materials 0.000 claims abstract description 272
- 230000007547 defect Effects 0.000 claims abstract description 111
- 239000012535 impurity Substances 0.000 claims abstract description 45
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims abstract description 24
- 239000002184 metal Substances 0.000 claims abstract description 18
- 238000002513 implantation Methods 0.000 claims abstract description 13
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims abstract 43
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 34
- 229910052710 silicon Inorganic materials 0.000 claims description 34
- 239000010703 silicon Substances 0.000 claims description 34
- 239000011248 coating agent Substances 0.000 claims description 28
- 238000000576 coating method Methods 0.000 claims description 28
- 238000002360 preparation method Methods 0.000 claims description 21
- 238000000137 annealing Methods 0.000 claims description 19
- 230000015572 biosynthetic process Effects 0.000 claims description 15
- 238000002347 injection Methods 0.000 claims description 15
- 239000007924 injection Substances 0.000 claims description 15
- 238000009792 diffusion process Methods 0.000 claims description 12
- 238000001259 photo etching Methods 0.000 claims description 12
- 238000001465 metallisation Methods 0.000 claims description 5
- 239000000463 material Substances 0.000 abstract description 9
- 239000002210 silicon-based material Substances 0.000 abstract description 6
- 230000004913 activation Effects 0.000 abstract description 5
- 150000002500 ions Chemical class 0.000 abstract description 3
- VGRFVJMYCCLWPQ-UHFFFAOYSA-N germanium Chemical compound [Ge].[Ge] VGRFVJMYCCLWPQ-UHFFFAOYSA-N 0.000 description 148
- 238000000034 method Methods 0.000 description 13
- 239000004065 semiconductor Substances 0.000 description 7
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 6
- RPAJSBKBKSSMLJ-DFWYDOINSA-N (2s)-2-aminopentanedioic acid;hydrochloride Chemical compound Cl.OC(=O)[C@@H](N)CCC(O)=O RPAJSBKBKSSMLJ-DFWYDOINSA-N 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- GPRLSGONYQIRFK-UHFFFAOYSA-N hydron Chemical compound [H+] GPRLSGONYQIRFK-UHFFFAOYSA-N 0.000 description 3
- 238000001556 precipitation Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 239000002800 charge carrier Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000011946 reduction process Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
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- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
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Abstract
The invention discloses a collector structure of a reverse conducting IGBT. The collector structure comprises a base region, an N- germanium defect layer, a P+ germanium collector region, an N+ germanium short circuit region and a collector metal layer. The N- germanium defect layer is arranged on the bottom face of the base region, and the P+ germanium collector region and the N+ germanium short circuit region are arranged between the bottom face of the N- germanium defect layer and the collector metal layer side by side. The invention further discloses a manufacturing method of the collector structure of the reverse conducting IGBT. According to the collector structure of the reverse conducting IGBT and the manufacturing method of the collector structure of the reverse conducting IGBT, a collector on the reverse side of the reverse conducting IGBT is made of germanium material or germanium-silicon material, collector-emitter voltage density and emitter current density can be greatly reduced when the rebound phenomenon is generated, the rebound phenomenon of devices is restrained, the high impurity activation rate can be acquired at low temperature, implantation of expensive ions can be avoided, and voltage break-over time and voltage turn-off time are shortened.
Description
Technical field
The present invention relates to power semiconductor technical field, particularly the contrary collector structure of type IGBT and preparation method thereof of leading.
Background technology
In conventional IGBT preparation technology, be first positive technique, comprise oxidation, Implantation, exposure, deposit and etching etc. form positive PN junction, gate electrode and emitter pattern.Then be the reduction process at the back side.According to the difference of the structure of device and the electric pressure of application, the thickness after final attenuate is also different.For the punch device of (being called again electric field blocking-up type), after attenuate, first N-type Implantation (for example P ion) is also annealed and is formed one deck N
+resilient coating.Then be that P type Implantation (for example B ion) annealing form collector layer.Need not form N for non-punch device
+resilient coating, only needs to form collector layer.In this method, collector material adopts silicon back side annealing temperature to be subject to the restriction of the maximum temperature that front metal Al electrode can bear, General N
+the highest annealing temperature of resilient coating and collector layer is less than 500 ℃.The activity ratio of this method back side impurity is lower, is generally less than 10%.Laser annealing can avoid this restriction to obtain high impurity activation rate, but needs expensive equipment.
Contrary most of structure of type IGBT and the traditional IGBT structural similarity of leading.Maximum difference is that contrary collector electrode of leading type IGBT is not continuous P
+district, but introduce discontinuously some N
+shorting region.The contrary P that leads type IGBT
-base, N
-drift region, N
+buffering layer by layer and N
+shorting region has formed a PIN diode.Be equivalent to an IGBT and a PIN diode inverse parallel against leading type IGBT, only on same chip, realized.When IGBT is in the time bearing back-pressure, this PIN diode conducting, this is also called the contrary reason of leading type IGBT just.At blocking interval, against leading type IGBT for drift region excess carrier provide one effectively to take passage away, greatly shorten the contrary turn-off time of leading type IGBT.
The contrary thought of leading type IGBT has been saved chip area, encapsulation, testing expense, has reduced device cost.In addition, it also has low loss, good SOA(safety operation area) characteristic, positive temperature coefficient, and good soft turn-off characteristic, short circuit characteristic and good power cycle characteristic.
But, against leading type IGBT in having plurality of advantages, also bring a little problems.Work as N
+shorting region is by N
+on resilient coating, move the level approaching with collector electrode electromotive force to, this causes collector junction to be difficult to positively biased.This produces rebound phenomenon on the one hand, causes on the other hand the hole injection efficiency of collector junction to reduce, thereby causes conduction voltage drop larger.
Summary of the invention
Technical problem to be solved by this invention is to provide contrary collector structure of type IGBT and preparation method thereof of leading of a kind of energy suppression device rebound phenomenon.
For solving the problems of the technologies described above, one aspect of the present invention provides a kind of contrary collector structure of leading type IGBT, comprising: base, N
-germanium defect layer, P
+germanium collector area, N
+germanium shorting region and collector electrode metal layer;
Described N
-germanium defect layer is arranged on bottom surface, base;
Described P
+germanium collector area and N
+germanium shorting region is set up in parallel at described N
-between germanium defect layer bottom surface and described collector electrode metal layer.
Further, described contrary collector structure of leading type IGBT, also comprises:
Resilient coating, described resilient coating is arranged on described N
-between germanium defect layer and described base;
Described resilient coating comprises N
+silicon layer, N
+germanium layer or N
+germanium-silicon layer.
Further, described contrary collector structure of leading type IGBT, also comprises:
N
-germanium layer, described N
-germanium layer is arranged on described N
-germanium defect layer and described P
+germanium collector area and N
+between germanium shorting region.
Further, described contrary collector structure of leading type IGBT, also comprises:
N
+germanium defect layer and P
+germanium defect layer;
Described N
+germanium defect layer is arranged on described N
-germanium defect layer and N
+between germanium shorting region;
Described P
+germanium defect layer is arranged on described N
-germanium defect layer and described P
+between germanium collector area.
Another aspect of the present invention provides a kind of preparation method of contrary collector structure of leading type IGBT, comprising:
By after chip back attenuate, at bottom surface, base extension germanium layer, form N
-germanium defect layer and N
-germanium layer;
At described N
-germanium layer bottom surface is on one side by photoetching, then carries out p type impurity and inject after annealing, formation P
+germanium collector area;
At described N
-germanium layer bottom surface another side is by photoetching, then carries out N-type Impurity injection after annealing, forms N
+germanium shorting region;
By described P+ germanium collector area and N
+the metallization of germanium shorting region bottom surface forms collector electrode metal layer.
Further, the preparation method of described contrary collector structure of leading type IGBT, also comprises:
Forming N
-germanium defect layer and N
-before germanium layer, form resilient coating in the annealing of base underrun Implantation, described resilient coating comprises N
+silicon layer, N
+germanium layer or N
+germanium-silicon layer.
Further, described at formation P
+, when p type impurity is diffused into described N when germanium the collector area
-when on the border, germanium defect layer bottom surface, described P
+germanium collector area covers described N
-germanium layer, with described N
-germanium defect layer bottom surface is connected.
Further, described at formation N
+when germanium shorting region, in the time that N-type Impurity Diffusion arrives border, described N-germanium defect layer bottom surface, described N
+germanium shorting region covers described N
-germanium layer, with described N
-germanium defect layer bottom surface is connected.
Further, described at formation P
+, when p type impurity is diffused into described N when germanium the collector area
-when germanium defect layer is inner, described P
+germanium collector area covers described N
-germanium layer, and p type impurity diffusion region and described P
+germanium defect layer overlapping region forms N
+germanium defect layer.
Further, described at formation N
+when germanium shorting region, when N-type Impurity Diffusion is to described N
-when germanium defect layer is inner, described N
+germanium shorting region covers described N
-germanium layer, and N-type impurity diffusion zone and described N
-germanium defect layer overlapping region forms P
+germanium defect layer.
A kind of contrary collector structure of type IGBT and preparation method thereof of leading provided by the invention, adopt germanium material or germanium silicon material to do the contrary type IGBT backside collector of leading and can significantly reduce collector emitter voltage, the emitter current density while there is rebound phenomenon, thereby suppressed the rebound phenomenon of device.By adopting germanium material or germanium silicon material as back side resilient coating and collector material, can obtain at low temperatures higher impurity activation rate.In addition, owing to having in the interface of germanium and silicon the region that defect concentration is very high, this region can form the doping of P type automatically, has avoided expensive ion implantation process.This method can also reduce conducting voltage and turn-off time.
Accompanying drawing explanation
The structural representation of a kind of contrary collector structure of leading type IGBT that Fig. 1 provides for the embodiment of the present invention one.
Fig. 2 is for preparing shown in Fig. 1 N in structure
-germanium defect layer and N
-the structural representation of germanium layer;
Fig. 3 when preparing structure shown in Fig. 1 at N
-germanium layer bottom surface another side is by photoetching, then carries out the schematic diagram of N-type Impurity injection;
Fig. 4 is for preparing shown in Fig. 1 N in structure
+the structural representation of germanium shorting region;
Fig. 5 when preparing structure shown in Fig. 1 at N
-germanium layer bottom surface another side is by photoetching, then the schematic diagram that carries out p type impurity injection;
Fig. 6 is for preparing shown in Fig. 1 P in structure
+the structural representation of germanium collector area;
The structural representation of a kind of contrary collector structure of leading type IGBT that Fig. 7 provides for the embodiment of the present invention two;
The structural representation of a kind of contrary collector structure of leading type IGBT that Fig. 8 provides for the embodiment of the present invention three;
The structural representation of a kind of contrary collector structure of leading type IGBT that Fig. 9 provides for the embodiment of the present invention four;
The structural representation of a kind of contrary collector structure of leading type IGBT that Figure 10 provides for the embodiment of the present invention five;
The structural representation of a kind of contrary collector structure of leading type IGBT that Figure 11 provides for the embodiment of the present invention six.
Embodiment
Embodiment mono-:
Referring to Fig. 1, a kind of contrary collector structure of leading type IGBT that the embodiment of the present invention provides comprises:
A kind of method of preparing above-mentioned contrary collector structure of leading type IGBT provided by the invention, comprising:
Step S 1: referring to Fig. 2, by after chip back attenuate, at base 100 bottom surface extension germanium layers, form N
- germanium defect layer 101 and N
-germanium layer 102.After prepared by the Facad structure of chip, first chip back is thinned to thickness required while design.Then under the condition of 400 ~ 500 ℃ at the certain thickness germanium of base 100 bottom surface extension.Because silicon Germanium lattice constant has difference, therefore can form the higher N of one deck defect density between silicon and germanium
-germanium defect layer 101.The germanium of extension is the N-type doped semiconductor of low doping concentration.Grow after certain thickness defect germanium, just can grow the germanium layer of low defect density, i.e. N
-germanium layer 102.
Step S2: referring to Fig. 5, Fig. 6 at described N
-germanium layer 102 bottom surfaces are on one side by photoetching, then carry out p type impurity and inject after annealing, formation P
+ germanium collector area 103;
Step S3: referring to Fig. 3, Fig. 4 at described N
-germanium layer 102 bottom surface another sides are by photoetching, then carry out N-type Impurity injection after annealing, form N
+ germanium shorting region 104;
Step S4: by described P
+ germanium collector area 103 and N
+the 104 bottom surface metallization of germanium shorting region form collector electrode metal layer.
Wherein the preparation of step 2 and step 3 order can be exchanged, and while carrying out p type impurity injection and N-type Impurity injection, hydrionic energy is 20-100KeV, and implantation dosage is 10
12-10
16/ cm
2, hydrogen ion activationary temperature is 300 ℃-500 ℃, is preferably 400 ℃, annealing time is 10 seconds to 120 minutes, is preferably 10 minutes to 30 minutes.
Embodiment bis-:
Referring to Fig. 7, a kind of contrary collector structure of leading type IGBT that the embodiment of the present invention provides comprises:
A kind of method of preparing above-mentioned contrary collector structure of leading type IGBT provided by the invention, comprising:
Step S1: referring to Fig. 7, by after chip back attenuate, at base 200 bottom surface extension germanium layers, form N
- germanium defect layer 201 and N
-germanium layer.After prepared by the Facad structure of chip, first chip back is thinned to thickness required while design.Then under the condition of 400 ~ 500 ℃ at the certain thickness germanium of base 200 bottom surface extension.Because silicon Germanium lattice constant has difference, therefore can form the higher N of one deck defect density between silicon and germanium
-germanium defect layer 201.The germanium of extension is the N-type doped semiconductor of low doping concentration.Grow after certain thickness defect germanium, just can grow the germanium layer of low defect density, i.e. N
-germanium layer.
Step S2: at described N
-germanium layer 202 bottom surfaces are on one side by photoetching, then carry out p type impurity and inject after annealing, formation P
+ germanium collector area 203; Described at formation P
+, when p type impurity is diffused into described N when germanium the collector area 203
-when on germanium defect layer the 201 border, bottom surface, described P
+ germanium collector area 203 covers described N
-germanium layer, with described N
- germanium defect layer 201 bottom surfaces are connected.
Step S3: at described N
-germanium layer 202 bottom surface another sides are by photoetching, then carry out N-type Impurity injection after annealing, form N
+ germanium shorting region 204; Described at formation N
+when germanium shorting region 204, when N-type Impurity Diffusion is to described N
-when on germanium defect layer the 201 border, bottom surface, described N
+germanium shorting region 204 covers described N
-germanium layer, with described N
-germanium defect layer 201 bottom surfaces are connected.
Step S4: by described P
+ germanium collector area 103 and N
+the 104 bottom surface metallization of germanium shorting region form collector electrode metal layer.
Wherein the preparation of step 2 and step 3 order can be exchanged, and while carrying out p type impurity injection and N-type Impurity injection, hydrionic energy is 20 – 100KeV, and implantation dosage is 10
12– 10
16/ cm
2, hydrogen ion activationary temperature is 300 ℃-500 ℃, is preferably 400 ℃, annealing time is 10 seconds to 120 minutes, is preferably 10 minutes to 30 minutes.
Embodiment tri-:
Referring to Fig. 8, the contrary collector structure of leading type IGBT that the embodiment of the present invention provides comprises: base 300, N
- germanium defect layer 301, N
+ germanium defect layer 306, P
+ germanium defect layer 305, P
+ germanium collector area 303, N
+ germanium shorting region 304 and collector electrode metal layer 309.N
- germanium defect layer 301 is arranged on 300 bottom surfaces, base.P
+ germanium collector area 303 and N
+ germanium shorting region 304 is set up in parallel at described N
-between germanium defect layer 301 bottom surfaces and described collector electrode metal layer 309.N
+ germanium defect layer 306 is arranged on described N
- germanium defect layer 301 and N
+between germanium shorting region 304; Described P
+ germanium defect layer 305 is arranged on described N
- germanium defect layer 301 and described P
+between germanium collector area 303.
The method of the above-mentioned contrary collector structure of leading type IGBT of preparation that the present embodiment provides comprises:
Step S1: referring to Fig. 8, by after chip back attenuate, at base 300 bottom surface extension germanium layers, form N
- germanium defect layer 301 and N
-germanium layer, after prepared by the Facad structure of chip, is first thinned to chip back thickness required while design.Then under the condition of 400 ~ 500 ℃ at the certain thickness germanium of base 300 bottom surface extension.Because silicon Germanium lattice constant has difference, therefore can form the higher N of one deck defect density between silicon and germanium
-germanium defect layer 301.The germanium of extension is the N-type doped semiconductor of low doping concentration.Grow after certain thickness defect germanium, just can grow the germanium layer of low defect density, i.e. N
-germanium layer.
Step S2: on one side by photoetching, then carry out p type impurity and inject after annealing, formation P in described N-germanium layer bottom surface
+ germanium collector area 303; Forming P
+, when p type impurity is diffused into described N when germanium the collector area 303
-when germanium defect layer 301 is inner, described P
+ germanium collector area 303 covers described N
-germanium layer, and p type impurity diffusion region and described P
+ germanium defect layer 301 overlapping regions form P
+ germanium defect layer 305.
Step S3: at described N
-germanium layer bottom surface another side is by photoetching, then carries out N-type Impurity injection after annealing, forms N
+ germanium shorting region 304; Forming N
+when germanium shorting region 304, when N-type Impurity Diffusion is to described N
-when germanium defect layer 301 is inner, described N
+ germanium shorting region 303 covers described N
-germanium layer, and N-type impurity diffusion zone and described N
- germanium defect layer 301 overlapping regions form N
+germanium defect layer 306.Step S4: by described P
+ germanium collector area 103 and N
+the 104 bottom surface metallization of germanium shorting region form collector electrode metal layer 309.
Wherein the preparation of step 2 and step 3 order can be exchanged, and while carrying out p type impurity injection and N-type Impurity injection, hydrionic energy is 20 – 100KeV, and implantation dosage is 10
12– 10
16/ cm
2, hydrogen ion activationary temperature is 300 ℃-500 ℃, is preferably 400 ℃, annealing time is 10 seconds to 120 minutes, is preferably 10 minutes to 30 minutes.
Embodiment tetra-:
Referring to Fig. 9, the difference of the present embodiment and embodiment mono-is, a kind of contrary collector structure of leading type IGBT that the embodiment of the present invention provides also comprises resilient coating, and resilient coating comprises N+ silicon layer, N
+germanium layer or N
+germanium-silicon layer.That the present embodiment adopts is N
+silicon layer 407.N
+silicon layer 407 is arranged on described N
-between germanium defect layer 101 and described base 100.
The method of the above-mentioned contrary collector structure of leading type IGBT of preparation that the present embodiment provides, step S 1 is by after chip back attenuate, is first annealed and is formed N by Implantation
+silicon layer 407 is as resilient coating, then at N
+silicon layer 407 bottom surface extension germanium layers, form N
- germanium defect layer 101 and N
-germanium layer 102.After prepared by the Facad structure of chip, first chip back is thinned to thickness required while design.Then under the condition of 400 ~ 500 ℃ at N
+the certain thickness germanium of silicon layer 407 bottom surface extension.Because silicon Germanium lattice constant has difference, therefore can form the higher N of one deck defect density between silicon and germanium
-germanium defect layer 101.The germanium of extension is the N-type doped semiconductor of low doping concentration.Grow after certain thickness defect germanium, just can grow the germanium layer of low defect density, i.e. N
-germanium layer 102.Wherein, as the N of resilient coating
+silicon layer 407 can form N by deposit germanium silicon
+germanium-silicon layer is replaced, and also can form N by precipitation germanium
+germanium layer is replaced.
Other are local in full accord with embodiment mono-.
Embodiment five:
Referring to Figure 10, the difference of the present embodiment and embodiment bis-is, a kind of contrary collector structure of leading type IGBT that the embodiment of the present invention provides also comprises resilient coating, and resilient coating comprises N
+silicon layer, N
+germanium layer or N
+germanium-silicon layer.That the present embodiment adopts is N
+silicon layer 507.N
+silicon layer 507 is arranged on described N
-between germanium defect layer 201 and described base 200.
The method of the above-mentioned contrary collector structure of leading type IGBT of preparation that the present embodiment provides, step S 1 is by after chip back attenuate, is first annealed and is formed N by Implantation
+silicon layer 507 is as resilient coating, then at N
+silicon layer 507 bottom surface extension germanium layers, form N
- germanium defect layer 201 and N
-germanium layer 202.After prepared by the Facad structure of chip, first chip back is thinned to thickness required while design.Then under the condition of 400 ~ 500 ℃ at N
+the certain thickness germanium of silicon layer 507 bottom surface extension.Because silicon Germanium lattice constant has difference, therefore can form the higher N of one deck defect density between silicon and germanium
-germanium defect layer 201.The germanium of extension is the N-type doped semiconductor of low doping concentration.Grow after certain thickness defect germanium, just can grow the germanium layer of low defect density, i.e. N
-germanium layer 202.Wherein, as the N of resilient coating
+silicon layer 507 can form N by deposit germanium silicon
+germanium-silicon layer is replaced, and also can form N by precipitation germanium
+germanium layer is replaced.
Other are local in full accord with embodiment mono-.
Embodiment six:
The difference of the present embodiment and embodiment tri-is, a kind of contrary collector structure of leading type IGBT that the embodiment of the present invention provides also comprises resilient coating, and resilient coating comprises N
+silicon layer, N
+germanium layer or N
+germanium-silicon layer.That the present embodiment adopts is N
+silicon layer 607.N
+silicon layer 607 is arranged on described N
-between germanium defect layer 301 and described base 300.
The method of the above-mentioned contrary collector structure of leading type IGBT of preparation that the present embodiment provides, step S1 is by after chip back attenuate, is first annealed and is formed N by Implantation
+silicon layer 607 is as resilient coating, then at N
+silicon layer 607 bottom surface extension germanium layers, form N
- germanium defect layer 301 and N
-germanium layer 302.After prepared by the Facad structure of chip, first chip back is thinned to thickness required while design.Then under the condition of 400 ~ 500 ℃ at N
+the certain thickness germanium of silicon layer 607 bottom surface extension.Because silicon Germanium lattice constant has difference, therefore can form the higher N of one deck defect density between silicon and germanium
-germanium defect layer 301.The germanium of extension is the N-type doped semiconductor of low doping concentration.Grow after certain thickness defect germanium, just can grow the germanium layer of low defect density, i.e. N
-germanium layer 302.Wherein, as the N of resilient coating
+silicon layer 307 can form N by deposit germanium silicon
+germanium-silicon layer is replaced, and also can form N by precipitation germanium
+germanium layer is replaced.
Other are local in full accord with embodiment mono-.
Because the PN junction cut-in voltage of silicon materials is 0.70V, and the PN junction cut-in voltage of germanium material is 0.32V, contrary collector structure of type IGBT and preparation method thereof of leading provided by the invention, adopt germanium material or germanium silicon material to do the contrary type IGBT backside collector of leading and can significantly reduce collector emitter voltage, the emitter current density while there is rebound phenomenon, thereby suppressed the rebound phenomenon of device.By adopting germanium material or germanium silicon material as back side resilient coating and collector material, can obtain at low temperatures higher impurity activation rate.In addition, owing to having in the interface of germanium and silicon the region that defect concentration is very high, this region can form the doping of P type automatically, has avoided expensive ion implantation process.This method can also reduce conducting voltage and turn-off time.Specifically bring following beneficial effect:
(1) significantly reduce collector emitter voltage, the emitter current density while there is rebound phenomenon, thereby suppressed the rebound phenomenon of device;
(2) adopt Implantation, there is accurate impurity concentration control;
(3) impurity activation of low temperature, at 400 ℃, impurity can activate completely;
(4) P
+germanium has higher carrier mobility, and P
+germanium has lower contact berrier, and therefore IGBT has lower conduction voltage drop;
(5) control of collector electrode transparency, germanium has less minority carrier lifetime, overleaf when PN junction positively biased, from N
-base is injected into P
+charge carrier in germanium can be compound faster, and therefore IGBT has turn-off speed faster.
It should be noted last that, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although the present invention is had been described in detail with reference to example, those of ordinary skill in the art is to be understood that, can modify or be equal to replacement technical scheme of the present invention, and not departing from the spirit and scope of technical solution of the present invention, it all should be encompassed in the middle of claim scope of the present invention.
Claims (10)
1. a contrary collector structure of leading type IGBT, is characterized in that, comprising:
Base, N
-germanium defect layer, P
+germanium collector area, N
+germanium shorting region and collector electrode metal layer;
Described N
-germanium defect layer is arranged on bottom surface, base;
Described P
+germanium collector area and N
+germanium shorting region is set up in parallel at described N
-between germanium defect layer bottom surface and described collector electrode metal layer.
2. contrary collector structure of leading type IGBT as claimed in claim 1, is characterized in that, also comprises:
Resilient coating, described resilient coating is arranged on described N
-between germanium defect layer and described base;
Described resilient coating comprises N
+silicon layer, N
+germanium layer or N
+germanium-silicon layer.
3. contrary collector structure of leading type IGBT as claimed in claim 1 or 2, is characterized in that, also comprises:
N
-germanium layer, described N
-germanium layer is arranged on described N
-germanium defect layer and described P
+germanium collector area and N
+between germanium shorting region.
4. contrary collector structure of leading type IGBT as claimed in claim 1 or 2, is characterized in that, also comprises:
N
+germanium defect layer and P
+germanium defect layer;
Described N
+germanium defect layer is arranged on described N
-germanium defect layer and N
+between germanium shorting region;
Described P
+germanium defect layer is arranged on described N
-germanium defect layer and described P
+between germanium collector area.
5. a preparation method for contrary collector structure of leading type IGBT, is characterized in that, comprising:
By after chip back attenuate, at bottom surface, base extension germanium layer, form N
-germanium defect layer and N
-germanium layer;
At described N
-germanium layer bottom surface is on one side by photoetching, then carries out p type impurity and inject after annealing, formation P
+germanium collector area;
At described N
-germanium layer bottom surface another side is by photoetching, then carries out N-type Impurity injection after annealing, forms N
+germanium shorting region;
By described P
+germanium collector area and N
+the metallization of germanium shorting region bottom surface forms collector electrode metal layer.
6. the preparation method of contrary collector structure of leading type IGBT as claimed in claim 5, is characterized in that, also comprises:
Forming N
-germanium defect layer and N
-before germanium layer, form resilient coating in the annealing of base underrun Implantation, described resilient coating comprises N
+silicon layer, N
+germanium layer or N
+germanium-silicon layer.
7. the preparation method of the contrary collector structure of leading type IGBT as described in claim 5 or 6, is characterized in that:
Described at formation P
+, when p type impurity is diffused into described N when germanium the collector area
-when on the border, germanium defect layer bottom surface, described P
+germanium collector area covers described N
-germanium layer, with described N
-germanium defect layer bottom surface is connected.
8. the preparation method of the contrary collector structure of leading type IGBT as described in claim 5 or 6, is characterized in that:
Described at formation N
+when germanium shorting region, when N-type Impurity Diffusion is to described N
-when on the border, germanium defect layer bottom surface, described N
+germanium shorting region covers described N
-germanium layer, with described N
-germanium defect layer bottom surface is connected.
9. the preparation method of the contrary collector structure of leading type IGBT as described in claim 5 or 6, is characterized in that, described carrying out p type impurity injection after annealing, forms P
+germanium collector area comprises:
Described at formation P
+, when p type impurity is diffused into described N when germanium the collector area
-when germanium defect layer is inner, described P
+germanium collector area covers described N
-germanium layer, and p type impurity diffusion region and described P
+germanium defect layer overlapping region forms N
+germanium defect layer.
10. the preparation method of the contrary collector structure of leading type IGBT as described in claim 5 or 6, is characterized in that:
Described at formation N
+when germanium shorting region, when N-type Impurity Diffusion is to described N
-when germanium defect layer is inner, described N
+germanium shorting region covers described N
-germanium layer, and N-type impurity diffusion zone and described N
-germanium defect layer overlapping region forms P
+germanium defect layer.
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| CN106816377A (en) * | 2015-11-30 | 2017-06-09 | 株洲中车时代电气股份有限公司 | IGBT back sides preparation method and IGBT |
| CN112750901A (en) * | 2019-10-30 | 2021-05-04 | 广东美的白色家电技术创新中心有限公司 | Reverse conducting IGBT device and intelligent power module |
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| CN103855204B (en) | 2018-04-03 |
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