CN103840003A - Double-gate graphene transistor with aluminum oxide as gate dielectric and manufacturing method thereof - Google Patents

Double-gate graphene transistor with aluminum oxide as gate dielectric and manufacturing method thereof Download PDF

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CN103840003A
CN103840003A CN201410058290.5A CN201410058290A CN103840003A CN 103840003 A CN103840003 A CN 103840003A CN 201410058290 A CN201410058290 A CN 201410058290A CN 103840003 A CN103840003 A CN 103840003A
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graphene
gate
print
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CN103840003B (en
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郭辉
赵亚秋
张玉明
黄海栗
雷天民
胡彦飞
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Xidian University
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Abstract

The invention discloses a double-gate graphene transistor with aluminum oxide as gate dielectric and a manufacturing method thereof. The double-gate graphene transistor with the aluminum oxide as the gate dielectric mainly solves the problems of reduction of carrier mobility and carrier scattering in a graphene channel due to top grate dielectric of a graphene transistor in the manufacturing process in the prior art. The double-gate graphene transistor is structurally characterized in that two gate electrodes are arranged on the two sides of the graphene channel respectively to form a double-gate structure. The manufacturing method includes the first step of depositing a layer of aluminum oxide on the surface of a washed silicon carbide sample wafer and etching out a structural graph on the aluminum oxide layer, the second step of placing the etched sample wafer into a quartz tube, feeding carbon tetrachloride to react with silicon carbide to generate a carbon film, then placing the sample wafer into argon to carry out annealing to generate graphene and carrying out etching on the portions, 60-400 nanometers away from the two sides of the graphene channel, of the aluminum oxide layer to form gate grooves, and the third step of depositing metal on the sample wafer and etching the sample wafer to form a metal contact layer of the transistor. The double-gate graphene transistor manufactured through the method is capable of effectively improving the carrier mobility ratio and the modulation capacity of the gate electrodes on the channel current.

Description

Double grid Graphene transistor take alundum (Al2O3) as gate medium and preparation method thereof
Technical field
The invention belongs to microelectronics technology, relate to semiconductor device preparation method, specifically with Al 2o 3for the double grid Graphene transistor preparation method of gate medium, can be used for large scale integrated circuit and make.
Technical background
Along with people are to high-performance, high reliability, the raising of low power consumption equipment demand, becomes more and pays close attention to device property on integrated circuit.Graphene, this material being formed by two-dimensional hexagonal carbon lattice, after the Lip river husband that disappeared by two scientist An Delie Jim of Univ Manchester UK and Ke Siteyanuowo from 2004 due to its outstanding electricity structure characteristic finds to obtain, by the candidate materials as manufacturing high performance device.
Geim seminar in 2005 and Kim seminar find, under room temperature, Graphene has about 10cm 2the high carrier mobility of/Vs, is approximately 10 times of commercial silicon chip, and is subject to the impact of temperature and doping effect very little, this is that Graphene is as the most outstanding advantage of nanometer electronic device.Higher carrier mobility and less contact resistance contribute to further to reduce the devices switch time, and the frequency response characteristic of superelevation is another significant advantage of graphene-based electronic device.In addition, different from the silicon and the metal material that use in current electronic device, even when Graphene is reduced to nanoscale, can keep good stability and electric property equally, making to explore single-electron device becomes possibility.Recently, Geim seminar utilizes electron beam lithography and dry etching that same Graphene is processed into quantum dot, lead-in wire and grid, obtain operable Graphene single electron field effect transistor under room temperature, solved the limited problem of serviceability temperature that current single electron field effect transistor is brought due to the unsteadiness of nanoscale material.Holland scientist has reported first Graphene superconducting field-effect pipe, finds that Graphene still can transmit certain electric current in the situation that charge density is zero, for low energy consumption, switching time fast nanoscale superconductive electronic device bring breakthrough.
The document of the nearest device about Graphene emerges in multitude, and is having a lot of reports about Graphene aspect electric capacity, solar cell, transparency electrode.Being on the scene effect transistor FET application aspect also has a lot of reports, as back of the body grid graphene field effect transistor BG-GFET, top grid graphene field effect transistor TG-GFET etc.In the preparation technology of these graphene field effect transistors GFET, need to or transfer on specific Si or SiC substrate Graphene deposition.And in the grid technique of existing top, because top gate medium can be introduced more scattering source, in manufacturing process, graphene film is also easy to be damaged, and causes front and back scattering, and the mobility of top grid TG-GFET is significantly declined simultaneously.
The IBM of International Business Machine Corporation (IBM) declares to work out fastest in the world graphene field effect transistor in research center, and operating frequency reaches 26GHz, and this is the Graphene the fastest transistorized operating frequency measuring so far.IBM represents that grid is made by Silicon-On-Insulator wafer at the Graphene transistor at top, all has very high operating frequency under different grid voltages and length.Result of study shows, along with increasing of frequency, the response curve of conventional transistor is followed in the decline of Graphene transistor current gain equally.And square being inversely proportional to of higher cutoff frequency and grid length reaches 26GHz in 150nm grid are long.In order to realize the transistor that is operated in THz frequency range, just grid need to further be reduced long.
Along with long the reducing of transistor gate, in order to ensure device electric fields bulk properties, according to steady electric field rule in proportion, thickness of dielectric layers must dwindle according to same ratio.Current, be widely used SiO 2as the gate medium of field effect transistor.In the time that its thickness is reduced to nanometer scale, pass through SiO 2leakage current be reduced to exponential increase with thickness, huge like this leakage current badly influences device performance, makes SiO 2can not play insulating effect, finally cause SiO 2no longer be suitable as the gate medium of field-effect transistor FET.
Summary of the invention
The object of the invention is to the deficiency for above-mentioned prior art, propose a kind of double grid Graphene transistor take aluminium oxide as gate medium and preparation method thereof, to avoid ultra-thin gate dielectric SiO 2the leakage problem that tunnelling causes; Exempt manufacturing the etching process to Graphene in transistor process, effectively suppress scattering effect; Improve the modulating action of Graphene transistor gate to channel carrier concentration simultaneously.
For achieving the above object, double grid Graphene transistor of the present invention, comprise: Graphene raceway groove, electrode, gate dielectric layer and SI-substrate, it is characterized in that, the both sides of Graphene raceway groove are respectively provided with a gate electrode, between each gate electrode and Graphene raceway groove, be respectively provided with one deck gate dielectric layer, form double grid electrode structure.
As preferably, described gate medium adopts Al 2o 3material, to thicken the physical thickness of gate dielectric layer, prevents that grid from puncturing.
As preferably, between described each gate electrode and Graphene raceway groove, be spaced apart 60-400nm.
As preferably, described SI-substrate adopts semi-insulating 4H-SiC or 6H-SiC substrate.
For achieving the above object, preparation method of the present invention comprises the following steps:
1) clean: SiC print is cleaned, to remove surface contaminant;
2) deposit Al 2o 3: the SiC print surface after cleaning utilizes atomic layer deposition ALD method growth Al 2o 3film, as mask and gate dielectric layer;
3) litho pattern: be made into first reticle according to the transistorized source S of double grid Graphene, drain D, conducting channel position; At Al 2o 3film surface spin coating one deck photoresist, recycles first reticle, and photoresist is carried out to electron beam exposure, forms corrosion window; Use the Al of corrosive agent to corrosion window place 2o 3film corrodes, and exposes SiC, obtains the window identical with photolithography plate figure;
4) jockey heating: the print after windowing is placed in to quartz ampoule, and connects the reaction unit being formed by there-necked flask, water-bath, resistance furnace and quartz ampoule, quartz ampoule is heated to 750-1150 ℃ with resistance furnace;
5) reaction generates carbon film: CCl will be housed 4the there-necked flask of liquid is heated to 60-80 ℃, then passes into the Ar gas that flow velocity is 40-90ml/min in there-necked flask, utilizes Ar gas to carry CCl 4steam enters in quartz ampoule, makes CCl 4react 20-100min with exposed SiC, generate carbon film;
6) annealing forms Graphene: the carbon film print of generation is placed in to the Ar gas that flow velocity is 20-100ml/min, be the 10-20 minute that anneals at 900-1100 ℃ in temperature, make carbon film reconstitute the Graphene with structure graph at the window's position, formed the transistorized source electrode of double grid Graphene, drain electrode and conducting channel;
7) open grid groove: by the both sides Al apart from conducting channel 60-400nm place on the Graphene print forming 2o 3etch away, form grid groove;
8) depositing metal contact layer: the method depositing metal Pd/Au contact layer of deposited by electron beam evaporation on the Graphene print that has grid groove;
9) photoetching metal contact layer: make second reticle according to double grid, source, leakage metal electrode position; The polymethyl methacrylate solution that is 7% by concentration is spun on metal level, and with 200 ℃ of baking 80s, makes itself and metal level close contact; Utilize second reticle, electron beam exposure polymethyl methacrylate forms the mask pattern in order to etching metal contact layer in polymethyl methacrylate layers; Using oxygen as reacting gas, use reactive ion etching process again, etching metal contact layer, forms the transistorized double grid of double grid Graphene, source, leakage metal electrode;
10) obtain double grid Graphene transistor: the print that uses acetone soln to soak to make takes out post-drying to remove polymethyl methacrylate layers in 10 minutes, obtains double grid Graphene transistor.
The present invention compared with prior art tool has the following advantages:
1. the gate medium Al that the present invention adopts 2o 3owing to thering is higher dielectric constant, thus larger physical thickness can be had, thus avoid leakage problem.
2. the present invention, due to direct growing graphene on SI-substrate, without Graphene transferred to other dielectric substrate in, has simplified technique while making device on this Graphene, has improved device reliability.
3. Graphene transistor of the present invention, its Graphene raceway groove is only present in structure graph region and covers this region completely, therefore without Graphene is carried out to etching, guaranteed that the electron mobility in Graphene can not reduce, has effectively suppressed scattering effect.
4. Graphene transistor of the present invention, owing to adopting double-gate structure, has improved the modulating action of gate voltage Graphene transistor gate to channel carrier concentration.
5. the present invention is due to the Al of deposit 2o 3, not only can be used as mask but also can be used as gate medium, further simplify manufacture craft.
Accompanying drawing explanation
Fig. 1 is the transistorized vertical view of double grid Graphene of the present invention;
Fig. 2 is the transistorized sectional view of double grid Graphene of the present invention;
Fig. 3 is the equipment schematic diagram of preparing Graphene;
Fig. 4 is that the present invention makes the transistorized flow chart of double grid Graphene.
Embodiment
See figures.1.and.2, transistor of the present invention, comprising: gate electrode 1, source electrode 2, drain electrode 3, Graphene raceway groove 4, Al 2o 3gate dielectric layer 5, Al 2o 3mask layer and 4H-SiC or 6H-SiC SI-substrate 6; Al 2o 3mask layer is deposited on the silicon face of 4H-SiC or 6H-SiC SI-substrate 6, and is carved with the grid groove that is used to form gate electrode 1 and the structure graph that is used to form Graphene raceway groove 4; Graphene raceway groove 4 is created on the exposed 4H-SiC in structure graph position or 6H-SiC SI-substrate surface; Source electrode 2 and drain electrode 3 are located at respectively the two ends of Graphene raceway groove 4, are placed in the top of Graphene raceway groove 4; Respectively there is a gate electrode 1 both sides of Graphene raceway groove 4, and this gate electrode 1 is positioned at Al 2o 3in the grid groove of mask layer, and be spaced apart 60nm-400nm between each gate electrode 1 and Graphene raceway groove 4; Al between each gate electrode 1 and Graphene raceway groove 4 2o 3mask layer is as Al 2o 3gate dielectric layer 5, forms double grid electrode structure.The contacting metal that gate electrode 1, source electrode 2 and drain electrode 3 adopt, is Pd/Au alloy, and its thickness is Pd=5nm, Au=100nm.
Under device operating state, electric current is in Graphene raceway groove 4, and edge drain electrode 3 is flowed to source electrode 2 directions to source electrode 2 or drain electrode 3.Grid 1 and Graphene raceway groove 4 use Al 2o 3gate dielectric layer 5 separates, by applying voltage to grid 1, and in modulation Graphene raceway groove 4, the electron concentration of grid 1 correspondence position.
With reference to Fig. 3, the Graphene equipment of preparing of the present invention is mainly by three-way valve 3, there-necked flask 8, and water-bath 9, quartz ampoule 5, resistance furnace 6 forms; Three-way valve 3 is connected with quartz ampoule 5 by first passage 1, be connected, and the right side mouth of there-necked flask 8 is connected with quartz ampoule 5, and CCl is housed in there-necked flask by second channel 2 with the left side mouth of there-necked flask 8 4liquid, and be placed in water-bath 9, quartz ampoule 5 is placed in resistance furnace 6.Three-way valve 3 is provided with air inlet 4, for pass into gas in equipment.
With reference to Fig. 4, the present invention makes the transistorized method of double grid Graphene and provides following three embodiment:
Embodiment 1
Step 1: clean 6H-SiC print, to remove surface contaminant, as Fig. 4 (a).
(1.1) 6H-SiC print is used to NH 4oH+H 2o 2reagent soaks sample 10 minutes, takes out post-drying, to remove sample surfaces organic remains;
(1.2) the 6H-SiC print of removing after surperficial organic remains is re-used to HCl+H 2o 2reagent soaks sample 10 minutes, takes out post-drying, to remove ionic contamination.
Step 2: at 6H-SiC print surface deposition one deck Al 2o 3, as Fig. 4 (b).
(2.1) SiC print is put into growth room, in growth room, pass into the N that flow is 10sccm 2carry out the purging of 2 minutes, repetitive cycling 5 times;
(2.2) open thermostat, growth room is heated to 250 ℃, gas circuit is heated to 40 ℃, continues 60 minutes;
(2.3) in growth room, pass into the N that flow is 10sccm 2carry out the purging of 2 minutes, repetitive cycling 3 times.After this, continue to pass into the N that flow is 15sccm to growth room 2;
(2.4), pass into chamber the steam that flow is 10sccm, the time of passing into is 1 second again; After 40 seconds, pass into trimethyl aluminium to chamber, its flow is 5sccm, and the time of passing into is 1 second, completes first Al 2o 3the atomic layer deposition cycle;
(2.5) complete an Al 2o 340 seconds of atomic layer deposition cycle after, pass into again to chamber the steam that flow is 10sccm, the time of passing into is 1 second; After 40 seconds, pass into trimethyl aluminium to chamber, its flow is 5sccm, and the time of passing into is 1 second, completes another Al 2o 3the atomic layer deposition cycle;
(2.6) repeating step (2.5) totally 2 times, completes needed Al 2o 3the deposit of layer.
Step 3: at Al 2o 3on film, carve structure graph window, as Fig. 4 (c).
(3.1) at Al 2o 3spin coating one deck photoresist on film;
(3.2) be made into reticle according to the transistorized source S of double grid Graphene, drain D, conducting channel position, with electron beam exposure;
(3.3) be HF:NH by component 4f:H 2the corrosive agent of O=3:6:10 is to Al 2o 3film corrodes, and figure in reticle is transferred to Al 2o 3on film, expose 6H-SiC, formation source, leakage and raceway groove graphical window, the channel length that wherein corrosion obtains is 40nm, width is 35nm.
Step 4: pack the print after windowing into quartz ampoule, and exhaust heating.
(4.1) print after windowing is put into quartz ampoule 5, and quartz ampoule is placed in to resistance furnace 6, then by CCl 4liquid packs in there-necked flask 8, and there-necked flask is put into water-bath 9, then according to Fig. 2, quartz ampoule is connected with there-necked flask;
(4.2) pass into from the air inlet 4 of three-way valve 3 the Ar gas that flow velocity is 80ml/min, and utilize three-way valve 3 to control Ar gas to enter quartz ampoule is carried out emptying 30 minutes from first passage 1, the air in quartz ampoule is discharged from gas outlet 7;
(4.3) open resistance furnace mains switch, quartz ampoule is heated to 950 ℃.
Step 5: growth carbon film, as Fig. 4 (d).
(5.1) the fetch boiling water power supply of bath 9, will be equipped with CCl 4the there-necked flask 8 of liquid is heated to 70 ℃;
(5.2) after resistance furnace reaches 950 ℃ of setting, swivel tee valve, making flow velocity is that the Ar gas of 70ml/min flows into there-necked flask from second channel 2, and carries CCl 4steam enters quartz ampoule, makes gaseous state CCl 4in quartz ampoule, react 60 minutes with exposed 6H-SiC, generate carbon film.
Step 6: annealing forms Graphene, as Fig. 4 (e).
The carbon film print of generation is placed in to the Ar gas that flow velocity is 60ml/min, be at 1000 ℃, to anneal 15 minutes in temperature, make carbon film reconstitute Graphene at the window's position, formed the transistorized source electrode of double grid Graphene, drain electrode and conducting channel, obtain double grid Graphene print.
Step 7: open grid groove, as Fig. 4 (f).
By the both sides Al apart from conducting channel 60nm place on the double grid Graphene print forming 2o 3etch away, form grid groove.
Step 8: depositing metal contact layer, as Fig. 4 (g).
(8.1) double grid Graphene print is put on the slide of electron beam evaporation deposition machine, adjusting slide is 50cm to the distance of target, and reative cell pressure is evacuated to 5 × 10 -4pa, adjusting line is 40mA, the metal Pd that deposit a layer thickness is 5nm;
(8.2) the metal A u that the method deposition thickness of recycling electron beam evaporation is 100nm.
Step 9: photoetching forms Metal Contact, as Fig. 4 (h).
(9.1) polymethyl methacrylate solution that spin coating concentration is 7% on metal level, and put into baking oven, at 200 ℃ of baking 80s;
(9.2) be made into reticle according to double grid, source, leakage metal electrode position, polymethyl methacrylate layers exposed with electron beam;
(9.3) utilize reactive ion etching process, etching sheet metal, reacting gas adopts oxygen, obtains the transistorized double grid of double grid Graphene, source, leakage metal electrode.
Step 10: use the sample that acetone soln immersion is made to remove polymethyl methacrylate layers for 10 minutes, take out post-drying, obtain double grid Graphene transistor.
Embodiment 2
Step 1: clean 4H-SiC print, to remove surface contaminant, as Fig. 4 (a).
4H-SiC print is used to NH 4oH+H 2o 2reagent soaks sample 10 minutes, takes out post-drying, to remove sample surfaces organic remains; The 4H-SiC print of removing after surperficial organic remains is re-used to HCl+H 2o 2reagent soaks sample 10 minutes, takes out post-drying, to remove ionic contamination.
Step 2: at 4H-SiC print surface deposition one deck Al 2o 3, as Fig. 4 (b).
2a) SiC print is put into growth room, in growth room, pass into the N that flow is 10sccm 2carry out the purging of 2 minutes, repetitive cycling 5 times;
2b) open thermostat, growth room is heated to 250 ℃, gas circuit is heated to 40 ℃, continues 60 minutes;
2c) in growth room, pass into the N that flow is 10sccm 2carry out the purging of 2 minutes, repetitive cycling 3 times.After this, continue to pass into the N that flow is 15sccm to growth room 2;
2d) pass into chamber the steam that flow is 10sccm, the time of passing into is 1 second again; After 40 seconds, pass into trimethyl aluminium to chamber, its flow is 5sccm, and the time of passing into is 1 second, completes first Al 2o 3the atomic layer deposition cycle;
2e) complete an Al 2o 340 seconds of atomic layer deposition cycle after, pass into again to chamber the steam that flow is 10sccm, the time of passing into is 1 second; After 40 seconds, pass into trimethyl aluminium to chamber, its flow is 5sccm, and the time of passing into is 1 second, completes another Al 2o 3the atomic layer deposition cycle;
2f) repeating step 2e) totally 4 times, complete needed Al 2o 3the deposit of layer.
Step 3: at Al 2o 3on film, carve structure graph window, as Fig. 4 (c).
At Al 2o 3spin coating one deck photoresist on film; Be made into reticle according to the transistorized source S of double grid Graphene, drain D, conducting channel position, with electron beam exposure; Then be HF:NH by component 4f:H 2the corrosive agent of O=3:6:10 is to Al 2o 3film corrodes, and figure in reticle is transferred to Al 2o 3on film, expose 4H-SiC, formation source, leakage and raceway groove graphical window, the channel length that wherein corrosion obtains is 2um, width is 350nm.
Step 4: pack the print after windowing into quartz ampoule, and exhaust heating.
Print after windowing is put into quartz ampoule 5, and quartz ampoule is placed in to resistance furnace 6, then by CCl 4liquid packs in there-necked flask 8, and there-necked flask is put into water-bath 9, then according to Fig. 1, quartz ampoule is connected with there-necked flask; Pass into from the air inlet 4 of three-way valve 3 the Ar gas that flow velocity is 80ml/min, and utilize three-way valve 3 to control Ar gas to enter quartz ampoule is carried out emptying 30 minutes from first passage 1, the air in quartz ampoule is discharged from gas outlet 7; Open resistance furnace mains switch, quartz ampoule is heated to 750 ℃.
Step 5: growth carbon film, as Fig. 4 (d).
The fetch boiling water power supply of bath 9, will be equipped with CCl 4the there-necked flask 8 of liquid is heated to 60 ℃; After resistance furnace reaches 750 ℃ of setting, swivel tee valve, making flow velocity is that the Ar gas of 40ml/min flows into there-necked flask from second channel 2, and carries CCl 4steam enters quartz ampoule, makes gaseous state CCl 4in quartz ampoule, react 20 minutes with exposed 4H-SiC, generate carbon film.
Step 6: annealing forms Graphene, as Fig. 4 (e).
The carbon film print of generation is placed in to the Ar gas that flow velocity is 20ml/min, be at 900 ℃, to anneal 10 minutes in temperature, make carbon film reconstitute Graphene at the window's position, formed the transistorized source electrode of double grid Graphene, drain electrode and conducting channel, obtain double grid Graphene print.
Step 7: open grid groove, as Fig. 4 (f).
By the both sides Al apart from conducting channel 200nm place on the double grid Graphene print forming 2o 3etch away, form grid groove.
Step 8: identical with the step 8 of embodiment 1.
Step 9: identical with the step 9 of embodiment 1.
Step 10: identical with the step 10 of embodiment 1.
Embodiment 3
Steps A: 4H-SiC substrate base is used to NH 4oH+H 2o 2reagent soaks sample 10 minutes, takes out post-drying, to remove sample surfaces organic remains; The 4H-SiC print of removing after surperficial organic remains is re-used to HCl+H 2o 2reagent soaks sample 10 minutes, takes out post-drying, to remove ionic contamination, as Fig. 4 (a).
Step B: at 4H-SiC print surface deposition one deck Al 2o 3film, as Fig. 4 (b)
B1) SiC print is put into growth room, in growth room, pass into the N that flow is 10sccm 2carry out the purging of 2 minutes, repetitive cycling 5 times;
B2) open thermostat, growth room is heated to 250 ℃, gas circuit is heated to 40 ℃, continues 60 minutes;
B3) in growth room, pass into the N that flow is 10sccm 2carry out the purging of 2 minutes, repetitive cycling 3 times, after this, continues to pass into the N that flow is 15sccm to growth room 2;
B4) pass into chamber the steam that flow is 10sccm, the time of passing into is 1 second again; After 40 seconds, pass into trimethyl aluminium to chamber, its flow is 5sccm, and the time of passing into is 1 second, completes first Al 2o 3the atomic layer deposition cycle;
B5) complete an Al 2o 340 seconds of atomic layer deposition cycle after, pass into again to chamber the steam that flow is 10sccm, the time of passing into is 1 second; After 40 seconds, pass into trimethyl aluminium to chamber, its flow is 5sccm, and the time of passing into is 1 second, completes another Al 2o 3the atomic layer deposition cycle;
B6) repeating step B5) totally 6 times, complete needed Al 2o 3the deposit of layer.
Step C: at Al 2o 3on film, carve structure graph window, as Fig. 4 (c).
At Al 2o 3spin coating one deck photoresist on film; Be made into reticle according to the transistorized source S of double grid Graphene, drain D, conducting channel position, with electron beam exposure; Then be HF:NH by component 4f:H 2the corrosive agent of O=3:6:10 is to Al 2o 3film corrodes, and figure in reticle is transferred to Al 2o 3on film, expose 4H-SiC, formation source, leakage and raceway groove graphical window, the channel length that wherein corrosion obtains is 4um, width is 600nm.
Step D: the print after windowing is put into quartz ampoule 5, and quartz ampoule is placed in to resistance furnace 6, then by CCl 4liquid packs in there-necked flask 8, and there-necked flask is put into water-bath 9, then according to Fig. 1, quartz ampoule is connected with there-necked flask; Pass into from the air inlet 4 of three-way valve 3 the Ar gas that flow velocity is 80ml/min, and utilize three-way valve 3 to control Ar gas to enter quartz ampoule is carried out emptying 30 minutes from first passage 1, the air in quartz ampoule is discharged from gas outlet 7; Open resistance furnace mains switch, quartz ampoule is heated to 1150 ℃.
Step e: bath 9 power supplys of fetching boiling water, will be equipped with CCl 4the there-necked flask 8 of liquid is heated to 80 ℃; After resistance furnace reaches 1150 ℃ of setting, swivel tee valve, making flow velocity is that the Ar gas of 90ml/min flows into there-necked flask from second channel 2, and carries CCl 4steam enters quartz ampoule, makes gaseous state CCl 4in quartz ampoule, react 100min with exposed 4H-SiC, generate carbon film, as Fig. 4 (d).
Step F: the carbon film print of generation is placed in to the Ar gas that flow velocity is 100ml/min, be at 1000 ℃, to anneal 20 minutes in temperature, make carbon film reconstitute Graphene at the window's position, the transistorized source electrode of double grid Graphene, drain electrode and conducting channel have been formed, obtain double grid Graphene print, as Fig. 4 (e).
Step G: by the both sides Al apart from conducting channel 400nm place on the double grid Graphene print forming 2o 3etch away, form grid groove, as Fig. 4 (f).
Step H: identical with the step 8 of embodiment 1.
Step I: identical with the step 9 of embodiment 1.
Step J: identical with the step 10 of embodiment 1.

Claims (11)

1. the double grid Graphene transistor take alundum (Al2O3) as gate medium, comprise: Graphene raceway groove (4), electrode, gate dielectric layer (5) and SI-substrate (6), it is characterized in that, the both sides of Graphene raceway groove (4) are respectively provided with a gate electrode (1), between each gate electrode (1) and Graphene raceway groove (4), be respectively provided with one deck gate dielectric layer (5), form double grid electrode structure.
2. transistor according to claim 1, is characterized in that gate medium (5) adopts Al 2o 3material, to thicken the physical thickness of gate dielectric layer, prevents that grid from puncturing.
3. transistor according to claim 1, is characterized in that the grid medium thickness between each gate electrode (1) and Graphene raceway groove (4) is 60-400nm.
4. transistor according to claim 1, the length that it is characterized in that Graphene raceway groove (4) is 40nm-4um, width is 35-600nm.
5. transistor according to claim 1, is characterized in that SI-substrate (6) adopts semi-insulating 4H-SiC or 6H-SiC substrate.
6. the double grid Graphene transistor preparation method take alundum (Al2O3) as gate medium, comprises the following steps:
1) clean: SiC print is cleaned, to remove surface contaminant;
2) deposit alundum (Al2O3): the SiC print surface after cleaning utilizes atomic layer deposition ALD method growth Al 2o 3film, as mask and gate dielectric layer;
3) litho pattern: be made into first reticle according to the transistorized source S of double grid Graphene, drain D, conducting channel position; At Al 2o 3film surface spin coating one deck photoresist, recycles first reticle, and photoresist is carried out to electron beam exposure, forms corrosion window; Use the Al of corrosive agent to corrosion window place 2o 3film corrodes, and exposes SiC, obtains the window identical with photolithography plate figure;
4) jockey heating: the print after windowing is placed in to quartz ampoule, and connects the reaction unit being formed by there-necked flask, water-bath, resistance furnace and quartz ampoule, quartz ampoule is heated to 750-1150 ℃ with resistance furnace;
5) reaction generates carbon film: CCl will be housed 4the there-necked flask of liquid is heated to 60-80 ℃, then passes into the Ar gas that flow velocity is 40-90ml/min in there-necked flask, utilizes Ar gas to carry CCl 4steam enters in quartz ampoule, makes CCl 4react 20-100min with exposed SiC, generate carbon film;
6) annealing forms Graphene: the carbon film print of generation is placed in to the Ar gas that flow velocity is 20-100ml/min, be the 10-20min that anneals at 900-1100 ℃ in temperature, make carbon film reconstitute the Graphene with structure graph at the window's position, formed the transistorized source electrode of double grid Graphene, drain electrode and conducting channel;
7) open grid groove: by the both sides Al apart from conducting channel 60-400nm place on the Graphene print forming 2o 3etch away, form grid groove;
8) depositing metal contact layer: the method depositing metal Pd/Au contact layer of deposited by electron beam evaporation on the Graphene print that has grid groove;
9) photoetching metal contact layer: make second reticle according to double grid, source, leakage metal electrode position; The polymethyl methacrylate solution that is 7% by concentration is spun on metal level, and with 200 ℃ of baking 80s, makes itself and metal level close contact; Utilize second reticle, electron beam exposure polymethyl methacrylate forms the mask pattern in order to etching metal contact layer in polymethyl methacrylate layers; Using oxygen as reacting gas, use reactive ion etching process again, etching metal contact layer, forms the transistorized double grid of double grid Graphene, source, leakage metal electrode;
10) obtain double grid Graphene transistor: use acetone soln soaks the print 10min making to remove polymethyl methacrylate layers, takes out post-drying, obtains double grid Graphene transistor.
7. method according to claim 6, is characterized in that described step 1) cleans SiC print, carries out as follows:
1a) use NH 4oH+H 2o 2reagent soaks SiC print 10 minutes, takes out post-drying, to remove print surface organic remains;
1b) use HCl+H 2o 2reagent soaks print 10 minutes, takes out post-drying, to remove ionic contamination.
8. method according to claim 6, is characterized in that described step 2) middle growth Al 2o 3film, is undertaken by following processing step:
2a) SiC print is put into growth room, in growth room, pass into the N that flow is 10sccm 2carry out the purging of 2 minutes, repetitive cycling 5 times;
2b) open thermostat, growth room is heated to 250 ℃, gas circuit is heated to 40 ℃, continues 60min;
2c) in growth room, pass into the N that flow is 10sccm 2carry out the purging of 2min, repetitive cycling 3 times;
2d) keep passing into the N that flow is 15sccm to growth room 2;
2e) passing into N 240s after, pass into successively steam and trimethyl aluminium completes an Al to chamber 2o 3the atomic layer deposition cycle.Wherein the flow that passes into of steam is 10sccm, and the time of passing into is 1s; The flow that passes into of trimethyl aluminium is 5sccm, and the time of passing into is 1s;
2f) repeating step 2e), until needed Al 2o 3all deposit of layer.
9. method according to claim 6, is characterized in that use corrosive agent described in the step 3) Al to corrosion window place 2o 3film corrodes, and wherein the proportion relation of corrosive agent is: HF:NH 4f:H 2o=3:6:10, corrosion rate is 10nm/s.
10. method according to claim 6, is characterized in that the electron beam evaporation deposit in described step 8), and its process conditions are: substrate is 50cm to the distance of target, and reative cell pressure is 5 × 10 -4pa, line is 40mA.
11. methods according to claim 6, is characterized in that the metal Pd/Au layer in described step 8), and its thickness is for being respectively Pd=5nm, Au=100nm.
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