CN103762162B - Can double-end-controllagroove groove type insulated gate bipolar transistor body pipe and preparation method thereof - Google Patents
Can double-end-controllagroove groove type insulated gate bipolar transistor body pipe and preparation method thereof Download PDFInfo
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- CN103762162B CN103762162B CN201310712725.9A CN201310712725A CN103762162B CN 103762162 B CN103762162 B CN 103762162B CN 201310712725 A CN201310712725 A CN 201310712725A CN 103762162 B CN103762162 B CN 103762162B
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- 238000002360 preparation method Methods 0.000 title claims abstract description 11
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 73
- 229920005591 polysilicon Polymers 0.000 claims description 67
- 229910052681 coesite Inorganic materials 0.000 claims description 62
- 229910052906 cristobalite Inorganic materials 0.000 claims description 62
- 239000000377 silicon dioxide Substances 0.000 claims description 62
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 62
- 229910052682 stishovite Inorganic materials 0.000 claims description 62
- 229910052905 tridymite Inorganic materials 0.000 claims description 62
- 239000002019 doping agent Substances 0.000 claims description 10
- 238000002347 injection Methods 0.000 claims description 6
- 239000007924 injection Substances 0.000 claims description 6
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- 238000007254 oxidation reaction Methods 0.000 claims description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 4
- 239000013078 crystal Substances 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
- AZDRQVAHHNSJOQ-UHFFFAOYSA-N alumane Chemical group [AlH3] AZDRQVAHHNSJOQ-UHFFFAOYSA-N 0.000 claims description 3
- 238000000151 deposition Methods 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims description 3
- 230000000903 blocking effect Effects 0.000 abstract description 22
- 239000004065 semiconductor Substances 0.000 abstract description 10
- 230000002457 bidirectional effect Effects 0.000 abstract description 3
- 150000002500 ions Chemical class 0.000 description 12
- 230000008901 benefit Effects 0.000 description 7
- 238000011161 development Methods 0.000 description 6
- 238000013461 design Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
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- 238000012938 design process Methods 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
- H01L29/66333—Vertical insulated gate bipolar transistors
Abstract
The present invention discloses one kind can double-end-controllagroove groove type insulated gate bipolar transistor body pipe, including substrate, it is identical that the two ends of device are provided with shape, but the structure of changeable parameters, invention additionally discloses it is a kind of can double-end-controllagroove groove type insulated gate bipolar transistor body pipe preparation method, the structure proposed in the present invention efficiently solves the problems, such as that convention trench type IGBT reverse blocking capabilities are weak with the problem long with the turn-off time, there is provided a kind of applicability it is extremely strong can double-ended control two-way type device, it is alternative to constitute the miniature circuit with bidirectional characteristic with multiple semiconductor devices, greatly save the energy and improve the utilization rate of electric energy, alleviate the task of top priority of the current power shortage of China.
Description
Technical field
The invention belongs to power semiconductor device design and application field, and in particular to it is a kind of can double-ended control it is groove-shaped
Insulated gate bipolar transistor, the invention further relates to it is a kind of can double-end-controllagroove groove type insulated gate bipolar transistor body pipe preparation
Method.
Background technology
Insulated gate bipolar transistor (IGBT), it is a kind of to be composited with metal-oxide-semiconductor field effect transistor by bipolar transistor
The power semiconductor controlled by grid voltage.
It is to solve power electronic devices especially electric power field-effect transistor MOSFET early 1980s that IGBT is
Conduction voltage drop high, be difficult to be made have concurrently blocking voltage high and big on state current characteristic, power transistor GTR working frequencies it is low, drive
Streaming current is big to wait multiple device that is not enough and occurring.IGBT has the advantage of MOSFET and GTR concurrently, the switch speed high with MOSFET
The advantages of degree, high input impedance, small driving power and simple drive circuit, and the high current with bipolar transistor, height
The advantages of blocking voltage, low on-state voltage drop, there is fabulous development prospect.
Device for high-power power electronic is the hardcore of modern power electronics technology, and its development has turned into measurement one
One important symbol of State Grid's application of electronic technology and development level.From from the point of view of application at present, in main flow power device
In part either half control type or full-control type, the overwhelming majority is one-way type device, and two-way type device is relatively fewer, but
It is in some application fields, to often require that power device must be two-way type, currently without suitable power electronic devices
These demands in circuit can be met, replaced typically by one circuit of design, this can increase circuit power consumption, increase circuit
The risk of operation, so research two-way type device is inexorable trend at present.
The purposes of IGBT is widely, small to household electrics such as convertible frequency air-conditioner, Silent refrigerator, washing machine, electromagnetic oven, micro-wave ovens
Device, greatly to electric locomotive traction system all in the development stage.Compared with foreign countries, the manufacturing process technology of IGBT at least falls behind ten
Year, the production domesticization form of IGBT is quite urgent, and the forward blocking ability and reverse blocking capability of existing IGBT are all poor, and
Its turn-off time problem more long is not resolved still, therefore, carry out the R＆D work of IGBT to Chinese national economy and
The development tool of national defense industry is of great significance.
From from the point of view of application at present, the overwhelming majority is one-way type device, two-way type device in main flow power device
It is relatively fewer, but in actual applications, often require that power device must be two-way type, and designer is typically by design
One simple circuit replaces, and this can increase circuit power consumption, and security when working circuit also results in threat.It is conventional at present
Groove-shaped IGBT has been widely used, but the raising of convention trench type IGBT forward blockings ability and reverse blocking capability has always
To be solved, the turn-off time, the problem big with tail currents long also received much concern always, also had researcher to propose planar gate two-way type
IGBT, but the various drawbacks problem especially in terms of latch-up that planar gate structure is present causes to circuit normal work
Very big threat, the shortcoming for planar gate two-way type IGBT and convention trench type IGBT launches research and has developed into necessarily to become
Gesture.
The content of the invention
It is an object of the invention to provide one kind can double-end-controllagroove groove type insulated gate bipolar transistor body pipe, solve existing
Two-way type device is less and forward blocking ability of convention trench type IGBT is weak and reverse blocking capability is weak asks in technology
Topic.
It is a further object to provide it is a kind of can double-end-controllagroove groove type insulated gate bipolar transistor body pipe system
Preparation Method.
The first technical scheme of the present invention is:One kind can double-end-controllagroove groove type insulated gate bipolar transistor body
Pipe, including N-Sub type substrates, the upper and lower surface middle part of N-Sub type substrates are etched with first groove and second groove, first respectively
A SiO is respectively arranged with groove and second groove2Grid oxide layer and the 2nd SiO2Grid oxide layer, a SiO2Grid oxide layer and second
SiO2It is deposited with the first polysilicon gate and the second polysilicon gate on grid oxide layer respectively, the first polysilicon gate and the second polysilicon gate
Outer surface is respectively arranged with first electrode and second electrode, a SiO2Grid oxide layer both sides are symmetrically arranged with a P+ traps, first
SiO2A N+ traps are provided between grid oxide layer and a P+ traps；2nd SiO2Grid oxide layer both sides are symmetrically arranged with the 2nd P+ traps, the
Two SiO2The 2nd N+ traps are provided between grid oxide layer and the 2nd P+ traps；The both sides of first groove and can double-ended control it is groove-shaped
The upper surface of insulated gate bipolar transistor is respectively arranged with the 3rd electrode；The both sides of second groove and can double-ended control ditch
The lower surface of groove typed insulation grid bipolar transistor is respectively arranged with the 4th electrode.
The features of the present invention is also resided in,
The dopant of the first P+ traps and the 2nd P+ traps is B ions, described N-sub substrates, a N+ traps, the 2nd N+ traps,
First polysilicon gate, the dopant of the second polysilicon gate are P ion.
The doping concentration of the first polysilicon gate and the second polysilicon gate is 1 × 1019cm-3-1×1021cm-3；First polycrystalline
Si-gate and the second polysilicon gate groove depth are 4 μm~10 μm, and width is 4 μm~10 μm, and more than the first polysilicon gate and second
The parameter of crystal silicon grid is identical.
The doping concentration of the first polysilicon gate and the second polysilicon gate is 1 × 1019cm-3-1×1021cm-3；First polycrystalline
Si-gate and the second polysilicon gate groove depth are 4 μm~10 μm, and width is 4 μm~10 μm, and more than the first polysilicon gate and second
The parameter of crystal silicon grid is different.
The doping concentration of the first P+ traps and the 2nd P+ traps is 1 × 1017cm-3-3×1019cm-3；First P+ traps and the 2nd P+
The well depth of trap is 4 μm~8 μm, and width is 8 μm~18 μm；And the first P+ traps and the 2nd P+ traps parameter it is identical.
The doping concentration of the first P+ traps and the 2nd P+ traps is 1 × 1017cm-3-3×1019cm-3；The first P+ traps and
The well depth of two P+ traps is 4 μm~8 μm, and width is 8 μm~18 μm；And the first P+ traps and the 2nd P+ traps parameter it is different.
The concentration of N-Sub type substrates is 1 × 1013cm-3-1×1014cm-3；Thickness be more than 300 μm, width be 20 μm~
40μm；First SiO2Grid oxide layer and the 2nd SiO20.2 μm~0.8 μm of the thickness of grid oxide layer, width is 0.2 μm~0.8 μm.
Second technical scheme of the present invention is that one kind can double-end-controllagroove groove type insulated gate bipolar transistor body
The preparation method of pipe, prepare one kind can double-end-controllagroove groove type insulated gate bipolar transistor body pipe, including N-Sub types lining
Bottom, the upper and lower surface middle part of N-Sub type substrates is etched with first groove and second groove respectively, in first groove and second groove
It is respectively arranged with a SiO2Grid oxide layer and the 2nd SiO2Grid oxide layer, a SiO2Grid oxide layer and the 2nd SiO2On grid oxide layer respectively
It is deposited with the first polysilicon gate and the second polysilicon gate, the outer surface of the first polysilicon gate and the second polysilicon gate is respectively arranged with
First electrode and second electrode, a SiO2Grid oxide layer both sides are symmetrically arranged with a P+ traps, a SiO2Grid oxide layer and a P+
A N+ traps are provided between trap；2nd SiO2Grid oxide layer both sides are symmetrically arranged with the 2nd P+ traps, the 2nd SiO2Grid oxide layer and second
The 2nd N+ traps are provided between P+ traps；Both sides of first groove and can double-end-controllagroove groove type insulated gate bipolar transistor body pipe
Upper surface be respectively arranged with the 3rd electrode；The both sides of the second groove and can double-ended control groove-shaped insulated gate bipolar
The lower surface of transistor npn npn is respectively arranged with the 4th electrode, specifically implements according to following steps：
Step 1, selection concentration are 1 × 1013cm-3-1×1014cm-3N-type substrate piece, dopant is P ion, and thickness is
More than 300 μm, width is 20 μm~40 μm, used as the N-Sub type substrates of device；
Step 2, two-sided plus mask plate and two-sided etching form depth for 4 μm~10 μm, and width is the first of 4 μm~10 μm
Groove and second groove, then remove mask plate；
Step 3, two-sided oxidation form SiO2Layer, 0.2 μm~0.8 μm of thickness, 0.2 μm~0.8 μm of width, the time is
30min temperature is 1200 DEG C；
Step 4, two-sided depositing polysilicon, thickness are 4 μm~10 μm, and width is 4 μm~10 μm, and dopant is P, and formation is mixed
Miscellaneous concentration is 1 × 1019cm-3-5×1022cm-3Polysilicon gate and planarized；
Step 5, two-sided etches polycrystalline silicon gate and SiO2Layer, with formed the first polysilicon gate and the second polysilicon gate and
First SiO2Grid oxide layer and the 2nd SiO2Grid oxide layer；
Step 6, two-sided oxidation Si form masking layer, time 60min, 1000 DEG C of temperature；
Step 7, on the first polysilicon gate and the second polysilicon gate respectively plus mask plate carry out B ion implantings, formation is mixed
Miscellaneous concentration is 1 × 1017cm-3-3×1019cm-3A P+ traps and the 2nd P+ traps, well depth is 4 μm~8 μm, and width is 8 μm
~18 μm, and annealed, the time is 100min, and temperature is 1150 DEG C；
Step 8, add the mask plate to carry out P ion injection in a P+ traps and the 2nd P+ traps edge, formed doping concentration for 1 ×
1019cm-3-1×1021cm-3A N+ traps and the 2nd N+ traps, well depth is 1 μm~3 μm, and width is 2 μm~6 μm, goes forward side by side
Row annealing, the time is 60min, 1150 DEG C of temperature；
Step 9, removal mask plate, in a SiO2Grid oxide layer and the 2nd SiO2Grid oxide layer top and its both sides add mask plate
P ion injection is carried out, it is 1 × 10 to form doping concentration19cm-3-1×1021cm-3The first polysilicon gate and the second polysilicon gate,
Groove depth is 4 μm~10 μm, and width is 4 μm~10 μm, and is annealed, and the time is 120min, and temperature is 1150 DEG C；
Step 10, removal mask plate, remove masking layer；
Step 11, in a SiO2Grid oxide layer and the 2nd SiO2Grid oxide layer top plus mask plate, deposit aluminium form first electrode
With second electrode and the 3rd electrode and the 4th electrode, mask is removed；
It is that to be formed can double-end-controllagroove groove type insulated gate bipolar transistor body pipe by above-mentioned steps.
The beneficial effects of the invention are as follows：Invention one kind can double-end-controllagroove groove type insulated gate bipolar transistor body pipe, first
It is the reduction of the latch-up that existing planar gate two-way type IGBT is present；Next to that solving the positive resistance of convention trench type IGBT
The cutting capacity difference problem long with the problem of reverse blocking capability difference and convention trench type IGBT turn-off times；Furthermore it is to provide one
Kind can double-ended control two-way type semiconductor power device, alleviate current two-way type device and lack brought a series of problems.
Be mainly manifested in, we can with can double-end-controllagroove groove type insulated gate bipolar transistor body pipe replace existing planar gate two-way
Type IGBT, reduces that device issuable device hot-spot, operating current in circuit dynamic duty are excessive etc. may to be caused
The problem of circuit malfunction, it is ensured that the security of circuit；Two-way type device also has certain advantage in terms of turn-off speed, can be fast
The tail currents that fast abatement device is produced when turning off so that be obtained in that smaller power is damaged when device works in dynamic circuit
Consumption, shortens the turn-off time of device, reduces the threat that device tail currents are caused to circuit, it is ensured that circuit is in normal work
Security when making.We also can use can double-end-controllagroove groove type insulated gate bipolar transistor body pipe replace original with multiple half
Conductor device miniature circuit of the composition with bidirectional characteristic, reduces the quantity of semiconductor devices in operating circuit, allows circuit design
Person simpler can ensure circuit security, correctness operationally, convenient also more convenient in the encapsulation of integrated circuit；
By can double-end-controllagroove groove type insulated gate bipolar transistor body pipe come instead of the two-way function circuit originally with multiple devices,
The power attenuation that reduction is produced when being worked in dynamic circuit.
Beneficial effects of the present invention are also resided in, can double-end-controllagroove groove type insulated gate bipolar transistor body pipe be that one kind can be double
The two-way type semiconductor devices of control is held, in the design process of device, we can be according to the actual demand of user, to device
The two ends of substrate set different doping concentration and dimensional parameters, and incoming end can be as needed selected in use with control
End, allows device to turn into a kind of extremely strong new device of applicability, can better meet the demand of user.
Brief description of the drawings
Fig. 1 is the longitudinal sectional drawing of convention trench type insulated gate bipolar transistor of the present invention for contrasting；
Fig. 2 be the present invention can double-end-controllagroove groove type insulated gate bipolar transistor body pipe longitudinal sectional drawing；
Fig. 3 is that the present invention can double-end-controllagroove groove type insulated gate bipolar transistor body tube preparation method process chart；
Fig. 4 be existing convention trench type IGBT of the invention with can double-end-controllagroove groove type insulated gate bipolar transistor body pipe
The contrast curve of forward blocking characteristic；
Fig. 5 be existing convention trench type IGBT of the invention with can double-end-controllagroove groove type insulated gate bipolar transistor body pipe
The contrast curve of reverse blocking voltage；
In figure, 1. first electrode, 2. the 3rd electrode, 3. N+ traps, 4. P+ traps, 5. the 2nd P+ traps, 6. the 2nd N+
Trap, 7. the 4th electrode, 8. second electrode, 9. a SiO2Grid oxide layer, 10. the first polysilicon gate, 11. gate terminal electrodes, 12. hairs
Emitter-base bandgap grading termination electrode, 13.N+ traps, 14.P+ traps, 15.SiO2Grid oxide layer, 16.P+ layers, 17. collector terminal electrodes, 18. polysilicon gates,
19.N-Sub type substrates, 20. the 2nd SiO2Grid oxide layer, 21. second polysilicon gates.
Specific embodiment
The present invention is described in detail with reference to the accompanying drawings and detailed description.
The present invention provide one kind can double-end-controllagroove groove type insulated gate bipolar transistor body pipe, as shown in Fig. 2 including N-
Sub types substrate 19, the upper and lower surface middle part of N-Sub types substrate 19 is etched with first groove and second groove, first groove respectively
With a SiO is respectively arranged with second groove2The SiO of grid oxide layer 9 and the 2nd2Grid oxide layer 20, a SiO2Grid oxide layer 9 and second
SiO2The first polysilicon gate 10 and the second polysilicon gate 21, the first polysilicon gate more than 10 and second are deposited with grid oxide layer 20 respectively
The outer surface of crystal silicon grid 21 is respectively arranged with first electrode 1 and second electrode 8, a SiO2The both sides of grid oxide layer 9 are symmetrically arranged with
First P+ traps 4, a SiO2A N+ traps 3 are provided between the P+ traps 4 of grid oxide layer 9 and the；2nd SiO2The both sides pair of grid oxide layer 20
Title is provided with the 2nd P+ traps 5, the 2nd SiO2The 2nd N+ traps 6 are provided between the P+ traps 5 of grid oxide layer 20 and the 2nd；The two of first groove
Side and can the upper surface of double-end-controllagroove groove type insulated gate bipolar transistor body pipe be respectively arranged with the 3rd electrode 2；Second ditch
The both sides of groove and can the lower surface of double-end-controllagroove groove type insulated gate bipolar transistor body pipe be respectively arranged with the 4th electrode 7.
The dopant of the first P+ traps 4 and the 2nd P+ traps 5 be B ions, N-sub substrates 19, a N+ traps 3, the 2nd N+ traps 6,
First polysilicon gate 10, the dopant of the second polysilicon gate 21 are P ion.
The doping concentration of the first polysilicon gate 10 and the second polysilicon gate 21 is 1 × 1019cm-3-1×1021cm-3；First
The groove depth of 10 and second polysilicon gate of polysilicon gate 21 is 4 μm~10 μm, and width is 4 μm~10 μm, and the first polysilicon gate
10 is identical with the parameter of the second polysilicon gate 21.
The doping concentration of the first polysilicon gate 10 and the second polysilicon gate 21 is 1 × 1019cm-3-1×1021cm-3；First
The groove depth of 10 and second polysilicon gate of polysilicon gate 21 is 4 μm~10 μm, and width is 4 μm~10 μm, and the first polysilicon gate
10 is different with the parameter of the second polysilicon gate 21.
The doping concentration of P+ traps 4 and the trap of falling P+ 5 is 1 × 1017cm-3-3×1019cm-3；The well depth of P+ traps 4 and P+ traps 5 is equal
It it is 4 μm~8 μm, width is 8 μm~18 μm；And P+ traps 4 are identical with the parameter of P+ traps 5.
The doping concentration of P+ traps 4 and P+ traps 5 is 1 × 1017cm-3-3×1019cm-3；The well depth of P+ traps 4 and P+ traps 5 is
4 μm~8 μm, width is 8 μm~18 μm；And P+ traps 4 are different with the parameter of P+ traps 5.
The doping concentration of the first N+ traps 3 and the 2nd N+ traps 6 is 1 × 1019cm-3-1×1021cm-3, a N+ traps 3 and
The well depth of two N+ traps 6 is 1 μm~3 μm, and width is 2 μm~6 μm；And the first N+ traps 3 it is identical with the parameter of the 2nd N+ traps 6.
The doping concentration of the first N+ traps 3 and the 2nd N+ traps 6 is 1 × 1019cm-3-1×1021cm-3, a N+ traps 3 and
The well depth of two N+ traps 6 is 1 μm~3 μm, and width is 2 μm~6 μm；And the first N+ traps 3 it is different with the parameter of the 2nd N+ traps 6.
The concentration of N-Sub types substrate 19 is 1 × 1013cm-3-1×1014cm-3；Thickness is more than 300 μm, and width is 20 μm
~40 μm；First SiO2The SiO of grid oxide layer 9 and the 2nd20.2 μm~0.8 μm of the thickness of grid oxide layer 20, width is 0.2 μm~0.8 μm.
Convention trench type IGBT is shown in Fig. 1, and entirely silicon materials are constituted, and 11 is gate terminal electrodes in figure, and 12 is emitter terminal
Electrode, 17 is collector terminal electrode, and 13 is N+ traps, and 14 is P+ traps, and 15 is SiO2Layer is grid oxide layer, and 16 is P+ layers, and 18 is polycrystalline
Si-gate.Difference be in the present invention can double-end-controllagroove groove type insulated gate bipolar transistor body pipe be in convention trench type IGBT
P+ layers 16 at carry out structure innovation, referring in particular to Fig. 2, the present invention can make the convention trench type IGBT can double-ended control as one
Two-way type device, the problem for making the forward blocking ability of conventional IGBT poor with reverse blocking capability improved.
It is provided by the present invention can double-end-controllagroove groove type insulated gate bipolar transistor body pipe be by first electrode 1 and
Two 8 two, electrode electrodes carry out opening for control device can respectively connect height with shut-off direction, the 3rd electrode 2 and the 4th electrode 7
Current potential serves as the emitter and collector of conventional IGBT, is specially connect when on the 3rd electrode 2 plus during positive voltage on the 4th electrode 7
Negative voltage, can opening and shut-off by the control device of second electrode 8；When positive voltage is added on the 4th electrode 7 on the 3rd electrode 2
Negative voltage is connect, by opening and shut-off for the control device of first electrode 1；The work that concrete operating principle can refer to conventional IGBT is former
Reason.
Shadow of the change of the doping concentration and dimensional parameters of N-Sub substrates 19 of the present invention to forward and reverse blocking characteristics of device
Ring very big, the doping concentration of substrate is lower, device size is thicker, and forward conduction voltage drop is bigger, and reverse blocking voltage is better, because
, in order to strengthen its blocking ability, we generally do substrate from the relatively low Si pieces of thicker and doping concentration for this.The two-sided P of device
The change of+trap, N+ traps, the doping concentration of polysilicon gate and size has an impact on the influence of device parameters, and we can root
According to the trench gate IGBT for needing to make two-sided parameter unbalance, including the chi for changing polysilicon gate construction, P+ traps, N+ traps
The thickness of very little and doping concentration and grid oxide layer.
The drawbacks of existing present invention is generally directed to existing planar gate two-way type IGBT and the positive resistance of convention trench type IGBT
The raising of cutting capacity is studied with the raising of reverse blocking capability, and research finds, can double-ended control groove-shaped insulated gate it is double
Bipolar transistor can eliminate the various drawbacks of planar gate two-way type IGBT presence, especially in terms of latch-up；In conventional ditch
Characteristic of forward blocking characteristic and the reverse blocking voltage aspect of groove profile IGBT all than the convention trench type IGBT of same scale is good, tool
Body result is shown in Fig. 3 and Fig. 4.In the present invention can double-end-controllagroove groove type insulated gate bipolar transistor body pipe structure binding isotherm
Can draw, two-way type device also has certain advantage in terms of turn-off speed, can quickly abatement device turn off when produce drag
Tail current so that smaller power attenuation is obtained in that when device works in dynamic circuit, has greatly saved the energy and has carried
The utilization rate of electric energy has been risen, the turn-off time of device has been shortened, the threat that device tail currents are caused to circuit has been reduced, it is ensured that
Security of the circuit in normal work.
It is a further object to provide it is a kind of can double-end-controllagroove groove type insulated gate bipolar transistor body pipe system
Preparation Method, preparing one kind can double-end-controllagroove groove type insulated gate bipolar transistor body pipe, including N-Sub types substrate 19, N-
The upper and lower surface middle part of Sub types substrate 19 is etched with first groove and second groove respectively, divides in first groove and second groove
A SiO is not provided with2The SiO of grid oxide layer 9 and the 2nd2Grid oxide layer 20, a SiO2The SiO of grid oxide layer 9 and the 2nd2On grid oxide layer 20
The appearance of the first polysilicon gate 10 and the second polysilicon gate 21, the first polysilicon gate 10 and the second polysilicon gate 21 is deposited with respectively
Face is respectively arranged with first electrode 1 and second electrode 8, a SiO2The both sides of grid oxide layer 9 are symmetrically arranged with a P+ traps 4, first
SiO2A N+ traps 3 are provided between the P+ traps 4 of grid oxide layer 9 and the；2nd SiO2The both sides of grid oxide layer 20 are symmetrically arranged with the 2nd P+
Trap 5, the 2nd SiO2The 2nd N+ traps 6 are provided between the P+ traps 5 of grid oxide layer 20 and the 2nd；Both sides of first groove and can both-end control
The upper surface of the trench-type insulated gate bipolar transistor of system is respectively arranged with the 3rd electrode 2；Both sides of second groove and can
The lower surface of double-end-controllagroove groove type insulated gate bipolar transistor body pipe is respectively arranged with the 4th electrode 7, specifically according to following step
It is rapid to implement：
Step 1, selection concentration are 1 × 1013cm-3-1×1014cm-3N-type substrate piece, dopant is P ion, and thickness is
More than 300 μm, width is 20 μm~40 μm, used as the N-Sub types substrate 19 of device；
Step 2, two-sided plus mask plate and two-sided etching form depth for 4 μm~10 μm, and width is the first of 4 μm~10 μm
Groove and second groove, then remove mask plate；
Step 3, two-sided oxidation form SiO2Layer, 0.2 μm~0.8 μm of thickness, 0.2 μm~0.8 μm of width, the time is
30min temperature is 1200 DEG C；
Step 4, two-sided depositing polysilicon, thickness are 4 μm~10 μm, and width is 4 μm~10 μm, and dopant is P, and formation is mixed
Miscellaneous concentration is 1 × 1019cm-3-5×1022cm-3Polysilicon gate and planarized；
Step 5, two-sided etches polycrystalline silicon gate and SiO2Layer, to form the first polysilicon gate 10 and the second polysilicon gate 21
And a SiO2The SiO of grid oxide layer 9 and the 2nd2Grid oxide layer 20；
Step 6, two-sided oxidation Si are into masking layer, time 60min, 1000 DEG C of temperature；
Step 7, on the first polysilicon gate 10 and the second polysilicon gate 21 respectively plus mask plate carry out B ion implantings, shape
It is 1 × 10 into doping concentration17cm-3-3×1019cm-3P+ traps 4 and P+ traps 5, well depth is 4 μm~8 μm, width be 8 μm~
18 μm, and annealed, the time is 100min, and temperature is 1150 DEG C；
Step 8, add the mask plate to carry out P ion injection in a P+ traps 4 and the edge of the second L-type P+ traps 5, form doping concentration
It is 1 × 1019cm-3-1×1021cm-3A N+ traps 3 and the 2nd N+ traps 6, well depth is 1 μm~3 μm, and width is 2 μm~6 μ
M, and annealed, the time is 60min, 1150 DEG C of temperature；
Step 9, removal mask plate, in a SiO2The SiO of grid oxide layer 9 and the 2nd2The top of grid oxide layer 20 and its both sides add mask
Version carries out P ion injection, and it is 1 × 10 to form doping concentration19cm-3-1×1021cm-3The first polysilicon gate 10 and the second polycrystalline
Si-gate 21, groove depth is 4 μm~10 μm, and width is 4 μm~10 μm, and is annealed, and the time is 120min, and temperature is 1150
℃；
Step 10, removal mask plate, remove masking layer；
Step 11, in a SiO2The SiO of grid oxide layer 9 and the 2nd2The top of grid oxide layer 20 plus mask plate, deposit aluminium form first
Electrode 1 and the electrode 2 of second electrode 8 and the 3rd and the 4th electrode 7, remove mask；
It is that to be formed can double-end-controllagroove groove type insulated gate bipolar transistor body pipe by above-mentioned steps.
It is a feature of the present invention that this can double-end-controllagroove groove type insulated gate bipolar transistor body pipe be that a kind of both-end is controllable
Two-way type device, be to carry out structure innovation at P+ layers 16 of convention trench type IGBT, referring in particular to Fig. 2, including it is conventional often
Advise the N+ traps 13 of groove-shaped IGBT device grid both sides, and this can double-end-controllagroove groove type insulated gate bipolar transistor body pipe knot
Structure and preparation method can be widely used in the conventional devices such as planar gate IGBT, plane-trench gate IGBT, GTR, MOSFET.
It is an advantage of the invention that：Invention one kind can double-end-controllagroove groove type insulated gate bipolar transistor body pipe, subtract first
The latch-up that existing planar gate two-way type IGBT is present is lacked；Next to that solving the forward blocking energy of convention trench type IGBT
The power difference problem long with the problem of reverse blocking capability difference and convention trench type IGBT turn-off times；Furthermore being to provide one kind can
The two-way type semiconductor power device of double-ended control, alleviates current two-way type device and lacks brought a series of problems.Mainly
Performance is, we can with can double-end-controllagroove groove type insulated gate bipolar transistor body pipe replace existing planar gate two-way type
IGBT, reduces that device issuable device hot-spot, operating current in circuit dynamic duty are excessive etc. may to cause electricity
The problem of road failure, it is ensured that the security of circuit；Two-way type device also has certain advantage in terms of turn-off speed, can be quick
The tail currents that abatement device is produced when turning off so that be obtained in that smaller power is damaged when device works in dynamic circuit
Consumption, shortens the turn-off time of device, reduces the threat that device tail currents are caused to circuit, it is ensured that circuit is in normal work
Security when making.We also can use can double-end-controllagroove groove type insulated gate bipolar transistor body pipe replace original with multiple half
Conductor device miniature circuit of the composition with bidirectional characteristic, reduces the quantity of semiconductor devices in operating circuit, allows circuit design
Person simpler can ensure circuit security, correctness operationally, convenient also more convenient in the encapsulation of integrated circuit；
By can double-end-controllagroove groove type insulated gate bipolar transistor body pipe come instead of the two-way function circuit originally with multiple devices,
The power attenuation that reduction is produced when being worked in dynamic circuit.
Beneficial effects of the present invention are also resided in, can double-end-controllagroove groove type insulated gate bipolar transistor body pipe be that one kind can be double
The two-way type semiconductor devices of control is held, in the design process of device, we can be according to the actual demand of user, to device
Two ends set different doping concentration and dimensional parameters, and incoming end and control end can be as needed selected in use, allow
Device turns into a kind of extremely strong new device of applicability, can better meet the demand of user.And this can double-ended control ditch
The structure and preparation method of groove typed insulation grid bipolar transistor can be widely used in plane-trench gate IGBT, GTR,
In the conventional devices such as MOSFET, preferably promote the development of China's Power Electronic Technique.
Claims (1)
1. it is a kind of can double-end-controllagroove groove type insulated gate bipolar transistor body pipe preparation method, it is characterised in that prepare
One kind can double-end-controllagroove groove type insulated gate bipolar transistor body pipe, including N-Sub types substrate (19), N-Sub types substrate (19)
Upper and lower surface middle part be etched with first groove and second groove respectively, be respectively arranged with the first groove and second groove
First SiO2Grid oxide layer (9) and the 2nd SiO2Grid oxide layer (20), a SiO2Grid oxide layer (9) and the 2nd SiO2On grid oxide layer (20)
The first polysilicon gate (10) and the second polysilicon gate (21), the first polysilicon gate (10) and the second polysilicon gate are deposited with respectively
(21) outer surface is respectively arranged with first electrode (1) and second electrode (8), a SiO2Grid oxide layer (9) both sides are symmetrical
It is provided with a P+ traps (4), a SiO2A N+ traps (3) are provided between grid oxide layer (9) and a P+ traps (4)；Described
Two SiO2Grid oxide layer (20) both sides are symmetrically arranged with the 2nd P+ traps (5), the 2nd SiO2Between grid oxide layer (20) and the 2nd P+ traps (5)
It is provided with the 2nd N+ traps (6)；Both sides of the first groove and can double-end-controllagroove groove type insulated gate bipolar transistor body pipe
Upper surface be respectively arranged with the 3rd electrode (2)；The both sides of the second groove and can double-ended control groove-shaped insulated gate
The lower surface of bipolar transistor is respectively arranged with the 4th electrode (7), specifically implements according to following steps：
Step 1, selection concentration are 1 × 1013cm-3-1×1014cm-3N-type substrate piece, dopant is P ion, and thickness is 300 μm
More than, width is 20 μm~40 μm, used as N-Sub types substrate (19) of device；
Step 2, two-sided plus mask plate and two-sided etching form depth for 4 μm~10 μm, and width is 4 μm~10 μm of first groove
And second groove, then remove mask plate；
Step 3, two-sided oxidation form SiO2Layer, 0.2 μm~0.8 μm of thickness, 0.2 μm~0.8 μm of width, the time is 30min temperature
It is 1200 DEG C；
Step 4, two-sided depositing polysilicon, thickness are 4 μm~10 μm, and width is 4 μm~10 μm, and dopant is P, form doping dense
Spend is 1 × 1019cm-3-5×1022cm-3Polysilicon gate and planarized；
Step 5, two-sided etches polycrystalline silicon gate and SiO2Layer, to form the first polysilicon gate (10) and the second polysilicon gate (21)
And a SiO2Grid oxide layer (9) and the 2nd SiO2Grid oxide layer (20)；
Step 6, two-sided oxidation Si form masking layer, time 60min, 1000 DEG C of temperature；
Step 7, on the first polysilicon gate (10) and the second polysilicon gate (21) respectively plus mask plate carry out B ion implantings, shape
It is 1 × 10 into doping concentration17cm-3-3×1019cm-3A P+ traps (4) and the 2nd P+ traps (5), well depth is 4 μm~8 μm,
Width is 8 μm~18 μm, and is annealed, and the time is 100min, and temperature is 1150 DEG C；
Step 8, the mask plate is added to carry out P ion injection in a P+ traps (4) and the 2nd P+ traps (5) edge, it is 1 to form doping concentration
×1019cm-3-1×1021cm-3A N+ traps (3) and the 2nd N+ traps (6), well depth is 1 μm~3 μm, and width is 2 μm~6
μm, and annealed, the time is 60min, 1150 DEG C of temperature；
Step 9, removal mask plate, in a SiO2Grid oxide layer (9) and the 2nd SiO2Grid oxide layer (20) top and its both sides add mask
Version carries out P ion injection, and it is 1 × 10 to form doping concentration19cm-3-1×1021cm-3The first polysilicon gate (10) and more than second
Crystal silicon grid (21), groove depth is 4 μm~10 μm, and width is 4 μm~10 μm, and is annealed, and the time is 120min, and temperature is
1150℃；
Step 10, removal mask plate, remove masking layer；
Step 11, in a SiO2Grid oxide layer (9) and the 2nd SiO2Grid oxide layer (20) top plus mask plate, deposit aluminium form first
Electrode (1) and second electrode (8) and the 3rd electrode (2) and the 4th electrode (7), remove mask.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US6153495A (en) * | 1998-03-09 | 2000-11-28 | Intersil Corporation | Advanced methods for making semiconductor devices by low temperature direct bonding |
| JP2009141270A (en) * | 2007-12-10 | 2009-06-25 | Denso Corp | Semiconductor apparatus |
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| DE4438640C1 (en) * | 1994-10-28 | 1996-02-01 | Siemens Ag | Double-sided power semiconductor device |
| JP6006918B2 (en) * | 2011-06-06 | 2016-10-12 | ルネサスエレクトロニクス株式会社 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, AND ELECTRONIC DEVICE |
| CN102738240B (en) * | 2012-06-04 | 2015-05-27 | 电子科技大学 | Bigrid power MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device |
| CN103383957B (en) * | 2013-07-08 | 2015-08-19 | 电子科技大学 | A kind of inverse conductivity type IGBT device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US6153495A (en) * | 1998-03-09 | 2000-11-28 | Intersil Corporation | Advanced methods for making semiconductor devices by low temperature direct bonding |
| JP2009141270A (en) * | 2007-12-10 | 2009-06-25 | Denso Corp | Semiconductor apparatus |
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