CN103746789A - Method for realizing high-precision time scales in IEEE-1588 protocol based on CPU universal timer - Google Patents

Method for realizing high-precision time scales in IEEE-1588 protocol based on CPU universal timer Download PDF

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CN103746789A
CN103746789A CN201310697514.2A CN201310697514A CN103746789A CN 103746789 A CN103746789 A CN 103746789A CN 201310697514 A CN201310697514 A CN 201310697514A CN 103746789 A CN103746789 A CN 103746789A
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time
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cpu
purpose timer
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CN103746789B (en
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胡啸
朱启晨
于震江
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Beijing Sifang Automation Co Ltd
Beijing Sifang Engineering Co Ltd
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Beijing Sifang Automation Co Ltd
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Abstract

The invention discloses a method for realizing high-precision time scales in an IEEE-1588 protocol based on a CPU universal timer. According to the method, high-precision Ethernet packet receiving and transmitting time scales can be acquired by making use of the signal capture function of a universal timer of a CPU, capturing the change of relevant signals of Ethernet data receiving and transmitting, and adopting corresponding software to carry out processing. The method can support a two-step method and a two-step method in the IEEE-1588 protocol and is especially applicable to a hardware platform not providing support for IEEE-1588 in the aspect of hardware so as to achieve a high-precision IEEE-1588 time checking function.

Description

A kind of calibration method while realizing in IEEE-1588 agreement high accuracy based on CPU general purpose timer
Technical field
The invention belongs to electric power system power electronics and relaying protection field, relate in particular to the Time synchronization technique in described field, calibration method while particularly realizing in IEEE-1588 agreement high accuracy with general purpose timer.
Background technology
IEEE-1588 to time technology be a kind of based on table tennis to time principle precision clock simultaneous techniques, it adopts short frame transmission, algorithm is simple, all lower to the requirement of calculated performance and the network bandwidth, be applicable to as the distributed network communication system of this class support multicast message of the process layer in intelligent substation.
At present, IEEE-1588 to time the application of technology in electric power system, mainly also concentrate on the process layer in intelligent substation, with meet the required precision of described process layer be better than 1us to time.
IEEE-1588 to time precision, target precision while depending on the sending and receiving of Ethernet message, it,, in when application, has two kinds of modes of one-step method and two-step method, target processing when two kinds of main differences of mode are the transmission to sending message:
When i. two-step method is applied, device is sending after IEEE-1588 message, the transmission markers of described message can be encapsulated in an Ethernet message and again send.
When ii. one-step method is applied, device, when sending IEEE-1588 message, need to be inserted the transmission markers of described message in described message.
Described markers, refers to the TAI(world atomic time corresponding to transmitting-receiving moment of IEEE-1588 message) time.At present, when obtaining IEEE-1588 and applying required high accuracy, target mode mainly contains two kinds: the one, and the ethernet PHY chip special with IEEE-1588 obtains; The 2nd, use ethernet mac integrated the CPU of IEEE-1588 function.The versatility of described two kinds of modes is all poor, and hardware cost is higher, and the latter also cannot realize the one-step method function in IEEE-1588.
Summary of the invention
For solve existing IEEE-1588 to time be applied in and in timestamp, exist while obtaining high accuracy: versatility is poor, hardware cost is high, one-step method function is supported to the problems such as limited, and the application discloses a kind of calibration method while realizing in IEEE-1588 agreement high accuracy based on CPU general purpose timer.
The application specifically by the following technical solutions.
Calibration method when a kind of general purpose timer based on CPU is realized in IEEE-1588 high accuracy, it is characterized in that: described method is by the signal capture function in the general purpose timer of use CPU, catch the variation of the coherent signal of Ethernet data sending and receiving, obtain the sending and receiving markers of high-precision Ethernet message.
A kind of calibration method while realizing in IEEE-1588 agreement high accuracy based on CPU general purpose timer,, it is characterized in that, IEEE-1588 to time while adopting two-step method application, said method comprising the steps of:
(1) ethernet PHY chip is connected with cpu chip by MII interface, and the transmission enable signal (TX_EN) in MII interface and reception data are effectively indicated to (RX_DV) signal, the input signal that is connected to the general purpose timer of CPU is caught on pin;
(2) use the general purpose timer of CPU, safeguard the time shaft of a TAI, each count value of general purpose timer is corresponding one by one with the time of TAI;
(3) enable signal TX_EN and reception data effectively indicate the rising edge moment of RX_DV signal to be the sending and receiving moment of Ethernet message, by using the capturing function of general purpose timer, obtain the count value of the general purpose timer in described moment;
(4) count value of the general purpose timer of the CPU corresponding the Ethernet message sending and receiving moment is converted to TAI time value, can obtains sending markers and receive markers.
(5) in step (4), obtain and send markers and receive markers, need to side-play amount, compensate according to the requirement of IEEE-1588.
Described IEEE-1588 to time adopt one-step method when application, said method comprising the steps of:
(1) ethernet PHY chip is connected with cpu chip by MII interface, and the transmission enable signal (TX_EN) in MII interface and reception data are effectively indicated to (RX_DV) signal, be connected on the input capture pin of general purpose timer of CPU;
(2) use the general purpose timer of CPU, safeguard the time shaft of a TAI, each count value of timer is corresponding one by one with the time of TAI;
(3) receive data and effectively indicate the rising edge moment of RX_DV signal to be time of reception of Ethernet message, by using the capturing function of general purpose timer, obtain the count value of the general purpose timer of message time of reception;
(4) count value of the general purpose timer corresponding Ethernet message time of reception is converted to TAI time value, obtains receiving markers;
(5) in step (4), obtain reception markers, need to side-play amount, compensate according to the requirement of IEEE-1588.
(6) when sending message, first open an Interruption, after time delay a period of time, trigger and interrupt, need accurately to calculate the triggering moment of described interruption, and the triggering moment of described interruption is added after forward delay interval, convert to and send markers and insert and wait the civilian respective field of transmitting messages; The initial value of forward delay interval is 0;
(7) on the basis of step (6), literary composition to be transmitted messages is write to transmission buffer memory, but do not enable message, send the triggering of interrupting described in waiting step (6).
(8), after described down trigger, enable immediately message and send;
(9) the rising edge moment of enable signal TX_EN is the delivery time of Ethernet message, by using the capturing function of general purpose timer, obtains the count value of the general purpose timer of the actual delivery time of message;
(10) scale value while the count value of the general purpose timer corresponding actual delivery time of described Ethernet message being converted to actual transmission;
(11) in step (10), obtain transmission markers, need to side-play amount, compensate according to the requirement of IEEE-1588.
(12) calculate in step (6) the down trigger moment to the delay time of the actual transmission of message, and using described delay time as step forward delay interval after (6) middle real-time update.
The application has following technique effect:
1. timestamp when obtaining the reception of IEEE-1588 message, no longer needs CPU or ethernet PHY integrated chip IEEE-1588 function;
2. timestamp when obtaining the transmission of IEEE-1588 two-step method message, no longer needs CPU or ethernet PHY integrated chip IEEE-1588 function;
3. timestamp when obtaining the transmission of IEEE-1588 one-step method message, no longer needs ethernet PHY integrated chip IEEE-1588 function.
Accompanying drawing explanation
Fig. 1 is in the inventive method, the reception of related MII interface and transmission timing figure;
Fig. 2 is in the inventive method, timestamp while realizing in IEEE-1588 high accuracy with the general purpose timer of CPU, the structured flowchart of the minimum system that CPU and peripheral hardware form;
Fig. 3 is in the inventive method, a kind of flow chart during calibration method while realizing the high accuracy in one-step method in IEEE-1588 agreement based on CPU general purpose timer.
Embodiment
Below in conjunction with Figure of description to being described in further detail in technical method of the present invention.
At present, 32 bit CPUs of main flow, in the chips such as ARM, PowerPC, have all integratedly suffered powerful general purpose timer, these timers provide on the basis of basic timing, timing function by count value, and the functions such as input signal is caught, output signal comparison (coupling) all can be provided.Described input signal capturing function, refers to that described general purpose timer can identify the variation of input signal, and the count value of the timer in signal intensity moment described in latch.In addition, described general purpose timer, all can provide the interrupt function that type is abundant, as interruptions such as Interruption, signal capture, output matchings.By the capturing function of general purpose timer, in conjunction with the signal intensity of Ethernet, can design a kind of universal method and indirectly realize the markers function in IEEE-1588.
At present, the ethernet mac (MAC controller) of 32 bit CPUs of main flow provides MII interface mostly, for being connected with ethernet PHY chip.A complete MII interface has 16 holding wires, specifically comprises TX_ER, TXD[0:3], TX_EN, TX_CLK, COL, RXD[0:3], RX_EX, RX_CLK, the signal such as CRS, RX_DV.When its reception and transmission, the sequential of RX_DV and TX_EN signal and other signal as shown in Figure 1.
The inventive method, is applicable to 32 common bit CPUs of market and ethernet PHY chip.The ethernet PHY chip of any support MII interface is all suitable for, and the cpu chip of any support MII interface integrated 32 general purpose timers is all suitable for.At this ARM Cortex-M3 chip LPC1788 take NXP company and the DP83848 of TI company ethernet PHY, as example, be specifically illustrated.
IEEE-1588 agreement is in when application, have one-step method and two-step method point, the inventive method is all suitable for, but the step realizing is different, wherein performing step during two-step method is as follows:
1, LPC1788 is connected as shown in Figure 2 with DP83848 chip:
The signal demand of i.DP83848 chip MII interface is connected by the standard-required of MII interface with the signal of LPC1788 chip MII interface.
Ii. the TX_EN signal in described MII interface signal also needs CAP0.0 corresponding to timer 0 module that is connected to LPC1788 to catch pin (catching passage 0).
Iii. the RX_DV signal in described MII interface signal also needs the CAP0.1 of timer 0 correspondence that is connected to LPC1788 to catch pin (catching passage 1).
2, with the timer 0 of LPC1788, safeguard the time shaft of a TAI, specific as follows:
I. the timer 0 of described LPC1788 adopts CPU internal bus clock to drive, and clock frequency can be optional at 10~50Mhz on demand.Timer 0 does not enable inner pre-divider, is operated in timer pattern.
Ii. in described LPC1788, choose the whole second moment (TaiSoc) of certain TAI time, record the value of the current counter (T0TC register) of the LPC1788 timer 0 in described moment, described Counter Value is the described TaiSoc moment, corresponding position (TaiPos) on the counter of timer 0.
Iii. the input clock frequency fTMR Hz using according to described LPC1788 timer 0, calculates whole second timer 0 counter incrementing (TaiPrd) corresponding to cycle: TaiPrd=fTMR of TAI.
Iv. described LPC1788 is every the currency (GtmCnt) of a T0TC register of 500ms inquiry, when described GtmCnt and TaiPos value exceed TaiPrd, cumulative to TaiSoc value, and the value of TaiPos is added to TaiPrd simultaneously, accumulative frequency, depending on GtmCnt and TaiPos difference size, finally need guarantee that difference is less than TaiPrd.If described TaiPos value is overflowed when cumulative, intercept low 32 reservations.
V. on the basis of step I, ii, iii, repeating step iv, can realize the maintenance of TAI time shaft.
3, obtain the Ethernet message sending and receiving moment, the count value of corresponding general purpose timer, concrete steps are as follows:
I. configure T0IR, T0CCR register in described LPC1788, CAP0.0 and CAP0.1 are set to the rising edge of lock-on signal, catch the rising edge of TX_EN and RX_DV signal.
Ii. the Ethernet data that enables described LPC1788 receives and is sent completely interruption, often receives an effective Ethernet bag or completes after the transmission of an Ethernet bag, all can trigger interruption.
Iii. in described receive interruption, read the T0CR0 register of timer 0, to obtain the value of catching of CAP0.0 pin, to determine the count value (RxCapCnt) of timer 0 in RX_DV rising edge moment; Described, be sent completely in interruption, read the T0CR1 register of timer 0, to obtain the value of catching of CAP0.1 pin, to determine the count value (TxCapCnt) of timer 0 in TX_EN rising edge moment.
4, the count value (TxCapCnt and RxCapCnt) of the general purpose timer corresponding the Ethernet message sending and receiving moment of obtaining in step 3 is converted to and sends markers (TxPreTs) and receive markers (RxPreTs).By the CapCnt in the following formula of described count value (TxCapCnt and RxCapCnt) substitution, the TsTaiSec calculating and TsTaiNsec be described transmission markers (TxPreTs) and receive markers (RxPreTs) second and nanosecond part:
I. work as CapCnt>=TaiPos, and CapCnt-TaiPos>=2 31
TsTaiSec = TaiSoc - floor ( 2 32 + TaiPos - CapCnt TaiPrd )
TsTaiN sec = [ 1 - mod ( 2 32 + CapCnt - TaiPos TaiPrd ) TaiPrd ] × 10 9
Ii. work as CapCnt>=TaiPos, and CapCnt-TaiPos<2 31
TsTaiSec = TaiSoc + ceil ( CapCnt - TaiPos TaiPrd )
TsTaiN sec = mod ( CapCnt - TaiPos TaiPrd ) TaiPrd &times; 10 9
Iii. work as CapCnt<TaiPos, and TaiPos-CapCnt>=2 31
TsTaiSec = TaiSoc + ceil ( 2 32 + CapCnt - TaiPos TaiPrd )
TsTaiN sec = mod ( 2 32 + CapCnt - TaiPos TaiPrd ) TaiPrd &times; 10 9
Iv. work as CapCnt<TaiPos, and TaiPos-CapCnt<2 31
TsTaiSec = TaiSoc - floor ( TaiPos - CapCnt TaiPrd )
TsTaiN sec = [ 1 - mod ( TaiPos - CapCnt TaiPrd ) TaiPrd ] &times; 10 9
In the formula of above-mentioned i~iv:
A) CapCnt is the count value that in timer 0, trapping module obtains;
B) TaiSoc is the current whole second value of the TAI time of maintenance in described CPU;
C) TaiPos is the described TaiSoc moment, the count value of timer 0 counter;
D) TaiPrd is whole second timer 0 rolling counters forward increment corresponding to cycle of TAI;
E) TsTaiSec is the whole second part that is drawn the TAI time by CapCnt conversion, and unit is second;
F) TsTaiNsec is the second following part that is drawn the TAI time by CapCnt conversion, and unit is nanosecond;
G) floor () is the function that rounds up, and ceil () is downward bracket function, and mod () is remainder function.
5, to the reception markers calculating in step 4 and transmission markers, according to the requirement of IEEE-1588, side-play amount is compensated.As shown in Figure 1, what the reception markers (RxPreTs) obtaining in step 4 and transmission markers (TxPreTs) were corresponding is reception and the delivery time of the original position of Ethernet message Preamble code, but the time target position defining in IEEE-1588 agreement (Message ' s Timestamp Point) be the end position of Preamble code, therefore actual reception markers (RxTs) and transmission markers (TxTs) need to be in the value Last Offset amounts of described RxPreTs and TxPreTs, described side-play amount is the required time of the transmission of Preamble code on MII interface, be specially for 480 nanoseconds.
Performing step during IEEE-1588 one-step method is as follows, and its realization flow is as follows:
1, LPC1788 is connected as shown in Figure 2 with DP83848 chip:
The signal demand of i.DP83848 chip MII interface is connected by the standard-required of MII interface with the signal of LPC1788 chip MII interface.
Ii. the TX_EN signal in described MII interface signal also needs CAP0.0 corresponding to timer 0 module that is connected to LPC1788 to catch pin (catching passage 0).
Iii. the RX_DV signal in described MII interface signal also needs the CAP0.1 of timer 0 correspondence that is connected to LPC1788 to catch pin (catching passage 1).
2, with the timer 0 of LPC1788, safeguard the time shaft of a TAI, specific as follows:
I. the timer 0 of described LPC1788 adopts CPU internal bus clock to drive, and clock frequency can be optional at 10~50Mhz on demand.Timer 0 does not enable inner pre-divider, is operated in timer pattern.
Ii. in described LPC1788, choose the whole second moment (TaiSoc) of certain TAI time, record the value of the current counter (T0TC register) of the LPC1788 timer 0 in described moment, described Counter Value is the described TaiSoc moment, corresponding position (TaiPos) on the counter of timer 0.
Iii. the input clock frequency fTMR Hz using according to described LPC1788 timer 0, calculates whole second timer 0 counter incrementing (TaiPrd) corresponding to cycle: TaiPrd=fTMR of TAI.
Iv. described LPC1788 is every the currency (GtmCnt) of a T0TC register of 500ms inquiry, when described GtmCnt and TaiPos value exceed TaiPrd, cumulative to TaiSoc value, and the value of TaiPos is added to TaiPrd simultaneously, accumulative frequency, depending on GtmCnt and TaiPos difference size, finally need guarantee that difference is less than TaiPrd.If described TaiPos value is overflowed when cumulative, intercept low 32 reservations.
V. on the basis of step I, ii, iii, repeating step iv, can realize the maintenance of TAI time shaft.
3, obtain Ethernet message time of reception, the count value of corresponding general purpose timer, concrete steps are as follows:
I. configure T0IR, T0CCR register in described LPC1788, CAP0.0 and CAP0.1 are set to the rising edge of lock-on signal, catch the rising edge of TX_EN and RX_DV signal.
Ii. the Ethernet data that enables described LPC1788 receives and is sent completely interruption, often receives an effective Ethernet bag or completes after the transmission of an Ethernet bag, all can trigger interruption.
Iii. in described receive interruption, read the T0CR0 register of timer 0, to obtain the value of catching of CAP0.0 pin, to determine the count value (RxCapCnt) of timer 0 in RX_DV rising edge moment.
4, the count value (RxCapCnt) of the general purpose timer corresponding Ethernet message time of reception of obtaining in step 3 is converted to and receives markers (RxPreTs).Described transfer process adopts following formula i~iv, the RxTsTaiSec calculating and RxTsTaiNsec be described reception markers (RxPreTs) second and nanosecond part:
I. work as RxCapCnt>=TaiPos, and RxCapCnt-TaiPos>=2 31
RxTsTaiSec = TaiSoc - floor ( 2 32 + TaiPos - RxCapCnt TaiPrd )
RxTsTaiN sec = [ 1 - mod ( 2 32 + RxCapCnt - TaiPos TaiPrd ) TaiPrd ] &times; 10 9
Ii. work as RxCapCnt>=TaiPos, and RxCapCnt-TaiPos<2 31
RxTsTaiSec = TaiSoc + ceil ( RxCapCnt - TaiPos TaiPrd )
RxTsTaiN sec = mod ( RxCapCnt - TaiPos TaiPrd ) TaiPrd &times; 10 9
Iii. work as RxCapCnt<TaiPos, and TaiPos-RxCapCnt>=2 31
RxTsTaiSec = TaiSoc + ceil ( 2 32 + RxCapCnt - TaiPos TaiPrd )
RxTsTaiN sec = mod ( 2 32 + RxCapCnt - TaiPos TaiPrd ) TaiPrd &times; 10 9
Iv. work as RxCapCnt<TaiPos, and TaiPos-RxCapCnt<2 31
RxTsTaiSec = TaiSoc - floor ( TaiPos - RxCapCnt TaiPrd )
RxTsTaiN sec = [ 1 - mod ( TaiPos - RxCapCnt TaiPrd ) TaiPrd ] &times; 10 9
In the formula of above-mentioned i~iv:
A) RxCapCnt is the count value of the RX_DV signal rising edge that in timer 0, trapping module obtains;
B) TaiSoc is the current whole second value of the TAI time of maintenance in described CPU;
C) TaiPos is the described TaiSoc moment, the count value of timer 0 counter;
D) TaiPrd is whole second timer 0 rolling counters forward increment corresponding to cycle of TAI;
E) RxTsTaiSec is the whole second part that is drawn the TAI time by RxCapCnt conversion, and unit is second;
F) RxTsTaiNsec is the second following part that is drawn the TAI time by RxCapCnt conversion, and unit is nanosecond;
G) floor () is the function that rounds up, and ceil () is downward bracket function, and mod () is remainder function.
5, to the reception markers calculating in step 4, according to the requirement of IEEE-1588, side-play amount is compensated.As shown in Figure 1, what the reception markers (RxPreTs) that obtains in step 4 was corresponding is the time of reception of the original position of Ethernet message Preamble code, but the time target position defining in IEEE-1588 agreement (Message ' s Timestamp Point) be the end position of Preamble code, therefore actual reception markers (RxTs) need to be in the value Last Offset amount of described RxPreTs, described side-play amount is the required time of the transmission of Preamble code on MII interface, is specially for 480 nanoseconds.
6,, when needs send IEEE-1588 message, with reference to Fig. 3, need first to complete successively the following steps rapid:
I. read the T0TC register of described LPC1788 timer 0, to obtain the count value (CurCnt) of current timer 0.
Ii. configure the T0MCR register of timer 0, to enable to mate the interruption of passage 0.And the value of T0MR0 is set to CurCnt+DlyCnt, set the coupling that time delay DlyCnt/TaiPrd triggers timer 0 second afterwards and interrupt, described TaiPrd is whole second timer 0 counter incrementing corresponding to cycle of TAI.The value of DlyCnt value need guarantee that described LPC1788 should complete the operation of subsequent step 7 before described coupling interrupts occurring, and at this, setting delay duration is 20 milliseconds.
Iii. by the conversion formula in the value substitution step 4 of described CurCnt+DlyCnt, target theoretical value (TxThsTs) in the time of can obtaining sending.Described TxThsTs is added to actual forward delay interval (TxDlyTs), can obtain actual transmission markers (TxActTs).The value of described TxDlyTs can be carried out real-time update by subsequent step 8~12, and its initial value is 0.
7, the value of TxActTs described in step 6 is inserted after the respective field of IEEE-1588 message, described message is inserted to Ethernet and send buffer memory, wouldn't enable to send the arrival of interrupting described in ii step in waiting step 6.
8,, when after coupling passage 0 down trigger of the timer 0 of described LPC1788, in interrupt service routine neutrality, enable Ethernet message and send, to start sending function.
9,, on the basis of step 8, wait for the triggering of the transmission interruption of Ethernet message.After described down trigger, read the T0CR1 register of described LPC1788 timer 0, to obtain the value of catching of CAP0.1 pin, to determine the count value (TxCapCnt) of timer 0 in TX_EN rising edge moment.
10, the count value (TxCapCnt) of general purpose timer corresponding the Ethernet message delivery time obtaining in step 9 is converted to and sends markers (TxPreTs).Described transfer process adopts following formula i~iv, the TxTsTaiSec calculating and TxTsTaiNsec be described transmission markers (TxPreTs) second and nanosecond part:
I. work as TxCapCnt>=TaiPos, and (TxCapCnt TaiPos)>=2 31
TxTsTaiSec = TaiSoc - floor ( 2 32 + TaiPos - TxCapCnt TaiPrd )
TxTsTaiN sec = [ 1 - mod ( 2 32 + TxCapCnt - TaiPos TaiPrd ) TaiPrd ] &times; 10 9
Ii. as TxCapCnt>=TaiPos, and (TxCapCnt-TaiPos) <2 31
TxTsTaiSec = TaiSoc + ceil ( TxCapCnt - TaiPos TaiPrd )
TxTsTaiN sec = mod ( TxCapCnt - TaiPos TaiPrd ) TaiPrd &times; 10 9
Iii. work as TxCapCnt<TaiPos, and (TaiPos-TxCapCnt)>=2 31
TxTsTaiSec = TaiSoc + ceil ( 2 32 + TxCapCnt - TaiPos TaiPrd )
TxTsTaiN sec = mod ( 2 32 + TxCapCnt - TaiPos TaiPrd ) TaiPrd &times; 10 9
Iv. work as TxCapCnt<TaiPos, and (TaiPos-TxCapCnt) <2 31
TxTsTaiSec = TaiSoc - floor ( TaiPos - TxCapCnt TaiPrd )
TxTsTaiN sec = [ 1 - mod ( TaiPos - TxCapCnt TaiPrd ) TaiPrd ] &times; 10 9
In the formula of above-mentioned i~iv:
A) TxCapCnt is the count value of the TX_EN signal rising edge that in timer 0, trapping module obtains;
B) TaiSoc is the current whole second value of the TAI time of maintenance in described CPU;
C) TaiPos is the described TaiSoc moment, the count value of timer 0 counter;
D) TaiPrd is whole second timer 0 rolling counters forward increment corresponding to cycle of TAI;
E) TxTsTaiSec is the whole second part that is drawn the TAI time by TxCapCnt conversion, and unit is second;
F) TxTsTaiNsec is the second following part that is drawn the TAI time by TxCapCnt conversion, and unit is nanosecond;
G) floor () is the function that rounds up, and ceil () is downward bracket function, and mod () is remainder function.
11, to the transmission markers calculating in step 10, according to the requirement of IEEE-1588, side-play amount is compensated.As shown in Figure 1, what the transmission markers (TxPreTs) that obtains in step 4 was corresponding is the time of reception of the original position of Ethernet message Preamble code, but the time target position defining in IEEE-1588 agreement (Message ' s Timestamp Point) be the end position of Preamble code, therefore actual transmission markers (TxTs) need to be in the value Last Offset amount of described TxPreTs, described side-play amount is the required time of the transmission of Preamble code on MII interface, is specially for 480 nanoseconds.
12,, on the basis of step 11, the data in integrating step 6, can calculate the actual time delay TxDlyTs:TxPreTs – TxThsTs that message sends.This value can be used for follow-up transmission processing after upgrading.
The present patent application people has done detailed explanation and description in conjunction with Figure of description to embodiments of the invention; but those skilled in the art should understand that; above embodiment is only the preferred embodiments of the invention; detailed explanation is just in order to help reader to understand better spirit of the present invention; and be not limiting the scope of the invention; on the contrary, within any any improvement of doing based on invention spirit of the present invention or modification all should drop on protection scope of the present invention.

Claims (3)

1. calibration method when the general purpose timer based on CPU is realized in IEEE-1588 high accuracy, it is characterized in that: described method is by the signal capture function in the general purpose timer of use CPU, catch the variation of the coherent signal of Ethernet data sending and receiving, obtain the sending and receiving markers of high-precision Ethernet message.
2. calibration method while realizing in IEEE-1588 agreement high accuracy based on CPU general purpose timer according to claim 1, is characterized in that, IEEE-1588 to time while adopting two-step method application, said method comprising the steps of:
(1) ethernet PHY chip is connected with cpu chip by MII interface, and the transmission enable signal (TX_EN) in MII interface and reception data are effectively indicated to (RX_DV) signal, the input signal that is connected to the general purpose timer of CPU is caught on pin;
(2) use the general purpose timer of CPU, safeguard the time shaft of a TAI, each count value of general purpose timer is corresponding one by one with the time of TAI;
(3) enable signal TX_EN and reception data effectively indicate the rising edge moment of RX_DV signal to be the sending and receiving moment of Ethernet message, by using the capturing function of general purpose timer, obtain the count value of the general purpose timer of described transmission or the time of reception;
(4) count value of the general purpose timer of the CPU corresponding the Ethernet message sending and receiving moment is converted to TAI time value, can obtains sending markers and receive markers.
(5) in step (4), obtain and send markers and receive markers, need to side-play amount, compensate according to the requirement of IEEE-1588.
3. calibration method while realizing in IEEE-1588 agreement high accuracy based on CPU general purpose timer according to claim 1, is characterized in that, described IEEE-1588 to time while adopting one-step method application, said method comprising the steps of:
(1) ethernet PHY chip is connected with cpu chip by MII interface, and the transmission enable signal (TX_EN) in MII interface and reception data are effectively indicated to (RX_DV) signal, be connected on the input capture pin of general purpose timer of CPU;
(2) use the general purpose timer of CPU, safeguard the time shaft of a TAI, each count value of timer is corresponding one by one with the time of TAI;
(3) receive data and effectively indicate the rising edge moment of RX_DV signal to be time of reception of Ethernet message, by using the capturing function of general purpose timer, obtain the count value of the general purpose timer of message time of reception;
(4) count value of the general purpose timer corresponding Ethernet message time of reception is converted to TAI time value, obtains receiving markers;
(5) in step (4), obtain reception markers, need to side-play amount, compensate according to the requirement of IEEE-1588;
(6) when sending message, first open an Interruption, after time delay a period of time, trigger and interrupt, accurately calculate the triggering moment of described interruption, and the triggering moment of described interruption is added after forward delay interval, convert to and send markers and insert and wait the civilian respective field of transmitting messages; The initial value of forward delay interval is 0;
(7) on the basis of step (6), literary composition to be transmitted messages is write to transmission buffer memory, but do not enable message, send the triggering of interrupting described in waiting step (6);
(8), after described down trigger, enable immediately message and send;
(9) the rising edge moment of enable signal TX_EN is the delivery time of Ethernet message, by using the capturing function of general purpose timer, obtains the count value of the general purpose timer of the actual delivery time of message;
(10) scale value while the count value of the general purpose timer corresponding actual delivery time of described Ethernet message being converted to actual transmission;
(11) in step (10), obtain transmission markers, need to side-play amount, compensate according to the requirement of IEEE-1588.
(12) calculate in step (6) the down trigger moment to the delay time of the actual transmission of message, and using described delay time as step forward delay interval after (6) middle real-time update.
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CN110138486A (en) * 2018-02-02 2019-08-16 中兴通讯股份有限公司 Generation method, synchronizer and the computer readable storage medium of sync message
CN111800213A (en) * 2020-06-19 2020-10-20 西安电子科技大学 High-speed TTE (time to live) cascade network 1588 synchronization method, system and device
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CN101977104B (en) * 2010-11-13 2013-01-09 上海交通大学 IEEE1588 based accurate clock synchronization protocol system and synchronization method thereof
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CN110138486A (en) * 2018-02-02 2019-08-16 中兴通讯股份有限公司 Generation method, synchronizer and the computer readable storage medium of sync message
CN111800213A (en) * 2020-06-19 2020-10-20 西安电子科技大学 High-speed TTE (time to live) cascade network 1588 synchronization method, system and device
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