CN103746789B - Method for realizing high-precision time scales in IEEE-1588 protocol based on CPU universal timer - Google Patents
Method for realizing high-precision time scales in IEEE-1588 protocol based on CPU universal timer Download PDFInfo
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Abstract
The invention discloses a method for realizing high-precision time scales in an IEEE-1588 protocol based on a CPU universal timer. According to the method, high-precision Ethernet packet receiving and transmitting time scales can be acquired by making use of the signal capture function of a universal timer of a CPU, capturing the change of relevant signals of Ethernet data receiving and transmitting, and adopting corresponding software to carry out processing. The method can support a two-step method and a two-step method in the IEEE-1588 protocol and is especially applicable to a hardware platform not providing support for IEEE-1588 in the aspect of hardware so as to achieve a high-precision IEEE-1588 time checking function.
Description
Technical field
The invention belongs to the time synchronized in power system power electronics and relay protection field, more particularly to the field
Technology, realizes calibration method during high accuracy in IEEE-1588 agreements especially with general purpose timer.
Background technology
When IEEE-1588 pair, technology is a kind of precision clock simultaneous techniquess based on principle during table tennis pair, and it adopts short frame
Transmission, algorithm are simple, and the requirement to calculating performance and the network bandwidth is all relatively low, it is adaptable to as the process layer in intelligent substation this
Class supports the distributed network communication system of multicast message.
At present, IEEE-1588 pair when application of the technology in power system, mainly also focus on the mistake in intelligent substation
Journey layer, with meet precision needed for the process layer better than 1us pair when.
Precision when IEEE-1588 pair, target precision when depending on ether network packet sending and receiving, which is in use, there is a step
Method and two-step method two ways, when two ways major difference is that the transmission to transmission message, target is processed：
I., during two-step method application, the transmission markers of the message can be encapsulated after IEEE-1588 messages have been sent by device
Sent in an ether network packet again.
Ii., during one-step method application, device when IEEE-1588 messages are sent, filled out by needs by the transmission markers of the message
Enter in the message.
Described markers, refers to transmitting-receiving moment corresponding TAI (world's atomic time) time of IEEE-1588 messages.At present,
Obtaining IEEE-1588 mainly has two kinds using target mode during required high accuracy：One is using IEEE-1588 special Ethernet
PHY chip is obtaining；Two is the CPU that IEEE-1588 functions are integrated with using ethernet mac.The versatility of described two modes
All poor, hardware cost is higher, and the latter cannot also realize the one-step method function in IEEE-1588.
The content of the invention
For solve existing IEEE-1588 pair when apply obtain high accuracy when timestamp present in：Poor universality, hardware
High cost, the problems such as support limited to one-step method function, this application discloses one kind based on CPU general purpose timers realizing
Calibration method during high accuracy in IEEE-1588 agreements.
The application is specifically employed the following technical solutions.
A kind of general purpose timer based on CPU is realizing calibration method during high accuracy in IEEE-1588, it is characterised in that：
Methods described captures the coherent signal of Ethernet data sending and receiving by using the signal capture function in the general purpose timer of CPU
Change, obtain the sending and receiving markers of high-precision ether network packet.
One kind realizes calibration method during high accuracy in IEEE-1588 agreements based on CPU general purpose timers, and its feature exists
In, when IEEE-1588 pair adopt two-step method application when, the method comprising the steps of：
(1) ethernet PHY chip is connected with cpu chip by MII interfaces, and the transmission in MII interfaces is enabled
Signal (TX_EN) and receiving data effectively indicate (RX_DV) signal, are connected to the input signal capture duct of the general purpose timer of CPU
On foot；
(2) using the general purpose timer of CPU, the time shafts of a TAI are safeguarded, each by general purpose timer is counted
Value is all corresponded with the time of TAI；
(3) enable signal TX_EN and receiving data effectively indicates that the rising edge time of RX_DV signals is ether network packet
The counting for sending and receiving the moment, by using the capturing function of general purpose timer, obtaining the general purpose timer at the moment
Value；
(4) when to send and receive
Between be worth, you can obtain send markers and receive markers.
(5) obtain in step (4) and send markers and receive markers, side-play amount need to be carried out according to the requirement of IEEE-1588
Compensation.
When adopting one-step method application when described IEEE-1588 pair, the method comprising the steps of：
(1) ethernet PHY chip is connected with cpu chip by MII interfaces, and the transmission in MII interfaces is enabled
Signal (TX_EN) and receiving data effectively indicate (RX_DV) signal, on the input capture pin of the general purpose timer for being connected to CPU；
(2) using the general purpose timer of CPU, the time shafts of a TAI are safeguarded, by each count value of intervalometer
Correspond with the time of TAI；
(3) receiving data effectively indicates that the rising edge time of RX_DV signals is the time of reception of ether network packet, passes through
Using the capturing function of general purpose timer, the count value of the general purpose timer of the message time of reception is obtained；
(4) count value of the ether network packet time of reception corresponding general purpose timer is converted to into TAI time values, that is, is obtained
Receive markers；
(5) obtain in step (4) and receive markers, side-play amount need to be compensated according to the requirement of IEEE-1588.
(6) when message is sent, an Interruption is first opened, triggering is interrupted afterwards for a period of time for time delay, accurately need to calculate
The triggering moment of the interruption, and the triggering moment of the interruption is treated plus after forward delay interval, being converted into sending markers inserting
Transmit messages text respective field；The initial value of forward delay interval is 0；
(7) on the basis of step (6), message pending write is sent into caching, but does not enable message transmission, waiting step
(6) triggering interrupted described in.
(8) after the down trigger, message is enabled immediately and is sent；
(9) rising edge time for enabling signal TX_EN is the delivery time of ether network packet, by using general timing
The capturing function of device, that is, obtain the count value of the general purpose timer of the actual delivery time of message；
(10) count value of the ether network packet actual delivery time corresponding general purpose timer is converted to actual
Send time stamp value；
(11) obtain in step (10) and send markers, side-play amount need to be compensated according to the requirement of IEEE-1588.
(12) calculate the delay time at down trigger moment to the actual transmission of message in step (6), and by the time delay
Time is used as forward delay interval after real-time update in step (6).
The application has following technique effect：
1. timestamp when IEEE-1588 messages are received is being obtained, it is no longer necessary to CPU or ethernet PHY integrated chip IEEE-
1588 functions；
2. obtain IEEE-1588 two-step method messages transmission when timestamp, it is no longer necessary to CPU or ethernet PHY chip
Integrated IEEE-1588 functions；
3. obtain IEEE-1588 one-step method messages transmission when timestamp, it is no longer necessary to ethernet PHY integrated chip
IEEE-1588 functions.
Description of the drawings
During Fig. 1 is the inventive method, the reception of involved MII interfaces and transmission timing figure；
During Fig. 2 is the inventive method, timestamp during high accuracy in IEEE-1588 is realized using the general purpose timer of CPU,
The structured flowchart of the minimum system that CPU is constituted with peripheral hardware；
During Fig. 3 is the inventive method, one kind is realized in IEEE-1588 agreements based on CPU general purpose timers in one-step method
High accuracy when calibration method when flow chart.
Specific embodiment
Being described in further detail in reference to technical method of the Figure of description to the present invention.
At present, it is in 32 bit CPUs of main flow, the such as chip such as ARM, PowerPC, integrated to have suffered powerful general timing
Device, these intervalometers are provided basic timing, on the basis of timing function, can provide input signal and catch by count value
Obtain, the function such as output signal compares (match).The input signal capturing function, refers to that the general purpose timer can be recognized defeated
Enter the change of signal, and latch the count value of the intervalometer at the signal intensity moment.In addition, described general purpose timer,
Can provide type abundant interrupt function, such as Interruption, signal capture, output matching etc. interrupts.By general purpose timer
Capturing function, with reference to the signal intensity of Ethernet, a kind of universal method can be designed indirectly come realize in IEEE-1588 when
Mark function.
At present, the ethernet mac (MAC controller) of 32 bit CPUs of main flow mostly provides MII interfaces, for with
Too net PHY chip is connected.One complete MII interface has 16 holding wires, specifically includes TX_ER, TXD [0:3]、TX_
EN、TX_CLK、COL、RXD[0:3], the signal such as RX_EX, RX_CLK, CRS, RX_DV.When which receives and sends, RX_DV and TX_
EN signals are as shown in Figure 1 with the sequential of other signals.
The inventive method, it is adaptable to 32 common bit CPUs of market and ethernet PHY chip.Any support MII interfaces with
Too net PHY chip is suitable for, and the cpu chip of any support MII interfaces integrated 32 general purpose timers is suitable for.Here with
As a example by the ARM Cortex-M3 chip LPC1788 and TI companies DP83848 ethernet PHYs of NXP companies, to be specifically illustrated.
IEEE-1588 agreements in use, have one-step method and two-step method point, the inventive method is suitable for, but realizes
Step is different, wherein two-step method when realize that step is as follows：
1st, LPC1788 and DP83848 chips are attached as shown in Figure 2：
The signal demand of i.DP83848 chip MII interfaces presses the mark of MII interfaces with the signal of LPC1788 chip MII interfaces
Alignment request is connecting.
Ii. the TX_EN signals in the MII interface signals also need to be connected to LPC1788 0 module of intervalometer it is corresponding
CAP0.0 capture pins (capture passage 0).
Iii. the RX_DV signals in the MII interface signals also need to be connected to LPC1788 intervalometer 0 it is corresponding
CAP0.1 capture pins (capture passage 1).
2nd, it is using the intervalometer 0 of LPC1788 safeguarding the time shafts of a TAI, specific as follows：
I. the intervalometer 0 of the LPC1788 is driven using CPU internal bus clocks, clock frequency can on demand 10～
50Mhz is optional.Intervalometer 0 does not enable the pre-divider of inside, is operated in Timer modes.
Ii. whole moment second (TaiSoc) of certain TAI time in the LPC1788, is chosen, the moment is recorded
The value of the nonce counter (T0TC depositors) of LPC1788 intervalometers 0, the Counter Value are the TaiSoc moment, right
Should be at the position on the enumerator of intervalometer 0 (TaiPos).
Iii. the input clock frequency fTMR Hz for using according to the LPC1788 intervalometers 0, calculate the TAI whole cycles pair second
0 counter incrementing of the intervalometer (TaiPrd) answered：TaiPrd=fTMR.
Iv. the LPC1788 inquires about the currency (GtmCnt) of a T0TC depositor every 500ms, when described
It is when GtmCnt and TaiPos values are more than TaiPrd, i.e., cumulative to TaiSoc values, and while by the value of TaiPos plus TaiPrd, tire out
Plus number of times is depending on GtmCnt with TaiPos size of the difference, need to finally ensure that difference is less than TaiPrd.If the TaiPos values exist
Overflow when cumulative, intercept low 32 reservations.
V. on the basis of step i, ii, iii, repeat step iv, you can realize the maintenance of TAI time shafts.
3rd, obtain ether network packet and send and receive the moment, the count value of corresponding general purpose timer is comprised the following steps that：
I. T0IR, T0CCR depositor in the LPC1788 is configured, CAP0.0 and CAP0.1 is set to capture signal
Rising edge, that is, capture TX_EN and RX_DV signals rising edge.
Ii. enable and the ethernet data acceptance of the LPC1788 and be sent completely interruptions, often receive one it is effective with
After too net wraps or complete the transmission of an Ethernet bag, interruption can be all triggered.
Iii. in the T0CR0 depositors for receiving and intervalometer 0 being read in interruption, to obtain the capture of CAP0.0 pins
Value, to determine the count value (RxCapCnt) of the intervalometer 0 of RX_DV rising edge times；It is sent completely in interruption described, reads
The T0CR1 depositors of intervalometer 0, to obtain the capture value of CAP0.1 pins, to determine the intervalometer 0 of TX_EN rising edge times
Count value (TxCapCnt).
The 4th, the ether network packet obtained in step 3 is sent and received the count value of moment corresponding general purpose timer
(TxCapCnt and RxCapCnt) is converted to transmission markers (TxPreTs) and receives markers (RxPreTs).By the count value
(TxCapCnt and RxCapCnt) substitutes into the CapCnt in following formula, and the TsTaiSec and TsTaiNsec for calculating is institute
State second and the nsec portion for sending markers (TxPreTs) and receiving markers (RxPreTs)：
I. as CapCnt >=TaiPos, and (CapCnt-TaiPos) >=231
Ii. as CapCnt >=TaiPos, and (CapCnt-TaiPos)<231
Iii. work as CapCnt<TaiPos, and (TaiPos-CapCnt) >=231
Iv. work as CapCnt<TaiPos, and (TaiPos-CapCnt)<231
In the formula of above-mentioned i～iv：
A) CapCnt is the count value of trapping module acquisition in intervalometer 0；
B) TaiSoc is the current whole seconds value of the TAI times safeguarded in the CPU；
C) TaiPos be the TaiSoc moment, the count value of 0 enumerator of intervalometer；
D) TaiPrd is TAI whole cycles second corresponding 0 rolling counters forward increment of intervalometer；
E) TsTaiSec is the whole second part that the TAI times are drawn by CapCnt conversions, and unit is the second；
F) TsTaiNsec is to draw below the second of TAI times part by CapCnt conversions, and unit is nanosecond；
G) floor () is the function that rounds up, and ceil () is downward bracket function, and mod () is remainder function.
5th, to the reception markers that calculates in step 4 and markers is sent, side-play amount is carried out according to the requirement of IEEE-1588
Compensation.As shown in figure 1, the reception markers (RxPreTs) obtained in step 4 and send markers (TxPreTs) it is corresponding be ether
The reception of the original position of network packet Preamble codes and delivery time, but the when target position defined in IEEE-1588 agreements
Put the end position that (Message ' s Timestamp Point) is Preamble codes, therefore the reception markers (RxTs) of reality
With send the value Last Offset amount that markers (TxTs) needs in the RxPreTs and TxPreTs, the side-play amount is
Preamble codes are in the time needed for the transmission on MII interfaces, specially 480 nanoseconds.
Step is as follows for realizing during IEEE-1588 one-step method, and which realizes that flow process is as follows：
1st, LPC1788 and DP83848 chips are attached as shown in Figure 2：
The signal demand of i.DP83848 chip MII interfaces presses the mark of MII interfaces with the signal of LPC1788 chip MII interfaces
Alignment request is connecting.
Ii. the TX_EN signals in the MII interface signals also need to be connected to LPC1788 0 module of intervalometer it is corresponding
CAP0.0 capture pins (capture passage 0).
Iii. the RX_DV signals in the MII interface signals also need to be connected to LPC1788 intervalometer 0 it is corresponding
CAP0.1 capture pins (capture passage 1).
2nd, it is using the intervalometer 0 of LPC1788 safeguarding the time shafts of a TAI, specific as follows：
I. the intervalometer 0 of the LPC1788 is driven using CPU internal bus clocks, clock frequency can on demand 10～
50Mhz is optional.Intervalometer 0 does not enable the pre-divider of inside, is operated in Timer modes.
Ii. whole moment second (TaiSoc) of certain TAI time in the LPC1788, is chosen, the moment is recorded
The value of the nonce counter (T0TC depositors) of LPC1788 intervalometers 0, the Counter Value are the TaiSoc moment, right
Should be at the position on the enumerator of intervalometer 0 (TaiPos).
Iii. the input clock frequency fTMR Hz for using according to the LPC1788 intervalometers 0, calculate the TAI whole cycles pair second
0 counter incrementing of the intervalometer (TaiPrd) answered：TaiPrd=fTMR.
Iv. the LPC1788 inquires about the currency (GtmCnt) of a T0TC depositor every 500ms, when described
It is when GtmCnt and TaiPos values are more than TaiPrd, i.e., cumulative to TaiSoc values, and while by the value of TaiPos plus TaiPrd, tire out
Plus number of times is depending on GtmCnt with TaiPos size of the difference, need to finally ensure that difference is less than TaiPrd.If the TaiPos values exist
Overflow when cumulative, intercept low 32 reservations.
V. on the basis of step i, ii, iii, repeat step iv, you can realize the maintenance of TAI time shafts.
3rd, the ether network packet time of reception is obtained, the count value of corresponding general purpose timer is comprised the following steps that：
I. T0IR, T0CCR depositor in the LPC1788 is configured, CAP0.0 and CAP0.1 is set to capture signal
Rising edge, that is, capture TX_EN and RX_DV signals rising edge.
Ii. enable and the ethernet data acceptance of the LPC1788 and be sent completely interruptions, often receive one it is effective with
After too net wraps or complete the transmission of an Ethernet bag, interruption can be all triggered.
Iii. in the T0CR0 depositors for receiving and intervalometer 0 being read in interruption, to obtain the capture of CAP0.0 pins
Value, to determine the count value (RxCapCnt) of the intervalometer 0 of RX_DV rising edge times.
4th, by the count value (RxCapCnt) of the ether network packet time of reception corresponding general purpose timer obtained in step 3
Be converted to reception markers (RxPreTs).The transformation process adopt following formula i～iv, the RxTsTaiSec for calculating and
RxTsTaiNsec is the second for receiving markers (RxPreTs) and nsec portion：
I. as RxCapCnt >=TaiPos, and (RxCapCnt-TaiPos) >=231
Ii. as RxCapCnt >=TaiPos, and (RxCapCnt-TaiPos)<231
Iii. work as RxCapCnt<TaiPos, and (TaiPos-RxCapCnt) >=231
Iv. work as RxCapCnt<TaiPos, and (TaiPos-RxCapCnt)<231
In the formula of above-mentioned i～iv：
A) RxCapCnt is the count value of the RX_DV signal rising edges of trapping module acquisition in intervalometer 0；
B) TaiSoc is the current whole seconds value of the TAI times safeguarded in the CPU；
C) TaiPos be the TaiSoc moment, the count value of 0 enumerator of intervalometer；
D) TaiPrd is TAI whole cycles second corresponding 0 rolling counters forward increment of intervalometer；
E) RxTsTaiSec is the whole second part that the TAI times are drawn by RxCapCnt conversions, and unit is the second；
F) RxTsTaiNsec is to draw below the second of TAI times part by RxCapCnt conversions, and unit is nanosecond；
G) floor () is the function that rounds up, and ceil () is downward bracket function, and mod () is remainder function.
5th, to the reception markers calculated in step 4, side-play amount is compensated according to the requirement of IEEE-1588.Such as Fig. 1
Shown, it is that the original position of ether network packet Preamble codes connects that the reception markers (RxPreTs) that obtains in step 4 is corresponding
Time receiving carve, but defined in IEEE-1588 agreements when target position (Message ' s Timestamp Point) be
The end position of Preamble codes, therefore the reception markers (RxTs) of reality needs the value Last Offset in the RxPreTs
Amount, time of the side-play amount for needed for Preamble codes are in the transmission on MII interfaces, specially 480 nanoseconds.
6th, when needing to send IEEE-1588 messages, the following steps need to be first sequentially completed with reference to Fig. 3 rapid：
I. the T0TC depositors of the LPC1788 intervalometers 0 are read, to obtain the count value of current intervalometer 0
(CurCnt)。
Ii. the T0MCR depositors of intervalometer 0 are configured, to enable the interruption of matching passage 0.And the value of T0MR0 is set to
CurCnt+DlyCnt, that is, the matching that intervalometer 0 is triggered after setting the time delay DlyCnt/TaiPrd seconds interrupt, and the TaiPrd is
TAI whole cycles second corresponding 0 counter incrementing of intervalometer.The value of DlyCnt values need to ensure it is described matching interrupt occur before, institute
The operation that LPC1788 should complete subsequent step 7 is stated, here sets delay duration as 20 milliseconds.
Iii. the value of the CurCnt+DlyCnt is substituted into into the conversion formula in step 4, you can target reason when obtaining sending
By value (TxThsTs).By the TxThsTs plus actual forward delay interval (TxDlyTs), you can obtain actual transmission markers
(TxActTs).The value of the TxDlyTs can be by subsequent step 8～12 come real-time update, and its initial value is 0.
After the 7th, TxActTs values described in step 6 to be inserted the respective field of IEEE-1588 messages, the message is inserted
Ethernet sends caching, wouldn't enable transmission, the arrival interrupted described in the i-th i steps in waiting step 6.
8th, after matching 0 down trigger of passage of the intervalometer 0 of the LPC1788, even if neutral in interrupt service routine
Energy ether network packet sends, to start sending function.
9th, on the basis of step 8, the triggering for waiting the transmission of ether network packet to interrupt.After the down trigger, read
The T0CR1 depositors of the LPC1788 intervalometers 0 are taken, to obtain the capture value of CAP0.1 pins, to determine TX_EN rising edges
The count value (TxCapCnt) of the intervalometer 0 at moment.
10th, by the count value of the corresponding general purpose timer of ether network packet delivery time obtained in step 9
(TxCapCnt) be converted to transmission markers (TxPreTs).The transformation process adopts following formula i～iv, calculates
TxTsTaiSec and TxTsTaiNsec is the second for sending markers (TxPreTs) and nsec portion：
I. as TxCapCnt >=TaiPos, and (TxCapCnt-TaiPos) >=231
Ii. as TxCapCnt >=TaiPos, and (TxCapCnt-TaiPos)<231
Iii. work as TxCapCnt<TaiPos, and (TaiPos-TxCapCnt) >=231
Iv. work as TxCapCnt<TaiPos, and (TaiPos-TxCapCnt)<231
In the formula of above-mentioned i～iv：
A) TxCapCnt is the count value of the TX_EN signal rising edges of trapping module acquisition in intervalometer 0；
B) TaiSoc is the current whole seconds value of the TAI times safeguarded in the CPU；
C) TaiPos be the TaiSoc moment, the count value of 0 enumerator of intervalometer；
D) TaiPrd is TAI whole cycles second corresponding 0 rolling counters forward increment of intervalometer；
E) TxTsTaiSec is the whole second part that the TAI times are drawn by TxCapCnt conversions, and unit is the second；
F) TxTsTaiNsec is to draw below the second of TAI times part by TxCapCnt conversions, and unit is nanosecond；
G) floor () is the function that rounds up, and ceil () is downward bracket function, and mod () is remainder function.
11st, to the transmission markers calculated in step 10, side-play amount is compensated according to the requirement of IEEE-1588.Such as
Shown in Fig. 1, it is the original position of ether network packet Preamble codes that the transmission markers (TxPreTs) that obtains in step 4 is corresponding
The time of reception, but defined in IEEE-1588 agreements when target position (Message ' s Timestamp Point) be
The end position of Preamble codes, therefore the transmission markers (TxTs) of reality needs the value Last Offset in the TxPreTs
Amount, time of the side-play amount for needed for Preamble codes are in the transmission on MII interfaces, specially 480 nanoseconds.
12nd, on the basis of step 11, with reference to the data in step 6, the actual time delay of outgoing packet transmission can be calculated
TxDlyTs：TxPreTs-TxThsTs.After the value updates, can be used for follow-up transmission processe.
Present invention applicant describes in detail to embodiments of the invention with reference to Figure of description and describes, but this
It should be understood that above example is only the preferred embodiments of the invention, explanation in detail is intended merely to side to art personnel
Reader is helped to more fully understand of the invention spiritual, and not limiting the scope of the invention, conversely, any based on the present invention's
Any improvement or modification made by spirit should all fall within the scope and spirit of the invention.
Claims (2)
1. realizing calibration method during high accuracy in IEEE-1588, methods described is by making for a kind of general purpose timer based on CPU
With the signal capture function in the general purpose timer of CPU, the change of the coherent signal of Ethernet data sending and receiving is captured, obtain high
The sending and receiving markers of the ether network packet of precision；Characterized in that, using during two-step method application when IEEE-1588 pair, methods described
Comprise the following steps：
(1) ethernet PHY chip is connected with cpu chip by MII interfaces, and the transmission in MII interfaces is enabled into signal
TX_EN and receiving data effectively indicate RX_DV signals, on the input signal capture pin of the general purpose timer for being connected to CPU；
(2) time shafts of a world atomic time TAI using the general purpose timer of CPU, are safeguarded, by each of general purpose timer
Individual count value is all corresponded with the time of world atomic time TAI；
(3) enable signal TX_EN and receiving data effectively indicates that the rising edge time of RX_DV signals is sending out for ether network packet
Send and the time of reception, by using the capturing function of general purpose timer, obtain the transmission or the general purpose timer of the time of reception
Count value；
(4) count value that ether network packet is sent and received the general purpose timer of moment corresponding CPU is converted to the TAI times
Value, you can obtain sending markers and receive markers；
(5) obtain in step (4) and send markers and receive markers, side-play amount need to be compensated according to the requirement of IEEE-1588.
2. realizing calibration method during high accuracy in IEEE-1588, methods described is by making for a kind of general purpose timer based on CPU
With the signal capture function in the general purpose timer of CPU, the change of the coherent signal of Ethernet data sending and receiving is captured, obtain high
The sending and receiving markers of the ether network packet of precision；Characterized in that, using during one-step method application when described IEEE-1588 pair, it is described
Method is comprised the following steps：
(1) ethernet PHY chip is connected with cpu chip by MII interfaces, and the transmission in MII interfaces is enabled into signal
TX_EN and receiving data effectively indicate RX_DV signals, on the input capture pin of the general purpose timer for being connected to CPU；
(2) time shafts of a world atomic time TAI using the general purpose timer of CPU, are safeguarded, each by intervalometer is counted
Numerical value is all corresponded with the time of world atomic time TAI；
(3) receiving data effectively indicates that the rising edge time of RX_DV signals is the time of reception of ether network packet, by using
The capturing function of general purpose timer, obtains the count value of the general purpose timer of the message time of reception；
(4) count value of the ether network packet time of reception corresponding general purpose timer is converted to into TAI time values, that is, is received
Markers；
(5) obtain in step (4) and receive markers, side-play amount need to be compensated according to the requirement of IEEE-1588；
(6) send message when, first open an Interruption, time delay for a period of time afterwards triggering interrupt, accurately calculate it is described in
Disconnected triggering moment, and the triggering moment of the interruption is inserted into message pending plus transmission markers after forward delay interval, is converted into
Respective field；The initial value of forward delay interval is 0；
(7) on the basis of step (6), message pending write is sent into caching, but does not enable message transmission, waiting step (6)
Described in the triggering interrupted；
(8) after the down trigger, message is enabled immediately and is sent；
(9) rising edge time for enabling signal TX_EN is the delivery time of ether network packet, by using general purpose timer
Capturing function, that is, obtain the count value of the general purpose timer of the actual delivery time of message；
(10) count value of the ether network packet actual delivery time corresponding general purpose timer is converted to into actual transmission
Time stamp value；
(11) obtain in step (10) and send markers, side-play amount need to be compensated according to the requirement of IEEE-1588；
(12) calculate the delay time at down trigger moment to the actual transmission of message in step (6), and by the delay time
As forward delay interval after real-time update in step (6).
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