WO2014205936A1

WO2014205936A1 - Sampling and control method based on point-to-point message synchronization

Info

Publication number: WO2014205936A1
Application number: PCT/CN2013/084177
Authority: WO
Inventors: 郑玉平; 周华良; 杨志宏; 石磊; 王小红; 胡钰林; 姜雷; 谢黎; 赵马泉
Original assignee: 国电南瑞科技股份有限公司
Priority date: 2013-06-27
Filing date: 2013-09-25
Publication date: 2014-12-31
Also published as: CN103369036A

Abstract

Disclosed is a sampling and control method based on point-to-point message synchronization, which realizes the punctual sending, receiving locking, time delay calculation, and timing trigger functions of synchronized messages by using FPGA technology, timing interaction is performed on information between a distributed main control unit and subunits by means of point-to-point message transmission, and a sampling and control logic is triggered by each subunit using a synchronized pulse signal parsed by FPGA. In this way, the sampling and control function of message-level synchronization based on a point-to-point method is realized between the main control unit and each subunit in a distributed sampling control system. This method enables a simplified distributed system or device to be realized, the reliability to be enhanced, the manufacturing cost of the system to be reduced, and the maintainability of the system to be optimized.

Description

Sampling and control method based on point-to-point message synchronization

The present invention relates to a typical application of a distributed sampling and control based device or system related to power and industrial control, and more particularly to a sampling and control method based on peer-to-peer message homology, which belongs to the field of power electronics.

Background technique

In the application process of power system control protection and power electronic equipment, due to the geographical location of the related equipment installation or the limited design resource capacity of a single set of equipment, it is impossible to implement all sampling and control functions in a single device. Equipment or systems need to be designed to implement all of the overall functions based on a distributed sampling and control system, such as common wind power converter control systems, distributed power fault recorders, distributed electronic transformer collectors, etc. application. These devices require strict sampling and control, so the normal operation of the device requires coordinated control of the entire system based on the same controller's signals.

At present, most of the distributed sampling control systems designed by various equipment manufacturers use independent external control signals to achieve the same function, so as to achieve the same sampling and control functions (such as PPS, CNVT/INT). The signal is the same as the 歩), the control system realized in this way is very susceptible to the influence of external electromagnetic field interference, and it is easy to cause the same signal to be temporarily pulsed or even lost, so that the reliability of the system cannot be guaranteed; The drive control mode of the external peer signal, the amount of information carried by the signal link is less, which is more and more unfavorable for signal interaction between the distributed units. If it is necessary to increase the communication between the units, a dedicated communication channel needs to be added. Increased system cost and increased communication wiring during project implementation, which is not conducive to the integration of the entire system.

In view of the new situation of such distributed sampling control systems, the present invention proposes a basis for The sampling and control technology of peer-to-peer messages provides a new solution for the distributed sampling control system, which improves the reliability and flexibility of the system.

Summary of the invention

Purpose of the invention

The purpose of the invention is to realize the peer-to-peer technology based on the message mode by using the peer-to-peer transmission method for the specific coded communication message, and trigger the simultaneous sampling and the peer control by triggering the same pulse. The reliability of the distributed sampling control system is further improved, the information interaction between the distributed units is more flexible, and the complexity of the engineering field wiring is improved, the integration degree of the system and the maintainability of the operation are improved.

Technical solutions

In order to achieve the above object, the present invention provides the following technical solutions:

A sampling and control method based on peer-to-peer message homology, which is characterized in that the following steps are included: The main control unit sends the peer-to-peer message to each distributed sub-unit according to the set time through the FPGA chip, and each distribution The subunit unit locks the arrival edge of the received peer message through the FPGA chip and parses the peer message information, and triggers the peer signal according to the message delay and the peer delay. Focus on three aspects of design: point-to-point communication, message transmission mechanism, FPGA transmission control and receiving peer processing methods.

The main control unit and each subunit are point-to-point communication connections, and the transmission channels are shared, not in the form of network networking (such as Ethernet networking). The physical layer medium for point-to-point transmission is in the form of cable, or fiber-optic cable suitable for various wavelengths. Communication medium.

In the point-to-point communication, a one-to-one bidirectional link communication is between the main control unit and the subunit; for the main control unit, communication is performed by a pair of subunits, and the subunits are independent of each other. Each channel in the control unit is independent of each other. The transmission of the message follows a message transmission mechanism, and the data stream in the form of a message is transmitted on the two-way communication link, which is not a simple logic control signal, and the message exists in a certain coding form; the message transmission mechanism It includes the same frame, the same sampling frame or the same control frame, the data value frame, the protocol or protocol adopted by the communication frame adopts the common standard protocol, or adopts a self-defined protocol form, and the link layer coding mode of the message transmission is Manchester encoding, UART format, 4B5B, or 8B10B form.

FPGA sending control and receiving peer processing methods are: real-time transmission of peer-to-peer messages through FPGA; peer-to-peer message reception is to lock the time edge of the message frame header by FPGA high-speed clock sampling, and according to the given sum The calculated delay drives and triggers the sampling or control logic.

The FPGA sending control and receiving peer processing method is: the main control unit realizes the on-time transmission of the peer-to-peer messages for different objects through the FPGA; each distributed sub-unit detects the start frame header of the same-type message through the FPGA and receives the decoding. Related messages, triggering of the same edge of sampling or control through delay control, and each distributed sub-unit also realizes the reception fault tolerance of the same message through the FPGA.

The message type includes:

The same sampling message is used for the same sampling unit, and the transmission delay is reduced by using the reduced protocol; the sampled value message is used by the collecting unit to send back the collected analog group frame;

The peer control message is used for the same control unit and transmits related control information;

Control feedback message, used by the control unit to perform the feedback result and send it back to the frame.

Beneficial effect

1) Optimize the field network cabling of the distributed sampling control system by means of peer-to-peer message peer-to-peer, optimize system cost and increase integration;

2) Using FPGA technology to improve the performance parameters of the same, can reach below 1 μ s, with fault tolerance and anti-interference performance; 3) Message communication supports different coding forms, such as Manchester coding, 4B5B coding, etc.;

4) Support different transmission rates according to the requirements of different distributed control systems, such as 5Mbps, 10Mbps, 20Mbps or 100Mbps;

5) Communication transmission medium is suitable for two communication media: cable and optical cable;

6) FPGA co-processing mechanism realizes the concurrency calculation of distributed sampling control system with strong processing performance. The invention adopts the FPGA technology to realize the functions of punctual transmission, reception locking, delay calculation and timing triggering of the peer-to-peer message, and the information between the distributed main control unit and the sub-unit is periodically interacted through the point-to-point message transmission. Each sub-unit uses the same-pulse signal parsed by the FPGA to trigger the sampling and control logic, so that the main control unit and each sub-unit in the distributed sampling control system realize the sampling and sampling based on the peer-to-peer mode. Control function, which simplifies the implementation of distributed systems or devices, increases reliability, reduces system cost, and optimizes system maintainability.

DRAWINGS

Figure 1 is a timing logic diagram of the scheme;

Figure 2 is a block diagram of the main controller;

Figure 3 is a block diagram of the distributed acquisition end;

Figure 4 is a block diagram of the distributed control terminal;

Figure 5 is a block diagram of the overall principle.

detailed description

The invention will now be further described with reference to the accompanying drawings.

The main controller sends the peer message (the same sampling frame or the same control frame) to each distributed sub-unit through the FPGA chip, and each distributed sub-unit receives the same report through the FPGA. The text arrives at the time of the lock and parses the peer message information, triggers the peer message according to the message delay and the peer delay. If the distributed acquisition unit samples the framing according to the same 歩 signal, it sends the framing to the main controller, and the main controller parses the sampled message and sends it to the main operation processor for calculation. After the completion, the result is sent to the host at the set time. The control message is sent to each control sub-unit, and the control sub-unit triggers the control logic function according to the peer control message, and the control sub-unit returns the feedback result to the main controller in the form of a message after completing the peer execution. The same system sampling and control functions are realized. The message between the main controller and each distributed unit is differentiated by different message types. Its timing logic is shown in Figure 1.

The working principle of the invention is as follows -

1, the main controller terminal principle, as shown in Figure 2, including the main operation processor DSP and FPGA processor, through the FPGA to extend the multi-channel message transmission and reception channels; the main controller in accordance with the set delay in each control cycle The same sampling message is sent, and the corresponding processing is performed after the sampling value is received. After the processing is completed, the peer control message is sent according to the set delay, and the control feedback value message is waited for;

2, the principle of distributed acquisition terminal, as shown in Figure 3, consists of FPGA processor and ADC acquisition circuit; After receiving the same sampling message, the acquisition unit performs the same and delays triggering ADC sampling, and the framing after sampling is completed. And send the sampled value message; At the same time, the processing of the FPGA has certain fault-tolerant processing and anti-interference function for the same sampled message.

3, the principle of the distributed control terminal, as shown in Figure 4, consists of the FPGA processor and the peripheral drive control module, which mainly implements four parts in the FPGA, including the peer control message receiving and processing unit, the logic control unit, and the control back. Read unit, message sending unit. After receiving the peer message, the control unit performs the same function and delays the triggering of the logic control function. After the control is executed and the feedback is completed, the control group sends the feedback message. At the same time, the processing of the FPGA has certain certain control messages. Fault-tolerant processing and anti-jamming capabilities.

4, message design instructions:

The message type includes the same sampling message (for the same sampling unit, using the reduced protocol to reduce the transmission delay), the sampled value message (for the acquisition unit to collect the collected analog group frame), and the same control The message (for the same control unit and transmitting relevant control information), and the control feedback message (for the feedback result that the control unit will perform the framing and returning).

Figure 5 is a block diagram of the overall principle of sampling and control based on peer-to-peer message. This technology contains the contents of three types of distributed units, namely the main controller unit, the acquisition unit and the control unit.

The main controller unit is the main processing unit of the distributed system. It is responsible for the functions of all distributed sub-elements, processing and parsing various sub-units, real-time processing and calculation, control packet transmission, and number configuration. It is typically a processor-containing processing unit.

The acquisition unit 1 and 2 mainly implement independent data sampling and transmitting functions, which can be dual transmission and other functions, and can also realize parameter calibration optimization, etc., which are generally distributed in the vicinity of each collection amount, and are arranged nearby, and the 4 system design improves the anti-interference ability.

The control unit 1 and 2 mainly implement the control logic of each application requirement, and can implement parameter configuration, etc., for real-time control, feedback and related fault-tolerant processing of specific execution objects.

The above distributed unit (acquisition unit or control unit) for explaining the principle is not limited to the name, and may be a multi-functional distributed controller, which may be a control unit including a microprocessor such as a CPU or a DSP.

Claims

claims

1. A sampling and control method based on point-to-point message synchronization, which is characterized by including the following steps: The main control unit sends the synchronization message to each distributed sub-unit at a set time through the FPGA chip, and each distributed sub-unit The sub-unit locks the arrival time edge of the received synchronization message through the FPGA chip, analyzes the synchronization message information, and triggers the synchronization signal based on the message delay and synchronization delay.

2. The sampling and control method based on point-to-point message synchronization according to claim 1, characterized in that the main control unit and each sub-unit are point-to-point communication connections, the transmission channel is shared, and the physical layer medium of point-to-point transmission is a cable. form, or fiber optic cable communication media suitable for various wavelengths.

3. The sampling and control method based on point-to-point message synchronization according to claim 2, characterized in that in the point-to-point communication, there is a one-to-one bidirectional link communication between the main control unit and the sub-unit; for the main control For a unit, it is a communication between one pair of multiple sub-units, each sub-unit is independent of each other, and each channel in the main control unit is independent of each other.

4. The sampling and control method based on point-to-point message synchronization according to claim 1, characterized in that the transmission of the message follows the message transmission mechanism, and what is transmitted on the two-way communication link is a data stream in the form of a message. ; The message transmission mechanism includes synchronization frames, synchronization sampling frames or synchronization control frames, and data value frames. The protocols or protocols used in communication frames adopt common standard protocols or adopt self-defined protocols. Link layer coding of message transmission The mode is Manchester encoding, UART format, 4B5B, or 8B10B.

5. The sampling and control method based on point-to-point message synchronization according to claim 1, characterized in that the FPGA transmission control and reception synchronization processing method is: realizing real-time transmission of synchronization messages through FPGA; receiving synchronization messages It uses FPGA high-speed clock sampling to lock the arrival time edge of the message frame header, and drives and triggers the sampling or control logic according to the given and calculated delay.

6. The sampling and control method based on point-to-point message synchronization according to claim 1, characterized in that the FPGA transmission control and reception synchronization processing method is that the main control unit realizes on-time synchronization messages for each different object through the FPGA. Send; Each distributed sub-unit detects the starting frame header of the synchronization message through FPGA edge trigger, simultaneously each