CN103715323A - Luminescence apparatus - Google Patents

Luminescence apparatus Download PDF

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Publication number
CN103715323A
CN103715323A CN201210380575.1A CN201210380575A CN103715323A CN 103715323 A CN103715323 A CN 103715323A CN 201210380575 A CN201210380575 A CN 201210380575A CN 103715323 A CN103715323 A CN 103715323A
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CN
China
Prior art keywords
pattern
light
substrate
emitting device
luminous lamination
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Pending
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CN201210380575.1A
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Chinese (zh)
Inventor
杨於铮
林植南
吴荣宗
沈建赋
巫汉敏
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Epistar Corp
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Epistar Corp
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Priority to CN201210380575.1A priority Critical patent/CN103715323A/en
Publication of CN103715323A publication Critical patent/CN103715323A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22Roughened surfaces, e.g. at the interface between epitaxial layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075Processes for devices with an active region comprising only III-V compounds comprising nitride compounds

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

The invention discloses a luminescence apparatus. The luminescence apparatus comprises a substrate which is provided with a first side and a second side opposite to the first side, and a luminescence lamination layer which is formed on the first side and emits light with a dominant wavelength of lambda nm, wherein the substrate comprises a first surface disposed at the first side, the first surface comprises a first pattern arranged in a first period, the first pattern comprises a second pattern arranged in a second period, the first period is greater than 6 lambda nm, and the second period is smaller than lambda nm.

Description

Light-emitting device
Technical field
The present invention relates to a kind of light-emitting device, more specifically, relate to a kind of light-emitting device with the first pattern and the second pattern substrate.
Background technology
Light-emitting diode in solid-state light emitting element (Light Emitting Diode; LED) the good photoelectric characteristic such as coloured light that has low power consumption, lower calorific value, operation lifetime length, impact resistance, volume is little, reaction speed is fast and can sends wavelength stabilization, is therefore often applied to the fields such as the indicator light of household electrical appliances, instrument and photovoltaic.Yet light taking-up efficiency how to improve light-emitting diode is a very important subject under discussion in this field.
In addition, above light-emitting diode can form further combined with a carrier (sub-mount) light-emitting device, for example bulb.Described light-emitting device comprises an inferior carrier with at least one circuit; At least one scolder (solder) is positioned on above-mentioned carrier, by this scolder, above-mentioned light-emitting diode is fixed on time carrier and the substrate of light-emitting diode is electrically connected to the circuit formation on time carrier; And an electric connection structure, to be electrically connected to the electronic pads of light-emitting diode and the circuit on time carrier; Wherein, above-mentioned inferior carrier can be that lead frame (lead frame) or large scale are inlayed substrate (mounting substrate), to facilitate the circuit of light-emitting device to plan and to improve its radiating effect.
Summary of the invention
For addressing the above problem, the invention provides a light-emitting device, it comprises: a substrate, has one first side and with respect to one second side of the first side; And a luminous lamination, be formed in the first side, and send the light that a dominant wavelength is λ nanometer; Wherein, substrate comprises a first surface that is positioned at the first side, and first surface comprises first pattern of arranging with a period 1, and the first pattern comprises second pattern to arrange a second round; And the period 1 is greater than 6 λ nanometers, is less than λ nanometer second round.
Accompanying drawing explanation
Figure 1A is a cutaway view of a light-emitting device of first embodiment of the invention;
Figure 1B is the partial enlarged drawing of the substrate first surface of Figure 1A;
Fig. 2 A is a cutaway view of a light-emitting device of second embodiment of the invention;
Fig. 2 B is the partial enlarged drawing of the substrate first surface of Fig. 2 A;
Fig. 2 C is the partial enlarged drawing of the substrate first surface of Figure 1A;
Fig. 3 is a cutaway view of a light-emitting device of third embodiment of the invention;
Fig. 4 A is a cutaway view of a light-emitting device of fourth embodiment of the invention;
Fig. 4 B is the partial enlarged drawing of the substrate first surface of Fig. 4 A;
Fig. 5 A is a cutaway view of a light-emitting device of fifth embodiment of the invention;
Fig. 5 B is the enlarged drawing of the substrate first surface of Fig. 5 A;
The manufacture method cutaway view of the light-emitting device that Fig. 6 A-Fig. 6 G is second embodiment of the invention;
Another manufacture method cutaway view of the light-emitting device that Fig. 7 A-Fig. 7 I is second embodiment of the invention.
Main element symbol description
100,200,300,400,500: light-emitting device
10,10 ', 20,30,40: substrate
101,101 ', 201,301,401: first surface
102,102 ', 202,302,402: second surface
11,41: luminous lamination
110: the three surfaces
111,411: the first type semiconductor layer
112,412: active layer
113,413: Second-Type semiconductor layer
114: resilient coating
121,421: the first electrodes
122,422: the second electrodes
14,14 ', 24,34,44: the first patterns
141,141 ', 241,341: unit pattern
1411,1411 ', 1511,2611,3411,4411,4511: first end
1412,1412 ', 1512,2612,3412,4412,4512: the second ends
1413,1413 ', 2613,3413,4413: edge
15,25,35,45: the second patterns
150 ', 250,270,350: zone line
151: depressed part
18: metal level
181: nanometer bead
28: photoresist
281: patterning photoresist
282: metal level
283: patterned metal layer
351: jut
Embodiment
Following examples will be accompanied by accompanying drawing concept of the present invention will be described, in accompanying drawing or explanation, similar or identical part is used identical label, and in the accompanying drawings, the shape of element or thickness can expand or dwindle.Need pay special attention to, the element that does not illustrate in figure or describe, can be the form of haveing the knack of known to the personage of this skill.
Figure 1A and Figure 1B are the schematic diagram of a light-emitting device 100 of first embodiment of the invention.Light-emitting device 100 comprises a substrate 10; One luminous lamination 11 is formed on substrate 10; One electrode unit 12 is formed on luminous lamination 11.Substrate 10 has the second surface 102 that a first surface 101 and that is positioned at one first side is positioned at one second side.Luminous lamination 11 is formed on the first surface 101 of substrate 10 and has the 3rd surface 110 with respect to substrate 10, and sends the light that a dominant wavelength is λ nanometer.In addition the light that, luminous lamination 11 sends comprises one second light field that one first light field that passes from substrate 10 1 sides and self-electrode unit 12 1 sides pass.Wherein the luminous intensity of the first light field is greater than the luminous intensity of the second light field.Luminous lamination 11 comprises one first type semiconductor layer 111, an active layer 112 and a Second-Type semiconductor layer 113.Electrode unit 12 is positioned at the same side of luminous lamination 11 and is formed on the 3rd surface 110.Electrode unit 12 comprises one first electrode 121, is formed in the first type semiconductor layer 111; And one second electrode 122, be formed on Second-Type semiconductor layer 113.In one embodiment, can form a reflector (not shown) on the 3rd surface 110 to reflect light that luminous lamination 11 sent toward the second side of substrate 10 and to leave luminous lamination 11.
The first surface 101 of substrate 10 comprises first pattern 14 with period 1 arrangement.The first pattern 14 comprises a plurality of the first sides from substrate 10 toward the unit pattern 141 of the second side 10 depressions (toward substrate sunken inside) of substrate.The figure of analysing and observe of unit pattern 141 comprises at least one figure and is selected from the group that V-arrangement, semicircle, arc and polygon form.Figure 1B is the partial enlarged drawing of the first pattern 14 in Figure 1A.In the present embodiment, the cutaway view of unit pattern 141 is that the section of circular arc and each unit pattern 141 comprises a first end 1411, one second end 1412 and is connected in the edge 1413 between first end 1411 and the second end 1412.Unit pattern 141 is close-packed arrays each other, and the first end 1411 of unit pattern 141 is adjacent to each other with the second end 1412 of adjacent unit pattern 141.As shown in Figure 1B, the first pattern 14 comprises second pattern 15 with arrangement second round.The second pattern 15 comprises at least two adjacent depressed parts 151, and depressed part 151 is formed on unit pattern 141.In one embodiment, depressed part 151 is formed on each unit pattern 141, that is, on the edge 1413 of each unit pattern 141, all there is depressed part 151.Optionally, part unit pattern 141 has the second pattern 15, and 141 of part unit patterns do not have the second pattern 15.The depression direction of depressed part 151 is the direction from the first side of substrate 10 toward the second side (toward substrate sunken inside) roughly.The figure of analysing and observe of the depressed part 151 of the second pattern 15 comprises at least one figure and is selected from the group that V-arrangement, semicircle, arc and polygon form.In the present embodiment, the cutaway view of the second pattern 15 is also for the section of circular arc and each depressed part 151 comprises a first end 1511, one second end 1512, depressed part 151 is close-packed arrays each other, and the first end 1511 of depressed part 151 is adjacent to each other with the second end 1512 of adjacent depressed part 151.Optionally, depressed part 151 can non-close-packed arrays, and second of the first end 1511 of depressed part and adjacent depressed part 151 end 1512 is non-adjacent connects, and the distance of being separated by be >0 and≤100 nanometers.In one embodiment, the first pattern 14 has a width (W who is greater than 6 λ nanometers 1) and the period 1 be P 1, the second pattern 15 has a width (W who is less than λ nanometer 2) and second round be P 2.When the first pattern 14 and the second pattern 15 are all close-packed arrays, W 1=P 1, W 2=P 2.In one embodiment, work as P 2/ P 1>1/15, can make light that luminous lamination 11 sends penetrate toward the second side of substrate 10 effectively.In addition, the second pattern 15 has height and a width, when the ratio of height and the width is greater than 1.5, also can effectively make light that luminous lamination 11 sends penetrate toward the second side of substrate 10.Further, the first surface 101 by substrate 10 forms the first pattern 14 and the second patterns 15, can help light that luminous lamination 11 sends to penetrate toward the second side of substrate 10.
The schematic diagram of the light-emitting device 200 that Fig. 2 A and Fig. 2 B are second embodiment of the invention.The light-emitting device 200 of the second embodiment has similar structure to the light-emitting device 100 of the first embodiment.The first surface 101 ' of substrate 10 ' comprises the first pattern 14 ' of arranging with the period 1.The first pattern 14 ' comprises a plurality of the first sides from substrate 10 toward unit pattern 141 ' and a zone line 150 ' of the second side depression (toward substrate sunken inside) of substrate 10.The figure of analysing and observe of unit pattern 141 ' comprises at least one figure and is selected from the group that V-arrangement, semicircle, arc and polygon form.Fig. 2 B is the partial enlarged drawing of the first pattern 14 ' in Fig. 2 A.In the present embodiment, the cutaway view of unit pattern 141 ' is that the section of arc and each unit pattern 141 ' comprises a first end 1411 ', one second end 1412 ' and is connected in the edge 1413 ' between first end 1411 ' and the second end 1412 '.In the present embodiment, the first end 1411 ' of unit pattern 141 ' is less than 1500 nanometers apart with the second end 1412 ' of adjacent cells pattern 141 ', and the width of zone line 150 ' is less than 1500 nanometers.As shown in Figure 2 B, the first pattern 14 ' comprises the second pattern 15 of arranging with second round.The second pattern 15 comprises at least two adjacent depressed parts 151, and depressed part 151 is formed on unit pattern 141 '.In one embodiment, it is upper that depressed part 151 is formed at whole unit pattern 141 ', that is, on the edge 1413 of unit pattern 141 ', all there is depressed part 151.The depression direction of depressed part 151 is the direction from the first side of substrate 10 toward the second side (toward substrate sunken inside) roughly.The figure of analysing and observe of the depressed part 151 of the second pattern 15 comprises at least one figure and is selected from the group that V-arrangement, semicircle, arc and polygon form.In the present embodiment, the cutaway view of the second pattern 15 is that the section of arc and each depressed part 151 comprises a first end 1511, one second end 1512, each depressed part 151 is close-packed arrays each other, and the first end 1511 of depressed part 151 is adjacent to each other with the second end 1512 of adjacent depressed part 151.Optionally, depressed part 151 can non-close-packed arrays, and second of the first end 1511 of depressed part and adjacent depressed part 151 end 1512 is non-adjacent connects, and the distance >0 of being separated by and≤100 nanometers.In the present embodiment, the first pattern 14 ' has a width (W who is greater than 6 λ nanometers 1') and the period 1 be P 1', the second pattern 15 ' has a width (W who is less than λ nanometer 2') and a cycle P 2'.Because the first pattern 14 ' has zone line 150 ', so W 1' <P 1'; And the second pattern 15 is close-packed arrays, so W 2'=P 2'.In another embodiment, as shown in Figure 2 C, the zone line 150 ' of the first pattern 14 ' can comprise the second pattern 15.In one embodiment, work as P 2/ P 1>1/15, can make light that luminous lamination 11 sends penetrate toward the second side of substrate 10 ' effectively.
Fig. 3 is the schematic diagram of a light-emitting device 300 of third embodiment of the invention.The light-emitting device 300 of the 3rd embodiment has similar structure to the light-emitting device 200 of the second embodiment.The second surface 202 of substrate 20 can have the 3rd pattern 26 with period 3 arrangement.The 3rd pattern 26 can comprise unit pattern 261 and a zone line 270.The figure of analysing and observe of unit pattern 261 comprises at least one figure and is selected from the group that V-arrangement, semicircle, arc and polygon form.In the present embodiment, the cutaway view of unit pattern 261 is that the section of circular arc and each unit pattern 261 comprises a first end 2611, one second end 2612 and is connected in the edge 2613 between first end 2611 and the second end 2612.The first end 2611 of unit pattern 261 is less than 1500 nanometers apart with the second end 2612 of adjacent unit pattern 261, and the width of zone line 270 is less than 1500 nanometers.In the present embodiment, the unit pattern 241 of the first pattern 24 and the unit pattern 261 of the 3rd pattern 26 are formed on corresponding position; The zone line 250 of the first pattern 24 is formed on corresponding position with the zone line 270 of the 3rd pattern 26.Or the position of the unit pattern 241 of the first pattern 24 and the zone line 270 of the 3rd pattern 26 are formed on (not shown) on opposite position, that is unit pattern 241 is interlaced with each other with unit pattern 261 positions.In one embodiment, the first pattern 24 and/or the 3rd pattern 26 can comprise the second pattern 15.
The schematic diagram of the light-emitting device 400 that Fig. 4 A and Fig. 4 B are fourth embodiment of the invention.The light-emitting device 400 of the 4th embodiment has similar structure to the light-emitting device 100 of the first embodiment.Luminous lamination 11 is formed on the first surface 301 of substrate 30.The first surface 301 of substrate 30 comprises first pattern 34 with period 1 arrangement.The first pattern 34 comprises a plurality of first surfaces 301 from substrate toward unit pattern 341 and a zone line 350 of substrate outer lug (the second side of substrate 30 is toward the first side of substrate 30).The figure of analysing and observe of unit pattern 341 comprises at least one figure and is selected from the group that V-arrangement, semicircle, arc and polygon form.In the present embodiment, the cutaway view of unit pattern 341 is that the section of arc and unit pattern 341 comprises a first end 3411, one second end 3412 and is connected in the edge 3413 between first end 3411 and the second end 3412.In the present embodiment, the first end 3411 of unit pattern 341 is less than 1500 nanometers apart with the second end 3412 of adjacent unit pattern 341, and the width of zone line 350 is less than 1500 nanometers.In one embodiment, the first pattern 34 can be close-packed arrays, and the first end 3411 of unit pattern 341 is adjacent with the second end 3412 of adjacent unit pattern 341.Fig. 4 B is the partial enlarged drawing of the first pattern 34 in Fig. 4 A.As shown in Figure 4 B, the first pattern 34 comprises second pattern 35 with arrangement second round.The second pattern 35 comprises at least two adjacent juts 351, and jut 351 is formed on unit pattern 341.In one embodiment, jut 351 is formed on whole unit pattern 341, that is, on the edge 3413 of unit pattern, all there is jut 351.Optionally, part unit pattern 341 has the second pattern 35, and 341 of part unit patterns do not have the second pattern 35.The protrusion direction of jut 351 is the direction from the second side of substrate 10 toward the first side (toward substrate outer lug) roughly.The figure of analysing and observe of the jut 351 of the second pattern 35 comprises at least one figure and is selected from the group that V-arrangement, semicircle, arc and polygon form.In the present embodiment, the cutaway view of the second pattern 35 is also for the section of circular arc and jut 351 comprises a first end 3511, one second end 3512, jut 351 is close-packed arrays each other, and the first end 3511 of jut 351 is adjacent to each other with the second end 3512 of adjacent jut 351.Optionally, jut 351 can non-close-packed arrays, and second of the first end 3511 of jut 351 and adjacent protrusions portion 351 end 3512 is non-adjacent connects, and the distance >0 of being separated by and≤100 nanometers.In the present embodiment, the first pattern 34 has a width (W who is greater than 6 λ nanometers 3) and the period 1 be P 3, the second pattern 35 has a width (W who is less than λ nanometer 4) and a cycle P 4.Because the first pattern 34 has zone line 350, so W 3<P 3; The second pattern 35 is close-packed arrays, so W 4=P 4.In another embodiment, as shown in Figure 2 C, the zone line 350 of the first pattern 34 can comprise the second pattern 15.In one embodiment, work as P 4/ P 3>1/15, can make light that luminous lamination 11 sends penetrate toward the second side of substrate 10 ' effectively.Further, the first surface 301 by substrate 30 forms the first pattern 34 and the second patterns 35, can help light that luminous lamination 11 sends to penetrate toward the second side 302 of substrate 30.
Fig. 5 A is the schematic diagram of a light-emitting device 500 of fifth embodiment of the invention.Substrate 40 has a first surface 401 and a second surface 402 with respect to first surface 401, first surface has one first pattern 44, and the first pattern 44 comprises a protuberance region 441, protuberance region 441 is from the second surface 402 of substrate 10 toward the direction of first surface 401 protruding (toward substrate outer lug).The section in protuberance region 441 comprises a first end 4411, one second end 4412 and is connected in the edge 4413 between first end 4411 and the second end 4412.The distance of first end 4411 and the second end 4412 is not more than the width (W of second surface 5).In the present embodiment, the distance of first end 4411 and the second end 4412 equals the width (W of second surface 5).Luminous lamination 41 is formed on the first surface of substrate 40, and sends the light that a wavelength is λ nanometer.Because first surface 401 is an arc, therefore luminous lamination 41 is an arcuate structure.Luminous lamination 41 comprises one first type semiconductor layer 411, an active layer 412 and a Second-Type semiconductor layer 413.The first electrode 421 is formed in the first type semiconductor layer 411, and the second electrode 422 is formed on Second-Type semiconductor layer 413.The figure of analysing and observe of the first pattern 44 comprises at least one figure and is selected from the group that V-arrangement, semicircle, arc and polygon form.Fig. 5 B is the enlarged drawing of the first pattern 44 in Fig. 5 A.The first pattern 44 comprises second pattern 45 with arrangement second round.The second pattern 45 comprises at least two adjacent juts 451, and jut 451 is formed on protuberance region 441.In one embodiment, jut 451 is formed on whole protuberance region 441, that is, on the edge 4413 in protuberance region 441, all there is jut 451.Jut 451 is from the second surface 402 of substrate 10 toward the direction of first surface protruding (toward substrate outer lug).The figure of analysing and observe of the jut 451 of the second pattern 45 comprises at least one figure and is selected from the group that V-arrangement, semicircle, arc and polygon form.In the present embodiment, the cutaway view of the second pattern 45 is also for the section of circular arc and jut 451 comprises a first end 4511, one second end 4512, jut 451 is close-packed arrays each other, and the first end 4511 of jut 451 is adjacent to each other with the second end 4512 of adjacent jut 451.In the present embodiment, the first pattern 44 has a width (W who is greater than 6 λ nanometers 5); The second pattern 45 has a width (W who is less than λ nanometer 6) and a cycle P 6.The second pattern 45 is close-packed arrays, so W 6=P 6.
Fig. 6 A-Fig. 6 G shows a manufacture method cutaway view of the light-emitting device of second embodiment of the invention.Substrate 10 ' is provided, and substrate 10 ' has first surface 101 ' and second surface 102 '.Carry out an etching process etching first surface 101 ' to form at first surface 101 ' the first pattern 14 ' of arranging with the period 1.At the upper metal level 18 that forms of the first pattern 14 '; Metal level 18 comprises silver, gold, nickel or platinum, and thickness is about then, carry out the manufacture craft of a high temperature alloy, make metal level 18 form nanometer bead 181.Use nanometer bead as a cover curtain, the first pattern 14 ' is carried out to an etching process, for example dry-etching (ICP) or Wet-type etching (phosphoric acid or/and sulfuric acid), so that the first pattern 14 ' has the second pattern 15.Then, form a resilient coating 114 in first surface 101 ', recycling epitaxial growth technology, for example Metalorganic chemical vapor deposition technology (MOCVD), grows up luminous lamination 11 on resilient coating 114.Remove Second-Type semiconductor layer 113 partly and active layer 112 to expose the first type semiconductor layer 111.Form respectively the first electrode 121 and the second electrode 122 on the first type semiconductor layer and Second-Type semiconductor layer 111,113.
Fig. 7 A-Fig. 7 I shows another manufacture method cutaway view of the light-emitting device of second embodiment of the invention.Shown in Fig. 7 A, Fig. 7 B, provide substrate 10 ', substrate 10 ' has first surface 101 ' and second surface 102 '.Carry out an etching process etching first surface 101 ' to form at first surface 101 ' the first pattern 14 ' of arranging with the period 1.As shown in Fig. 7 C, Fig. 7 D, it is upper that a photoresist 28 is formed on the first pattern 14 ', carries out afterwards gold-tinted and make to form patterning photoresist 281.As shown in Fig. 7 E, form metal level 282 overlay pattern photoresists 281; Metal level 282 comprises silver, gold, nickel or platinum, and thickness is about
Figure BDA00002233583000082
as shown in Figure 7 F, remove patterning photoresist 281 to form patterned metal layer 283.Using patterned metal layer 283 as a cover curtain, the first pattern 14 ' is carried out to an etching process, for example dry-etching (ICP) or Wet-type etching (phosphoric acid or/and sulfuric acid), so that the first pattern 14 ' has the second pattern 15 (as shown in Figure 7 G).Then, as shown in Fig. 7 H, Fig. 7 I, form a resilient coating 114 in first surface 101 ', recycling epitaxial growth technology, for example Metalorganic chemical vapor deposition technology (MOCVD), grows up luminous lamination 11 on resilient coating 114.Remove Second-Type semiconductor layer 113 partly and active layer 112 to expose the first type semiconductor layer 111.Form respectively the first electrode 121 and the second electrode 122 on the first type semiconductor layer 111 and Second-Type semiconductor layer 113.
The first type semiconductor layer can be N-shaped semiconductor layer and Second-Type semiconductor layer can be p-type semiconductor, a kind of material in a kind of material that the first type semiconductor layer and Second-Type semiconductor layer and comprising is selected from AlGaAs, AlGaInP, AlInP and constituent material group of InGaP institute or AlInGaN, InGaN, AlGaN JiGaNSuo constituent material group; Optionally, the first type semiconductor layer can be p-type semiconductor layer and Second-Type semiconductor layer can be N-shaped semiconductor; Active layer can comprise a kind of material in a kind of material of being selected from AlGaAs, AlInGaP, InGaP and constituent material group of AlInP institute or AlInGaN, InGaN, AlGaN JiGaNSuo constituent material group; Substrate comprises at least one material or other alternative material that are selected from GaAs (GaAs), gallium phosphide (GaP), germanium (Ge), sapphire, glass, diamond, carborundum (SiC), silicon, gallium nitride (GaN) and zinc oxide (ZnO) institute constituent material cohort and replaces it.
Cited each embodiment of the present invention is only in order to the present invention to be described, not in order to limit the scope of the invention.Anyone any aobvious and easy to know modification made for the present invention or change neither depart from spirit of the present invention and scope.

Claims (10)

1. a light-emitting device, comprises:
Substrate, has the first side and second side relative with this first side; And
Luminous lamination, is formed in this first side, and sends the light that a dominant wavelength is λ nanometer; Wherein, this substrate comprises the first surface that is positioned at this first side, and this first surface comprises the first pattern of arranging with a period 1, and this first pattern comprises the second pattern of arranging with a second round, and this period 1 is greater than 6 λ nanometers, be less than λ nanometer this second round.
2. light-emitting device as claimed in claim 1, wherein, this second pattern has height and a width, and this height is greater than 1.5 with the ratio of this width.
3. light-emitting device as claimed in claim 1, wherein, this first pattern comprises a plurality of unit patterns from this first side toward this substrate sunken inside or from this first side toward this substrate outer lug.
4. light-emitting device as claimed in claim 1, wherein, this first pattern comprises a plurality of unit pattern and zone lines from this first side toward this substrate sunken inside, and wherein this zone line comprises the second pattern.
5. light-emitting device as claimed in claim 1, wherein, it is adjacent that this second pattern comprises at least two adjacent jut or depressed parts.
6. light-emitting device as claimed in claim 1, wherein, this second pattern comprise distance >0 that at least two adjacent juts or depressed part be separated by and≤100 nanometers.
7. light-emitting device as claimed in claim 1, also comprises the first electrode and the second electrode, is formed at the same side of this luminous lamination.
8. light-emitting device as claimed in claim 1, also comprises carrier, and wherein, this light-emitting device flip-chip bonded is to this carrier.
9. a light-emitting device, comprises:
Substrate;
Luminous lamination, is formed on this substrate; And
Electrode unit, is formed on luminous lamination;
Wherein this luminous lamination sends first light field passing from this substrate-side and second light field passing from this electrode unit side; And
Wherein, the luminous intensity of this first light field is greater than the luminous intensity of this second light field.
10. light-emitting device as claimed in claim 9, wherein, this substrate comprises a surface, contiguous this luminous lamination, this surface comprises the first pattern of arranging with a period 1, and this first pattern comprises the second pattern of arranging with a second round.
CN201210380575.1A 2012-10-09 2012-10-09 Luminescence apparatus Pending CN103715323A (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7470938B2 (en) * 2004-03-30 2008-12-30 Samsung Electro-Mechanics Co., Ltd. Nitride semiconductor light emitting device
CN102044608A (en) * 2010-11-17 2011-05-04 重庆大学 Flip-chip LED chip structure and manufacturing method thereof
CN102169936A (en) * 2011-02-16 2011-08-31 亚威朗光电(中国)有限公司 Graphical substrate and light-emitting diode (LED) chip

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7470938B2 (en) * 2004-03-30 2008-12-30 Samsung Electro-Mechanics Co., Ltd. Nitride semiconductor light emitting device
CN102044608A (en) * 2010-11-17 2011-05-04 重庆大学 Flip-chip LED chip structure and manufacturing method thereof
CN102169936A (en) * 2011-02-16 2011-08-31 亚威朗光电(中国)有限公司 Graphical substrate and light-emitting diode (LED) chip

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Application publication date: 20140409