CN103715312A - High-current-density and low-voltage-power light emitting diode and manufacturing method thereof - Google Patents
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- CN103715312A CN103715312A CN201210376150.3A CN201210376150A CN103715312A CN 103715312 A CN103715312 A CN 103715312A CN 201210376150 A CN201210376150 A CN 201210376150A CN 103715312 A CN103715312 A CN 103715312A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 44
- 238000000034 method Methods 0.000 claims abstract description 53
- 239000000758 substrate Substances 0.000 claims abstract description 30
- 239000004065 semiconductor Substances 0.000 claims abstract description 24
- 238000001039 wet etching Methods 0.000 claims abstract description 10
- 239000010410 layer Substances 0.000 claims description 70
- 238000002955 isolation Methods 0.000 claims description 34
- 238000004020 luminiscence type Methods 0.000 claims description 28
- 239000011241 protective layer Substances 0.000 claims description 12
- 238000005260 corrosion Methods 0.000 claims description 6
- 230000007797 corrosion Effects 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 6
- 229910052594 sapphire Inorganic materials 0.000 claims description 4
- 239000010980 sapphire Substances 0.000 claims description 4
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 3
- 238000001459 lithography Methods 0.000 claims description 3
- 238000000227 grinding Methods 0.000 claims description 2
- 206010041662 Splinter Diseases 0.000 abstract 4
- 238000007788 roughening Methods 0.000 abstract 2
- 238000006748 scratching Methods 0.000 abstract 2
- 230000002393 scratching effect Effects 0.000 abstract 2
- 238000000605 extraction Methods 0.000 description 5
- 238000009413 insulation Methods 0.000 description 5
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 4
- 229910005540 GaP Inorganic materials 0.000 description 4
- 230000008901 benefit Effects 0.000 description 4
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 229910017214 AsGa Inorganic materials 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
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Abstract
The invention provides a high-current-density and low-voltage-power light emitting diode and a manufacturing method thereof. The method comprises the following steps: making a plurality of light emitting units on the surface of a semiconductor substrate and enabling every two adjacent light emitting units to form a parallel unit; carrying out forward scratching on each parallel unit to form a deep splinter passage and carrying out forward scratching on the two light emitting units in each parallel unit to form a shallow isolating passage; adopting wet etching to insulate the splinter passages and the isolating passages and forming a wavy roughening structure on the side walls of the splinter passages and the isolating passages; and finally making electrodes, a back-plated reflector and splinters to obtain mutually-isolated parallel units. The stability of chips can be improved; a traditional single power LED chip is changed into two parallel ones, the light emitting efficiency of chips is improved by optimizing the current density of chips, and the working voltage of the chips is reduced through current shunting; and the wavy roughening structure on the side walls is conducive to improvement of the light output efficiency of chips.
Description
Technical field
The invention belongs to field of semiconductor illumination, particularly relate to a kind of high current density, low-voltage power type light-emitting diode and manufacture method thereof.
Background technology
Semiconductor lighting is as new and effective solid light source, there is the remarkable advantages such as life-span length, energy-saving and environmental protection, safety, mankind's leap again after incandescent lamp, fluorescent lamp in history of throwing light on will be become, its application expands rapidly, just driving the upgrading of the industries such as traditional lighting, demonstration, its economic benefit and social benefit are huge.Just because of this, semiconductor lighting is generally regarded as one of new industry that 21 century is most with prospects, is also one of most important commanding elevation of the optoelectronic areas coming years.Light-emitting diode is by three four compounds, as GaAs(GaAs), GaP(gallium phosphide), GaAsP(gallium arsenide phosphide) etc. semiconductor make, its core is PN junction.Therefore it has the I-N characteristic of general P-N knot, i.e. forward conduction, oppositely cut-off, breakdown characteristics.In addition, under certain condition, it also has the characteristics of luminescence.Under forward voltage, electronics injects P district by N district, and N district is injected by P district in hole.How sub minority carrier (few son) part that enters the other side region is compound and luminous with majority carrier ().
The light emitting diode that existing power type light-emitting diode mostly is by single structure cell forms, and the light-emitting diode of this single structure cell is difficult to bear the raising that has a strong impact on its power compared with high voltage, thereby is often difficult to the performance requirement that reaches expected.
Further, according to snell law, the light extraction efficiency of existing GaN base LED is limited by refringence huge between GaN and air, light is from GaN(n ≈ 2.5) to the critical angle of air (n=1.0), be about 23 °, only in incidence angle, in critical angle, with interior light, can shine in air, and critical angle light in addition can only carry out in GaN inside back reflective, until by self-absorption, seriously reduced the light extraction efficiency of light-emitting diode.
Summary of the invention
The shortcoming of prior art in view of the above, the object of the present invention is to provide a kind of high current density, low-voltage power type light-emitting diode and manufacture method thereof, for solving prior art power type light-emitting diode, bear the problem that voltage is lower and light extraction efficiency is difficult to raising.
For achieving the above object and other relevant objects, the invention provides the manufacture method of a kind of high current density, low-voltage power type light-emitting diode, described manufacture method at least comprises the following steps:
1) provide semi-conductive substrate, in described semiconductor substrate surface, form successively the light-emitting component that comprises N-type layer, quantum well layer and P type layer, and in described light-emitting component, define a plurality of luminescence units, and every two adjacent luminescence units form receipts or other documents in duplicate unit in the lump;
2) in this luminescence unit respectively, make N electrode and prepare region;
3) in the surface of said structure, form protective layer;
4) foundation is respectively just being drawn the sliver aisle that forms first degree of depth in this parallel connection unit to described light-emitting component, and between two luminescence units in this parallel connection unit respectively, just drawing the isolation aisle that forms second degree of depth, wherein, described first degree of depth is greater than second degree of depth;
5) respectively this sliver aisle and isolation aisle of corrosion, to remove respectively the residual luminous extension in this sliver aisle and isolation aisle, and in described sliver aisle and the sidewall in isolation aisle form alligatoring structure;
6) remove described protective layer;
7) in the P type layer upper surface of this luminescence unit respectively, make transparency conducting layer, in this layer at transparent layer respectively, make P electrode, and in this N electrode respectively, prepare region and prepare N electrode;
8) from Semiconductor substrate described in thinning back side, and in the described Semiconductor substrate back side, make speculum;
9) foundation is respectively carried out sliver in this parallel connection unit, obtains independently unit in parallel.
In the manufacture method of high current density of the present invention, low-voltage power type light-emitting diode, described Semiconductor substrate is Sapphire Substrate, and described N-type layer is N-GaN layer, and described quantum well layer is InGaN layer, and described P type layer is P-GaN layer.
Manufacture method step 2 at high current density of the present invention, low-voltage power type light-emitting diode) in, first make lithography mask version, then adopt P type layer and quantum well layer described in ICP etching method etching to form a N-type layer platform, to form N electrode, prepare region.
In the manufacture method of high current density of the present invention, low-voltage power type light-emitting diode, described protective layer is SiO
2layer.
In the manufacture method of high current density of the present invention, low-voltage power type light-emitting diode, in step 4), adopt the mode of laser scribing just to draw described light-emitting component.
As a preferred version of the manufacture method of high current density of the present invention, low-voltage power type light-emitting diode, described first degree of depth is 20 ~ 30 microns, and described second degree of depth is 7 ~ 15 microns.
A preferred version as the manufacture method of high current density of the present invention, low-voltage power type light-emitting diode, in step 5), adopt the corrosion of wet etching method respectively this sliver aisle and isolation aisle, to remove the respectively residual luminous extension in this sliver aisle and isolation aisle, and in described sliver aisle and the sidewall in isolation aisle form waveform alligatoring structure.
In the manufacture method step 8) of high current density of the present invention, low-voltage power type light-emitting diode, adopt to grind or wet etching method attenuate described in Semiconductor substrate.
In the manufacture method step 9) of high current density of the present invention, low-voltage power type light-emitting diode, the mode that adopts blade sliver is carried out sliver to this parallel connection unit respectively, obtains independently unit in parallel.
The high current density of the above-mentioned any one technical scheme of a kind of foundation is also provided in the present invention, the high current density of the manufacture method manufacturing of low-voltage power type light-emitting diode, low-voltage power type light-emitting diode.
As mentioned above, high current density of the present invention, low-voltage power type light-emitting diode and manufacture method thereof, have following beneficial effect: in semiconductor substrate surface, make a plurality of luminescence units, and form unit in parallel by two adjacent luminescence units; According to unit in parallel, just drawing and forming the darker sliver aisle of the degree of depth, according to two luminescence units in unit in parallel, just drawing and forming the more shallow isolation aisle of the degree of depth; Then adopt wet etching with insulation sliver aisle and isolation aisle, and form corrugated alligatoring structure at its sidewall; Finally make electrode, back of the body plating speculum and sliver to obtain the unit in parallel of mutual isolation.The stability that can improve chip of the present invention; Make single traditional power type LED chip into two parallel connections, by optimizing the mode of chip current density, improve the luminous efficiency of chip, and by current distributing, reduce the operating voltage of chip; The waveform alligatoring structure of sidewall is conducive to improve the light extraction efficiency of chip.
Accompanying drawing explanation
Fig. 1 ~ Fig. 2 b is shown as the structural representation that the manufacture method step 1) of high current density of the present invention, low-voltage power type light-emitting diode presents.
Fig. 3 a ~ Fig. 3 b is shown as the manufacture method step 2 of high current density of the present invention, low-voltage power type light-emitting diode) structural representation that presents.
Fig. 4 is shown as the structural representation that the manufacture method step 3) of high current density of the present invention, low-voltage power type light-emitting diode presents.
Fig. 5 a ~ Fig. 5 b is shown as the structural representation that the manufacture method step 4) of high current density of the present invention, low-voltage power type light-emitting diode presents.
Fig. 6 is shown as the structural representation that the manufacture method step 5) of high current density of the present invention, low-voltage power type light-emitting diode presents.
Fig. 7 is shown as the structural representation that the manufacture method step 6) of high current density of the present invention, low-voltage power type light-emitting diode presents.
Fig. 8 ~ Fig. 9 is shown as the structural representation that the manufacture method step 7) of high current density of the present invention, low-voltage power type light-emitting diode presents.
Figure 10 is shown as the structural representation that the manufacture method step 8) of high current density of the present invention, low-voltage power type light-emitting diode presents.
Figure 11 a ~ Figure 11 b is shown as the structural representation that the manufacture method step 9) of high current density of the present invention, low-voltage power type light-emitting diode presents.
Element numbers explanation
1 unit in parallel
10 luminescence units
101 Semiconductor substrate
102 N-type layers
103 quantum well layers
104 P type layers
105 N electrodes are prepared region
106 protective layers
107 isolation aisle
108 sliver aisle
109 alligatoring structures
110 transparency conducting layers
111 P electrodes
112 N electrodes
113 speculums
Embodiment
Below, by specific instantiation explanation embodiments of the present invention, those skilled in the art can understand other advantages of the present invention and effect easily by the disclosed content of this specification.The present invention can also be implemented or be applied by other different embodiment, and the every details in this specification also can be based on different viewpoints and application, carries out various modifications or change not deviating under spirit of the present invention.
Refer to Fig. 1 ~ Figure 11 b.It should be noted that, the diagram providing in the present embodiment only illustrates basic conception of the present invention in a schematic way, satisfy and only show with assembly relevant in the present invention in graphic but not component count, shape and size drafting while implementing according to reality, during its actual enforcement, kenel, quantity and the ratio of each assembly can be a kind of random change, and its assembly layout kenel also may be more complicated.
As shown in Fig. 1 ~ Figure 11 b, the present embodiment provides the manufacture method of a kind of high current density, low-voltage power type light-emitting diode, and described manufacture method at least comprises the following steps:
As shown in Fig. 1 ~ Fig. 2 b, first carry out step 1), semi-conductive substrate 101 is provided, in described Semiconductor substrate 101 surfaces, form successively the light-emitting component that comprises N-type layer 102, quantum well layer 103 and P type layer 104, and in described light-emitting component, define a plurality of luminescence units 10, and every two adjacent luminescence units 10 form receipts or other documents in duplicate unit 1 in the lump.
Described Semiconductor substrate 101 is Si substrate, SiC substrate, AsGa substrate, Sapphire Substrate etc., and in the present embodiment, described Semiconductor substrate 101 is Sapphire Substrate.Described N-type layer 102 is N-GaN layer, N-GaP layer etc., and described quantum well layer 103 is InGaN layer, AlInGaP layer etc., and described P type layer 104 is P-GaN layer, P-GaP layer etc.In the present embodiment, described N-type layer 102 is N-GaN layer, and described quantum well layer 103 is InGaN layer, and described P type layer 104 is P-GaN layer, and preparation method is chemical vapour deposition technique.Certainly, in other embodiments, can select other luminous epitaxial loayer, its preparation method also can be selected the extension means of all expections.Described unit in parallel 1 is comprised of two adjacent luminescence units 10.
As shown in Fig. 3 a ~ Fig. 3 b, then carry out step 2), in this luminescence unit 10 respectively, make N electrodes and prepare region 105.
Particularly, first make lithography mask version, then adopt P type layer 104 and quantum well layer 103 described in ICP etching method etching to form N-type layer 102 platform, these exposed N-type layer 102 platforms are N electrode and prepare region 105.
As shown in Figure 4, then carry out step 3), in the surface of said structure, form protective layer 106.
In the present embodiment, adopt chemical vapour deposition technique or vapour deposition method to form protective layer 106 in said structure surface, described protective layer 106 can for but be not limited to SiO
2layer.
As shown in Fig. 5 a ~ Fig. 5 b, then carry out step 4), the foundation respectively described light-emitting component in 1 pair of this parallel connection unit is just being drawn the sliver aisle 108 that forms first degree of depth, and 10 of two luminescence units in this parallel connection unit 1 respectively are just being drawn the isolation aisle 107 that forms second degree of depth, wherein, described first degree of depth is greater than second degree of depth.
In the present embodiment, described sliver aisle 108 is for follow-up sliver technique, and described isolation aisle 107 is for making two luminescence units, 10 insulation in unit 1 in parallel.The mode that first adopts laser scribing is just drawing according to the described light-emitting component in 1 pair of this parallel connection unit respectively the sliver aisle 108 that forms first degree of depth, then by the mode of laser scribing, 10 of two luminescence units in unit 1 in parallel are just being drawn to the isolation aisle 107 that forms two degree of depth, described first degree of depth is 20 ~ 30 microns, and described second degree of depth is 7 ~ 15 microns.In a concrete implementation process, described first degree of depth is 22 microns, and described second degree of depth is 10 microns.Because the degree of depth in described sliver aisle 108 is greater than the degree of depth in described isolation aisle 107, therefore, when sliver, easily rupture in the darker described sliver of degree of depth aisle 108, and can not rupture in the more shallow described isolation of degree of depth aisle 107, so can guarantee the yield of sliver.
As shown in Figure 6, then carry out step 5), corrosion is this sliver aisle 108 and isolation aisle 107 respectively, to remove respectively the residual luminous extension in this sliver aisle 108 and isolation aisle 107, and in described sliver aisle 108 and the sidewall in isolation aisle 107 form alligatoring structure 109;
In the present embodiment, adopt the corrosion of wet etching method respectively this sliver aisle 108 and isolation aisle 107, to remove the respectively residual luminous extension in this sliver aisle 108 and isolation aisle 107, and in described sliver aisle 108 and the sidewall in isolation aisle 107 form waveform alligatoring structure 109.Adopt wet etching to remove the respectively residual luminous extension in this sliver aisle 108 and isolation aisle 107, can guarantee the insulation of 10 of two luminescence units in 1 of unit in parallel and unit in parallel 1, in order to avoid chip short circuit.Meanwhile, can be in described sliver aisle 108 and the sidewall in isolation aisle 107 form alligatoring structure 109, increased widely the bright dipping probability of chip sidewall.
As shown in Figure 7, then carry out step 6), remove described protective layer 106.
In the present embodiment, protective layer 106(SiO described in employing HF solution removal
2layer).
As shown in Fig. 8 ~ Fig. 9, then carry out step 7), in P type layer 104 upper surface of this luminescence unit 10 respectively, make transparency conducting layers 110, in these transparency conducting layer 110 surfaces respectively, make P electrodes 111, and prepare region 105 preparation N electrodes 112 in this N electrode respectively.
It should be noted that, while making transparency conducting layer 110, need to continue to keep the insulation of 10 of two luminescence units in 1 of described assurance unit in parallel and unit in parallel 1.In the present embodiment, described transparency conducting layer 110 is ITO layer.
As shown in figure 10, then carry out step 8), from Semiconductor substrate described in thinning back side 101, and make speculum 113 in described Semiconductor substrate 101 back sides.
In the present embodiment, Semiconductor substrate 101 described in employing grinding or wet etching method attenuate.Described speculum 113 can be the lamination of metal level, dielectric layer or metal level and dielectric layer.
As shown in Figure 11 a ~ Figure 11 b, finally carry out step 9), foundation respectively this parallel connection unit 1 is carried out sliver, obtains independently unit 1 in parallel.
In the present embodiment, the mode that adopts blade sliver is carried out sliver to this parallel connection unit 1 respectively, obtains independently unit 1 in parallel.
The present embodiment also provides high current density, the low-voltage power type light-emitting diode of execution mode manufacturing of the manufacture method of the above-mentioned high current density of a kind of foundation, low-voltage power type light-emitting diode.
In sum, high current density of the present invention, low-voltage power type light-emitting diode and manufacture method thereof, make a plurality of luminescence units 10 prior to Semiconductor substrate 101 surfaces, and form unit 1 in parallel by two adjacent luminescence units 10; According to unit 1 in parallel, just drawing and forming the darker sliver aisle 108 of the degree of depth, according to two luminescence units 10 in unit 1 in parallel, just drawing and forming the more shallow isolation aisle 107 of the degree of depth; Then adopt wet etching with insulation sliver aisle 108 and isolation aisle 107, and form corrugated alligatoring structure 109 at its sidewall; Finally make electrode, back of the body plating speculum 113 and sliver to obtain the unit in parallel 1 of mutual isolation.The present invention has following beneficial effect: the present invention can improve the stability of chip; Make single traditional power type LED chip into two parallel connections, by optimizing the mode of chip current density, improve the luminous efficiency of chip, and by current distributing, reduce the operating voltage of chip; The waveform alligatoring structure of sidewall is conducive to improve the light extraction efficiency of chip.So the present invention has effectively overcome various shortcoming of the prior art and tool high industrial utilization.
Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not for limiting the present invention.Any person skilled in the art scholar all can, under spirit of the present invention and category, modify or change above-described embodiment.Therefore, such as in affiliated technical field, have and conventionally know that the knowledgeable, not departing from all equivalence modifications that complete under disclosed spirit and technological thought or changing, must be contained by claim of the present invention.
Claims (10)
1. a manufacture method for high current density, low-voltage power type light-emitting diode, is characterized in that, described manufacture method at least comprises the following steps:
1) provide semi-conductive substrate, in described semiconductor substrate surface, form successively the light-emitting component that comprises N-type layer, quantum well layer and P type layer, and in described light-emitting component, define a plurality of luminescence units, and every two adjacent luminescence units form receipts or other documents in duplicate unit in the lump;
2) in this luminescence unit respectively, make N electrode and prepare region;
3) in the surface of said structure, form protective layer;
4) foundation is respectively just being drawn the sliver aisle that forms first degree of depth in this parallel connection unit to described light-emitting component, and between two luminescence units in this parallel connection unit respectively, just drawing the isolation aisle that forms second degree of depth, wherein, described first degree of depth is greater than second degree of depth;
5) respectively this sliver aisle and isolation aisle of corrosion, to remove respectively the residual luminous extension in this sliver aisle and isolation aisle, and in described sliver aisle and the sidewall in isolation aisle form alligatoring structure;
6) remove described protective layer;
7) in the P type layer upper surface of this luminescence unit respectively, make transparency conducting layer, in this layer at transparent layer respectively, make P electrode, and in this N electrode respectively, prepare region and prepare N electrode;
8) from Semiconductor substrate described in thinning back side, and in the described Semiconductor substrate back side, make speculum;
9) foundation is respectively carried out sliver in this parallel connection unit, obtains independently unit in parallel.
2. the manufacture method of high current density according to claim 1, low-voltage power type light-emitting diode, it is characterized in that: described Semiconductor substrate is Sapphire Substrate, described N-type layer is N-GaN layer, and described quantum well layer is InGaN layer, and described P type layer is P-GaN layer.
3. the manufacture method of high current density according to claim 1, low-voltage power type light-emitting diode, it is characterized in that: step 2) in, first make lithography mask version, then adopt P type layer and quantum well layer described in ICP etching method etching to form a N-type layer platform, to form N electrode, prepare region.
4. the manufacture method of high current density according to claim 1, low-voltage power type light-emitting diode, is characterized in that: described protective layer is SiO
2layer.
5. the manufacture method of high current density according to claim 1, low-voltage power type light-emitting diode, is characterized in that: in step 4), adopt the mode of laser scribing just to draw described light-emitting component.
6. the manufacture method of high current density according to claim 1, low-voltage power type light-emitting diode, is characterized in that: described first degree of depth is 20 ~ 30 microns, and described second degree of depth is 7 ~ 15 microns.
7. the manufacture method of high current density according to claim 1, low-voltage power type light-emitting diode, it is characterized in that: in step 5), adopt the corrosion of wet etching method respectively this sliver aisle and isolation aisle, to remove the respectively residual luminous extension in this sliver aisle and isolation aisle, and in described sliver aisle and the sidewall in isolation aisle form waveform alligatoring structure.
8. the manufacture method of high current density according to claim 1, low-voltage power type light-emitting diode, is characterized in that: Semiconductor substrate described in employing grinding or wet etching method attenuate in step 8).
9. the manufacture method of high current density according to claim 1, low-voltage power type light-emitting diode, is characterized in that: the mode that adopts blade sliver in step 9) is carried out sliver to this parallel connection unit respectively, obtains independently unit in parallel.
10. the high current density according to the manufacture method manufacturing of the high current density described in claim 1 ~ 9 any one, low-voltage power type light-emitting diode, low-voltage power type light-emitting diode.
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| CN104681674A (en) * | 2015-03-10 | 2015-06-03 | 江苏新广联半导体有限公司 | GaN-based high-voltage direct-current LED insulation isolating process |
| CN109950373A (en) * | 2019-03-26 | 2019-06-28 | 扬州乾照光电有限公司 | A kind of technique manufacturing method for reducing LED wafer warped degree |
| CN111987200A (en) * | 2020-08-20 | 2020-11-24 | 厦门三安光电有限公司 | Light-emitting diode module, backlight module and display module |
| CN112670382A (en) * | 2020-12-23 | 2021-04-16 | 天津三安光电有限公司 | LED chip and preparation method thereof |
| CN112864290A (en) * | 2020-04-09 | 2021-05-28 | 镭昱光电科技(苏州)有限公司 | Light emitting diode structure and manufacturing method thereof |
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