CN103714773A - Ramp signal generating circuit, signal generator, array substrate and display device - Google Patents
Ramp signal generating circuit, signal generator, array substrate and display device Download PDFInfo
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- CN103714773A CN103714773A CN201310703124.1A CN201310703124A CN103714773A CN 103714773 A CN103714773 A CN 103714773A CN 201310703124 A CN201310703124 A CN 201310703124A CN 103714773 A CN103714773 A CN 103714773A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K4/00—Generating pulses having essentially a finite slope or stepped portions
- H03K4/06—Generating pulses having essentially a finite slope or stepped portions having triangular shape
- H03K4/08—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape
- H03K4/48—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0404—Matrix technologies
- G09G2300/0408—Integration of the drivers onto the display substrate
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0243—Details of the generation of driving signals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0243—Details of the generation of driving signals
- G09G2310/0259—Details of the generation of driving signals with use of an analog or digital ramp generator in the column driver or in the pixel circuit
Abstract
The embodiment of the invention provides a ramp signal generating circuit, a signal generator, an array substrate and a display device, and relates to the electronic technical field. The ramp signal generating circuit includes a first shift register, a second shift register unit, a voltage decreasing unit and an acquisition unit; the voltage decreasing unit is connected with a power supply input end and a grounding end respectively; the first shift register is connected with the voltage decreasing unit and is used for controlling the voltage decreasing unit to perform step-by-step continuous voltage decrease on voltage inputted by the power supply input end; the acquisition unit is provided with an output end and is connected with the voltage decreasing unit; and the second shift register is connected with the acquisition unit and is used for controlling the acquisition unit to acquire and output continuously-changed voltage outputted by the voltage decreasing unit. With the ramp signal generating circuit of the invention adopted, the area of the ramp signal generating circuit can be decreased, and linearity of ramp signals can be improved.
Description
Technical field
The present invention relates to electronic technology field, relate in particular to a kind of ramp signal circuit for generating and signal generator, array base palte and display device.
Background technology
Along with the development of electronic technology, people not only have harsh demand to the outward appearance of electronic product and quality, and the price of product and practicality are also had to higher concern.
For meeting popular demand, existing electronic product extensively adopts SOG(System on Glass) technology, SOG refers to integrated driving and circuit system on substrate, the production that appears as product and the design of this technology provide huge facility, developer only need carry out analog simulation to the circuit system based on TFT, just can implement by certain technique, thereby reduced widely the production cost of electronic product, in addition, the circuit design by Highgrade integration can also make more more miniaturization of product.
Especially for display panel, the drive system that SOG can effective integration comprises the modules such as line driver (GateDriver), Source drive (Data Driver), MUX (Mux), DC power converter (DC-DC), digital to analog converter (DAC) and time schedule controller (TCON) is on glass substrate, can greatly reduce costs, simultaneously can minimize screen frame, and solve due to problems such as resistance drop (IR Drop) that different driving chip interconnects brings, noise, reliabilities.In order to complete more systemic-function, SOG technology is just towards Highgrade integration and miniaturization development more, and the trend that develops low-cost, energy-conservation, lightweight, frivolous display is irresistible.SOG technology is the inexorable trend of circuit system development.
In existing display panel; conventionally the multiple module that need to adopt ramp signal to drive that also comprises digital-to-analogue-analog to digital converter etc. on array base palte; the SOG technology of present stage is still difficult to effective integration ramp signal generator; and the extra ramp signal generator arranging will increase the area of driving circuit greatly, limited the further miniaturization of display device.On the other hand, existing ramp signal generator is difficult to effectively produce the good ramp signal output of the linearity, and this will limit the quality of display device product greatly.
Summary of the invention
Embodiments of the invention provide a kind of ramp signal circuit for generating and signal generator, array base palte and display device, can reduce the area of ramp signal circuit for generating, improve the linearity of ramp signal.
For achieving the above object, embodiments of the invention adopt following technical scheme:
The one side of the embodiment of the present invention, provides a kind of ramp signal circuit for generating, comprising:
The first shift register, the second shift register, pressure drop unit and collecting unit;
Described pressure drop unit connects respectively power input and earth terminal;
Described the first shift register is connected with described pressure drop unit, for controlling described pressure drop unit, the voltage of described power input input is carried out step by step to lower voltage continuously;
Described collecting unit has output terminal, and connects described pressure drop unit;
Described the second shift register is connected with described collecting unit, for controlling described collecting unit, the continually varying voltage of described pressure drop unit output is gathered and is exported.
On the other hand, the embodiment of the present invention also provides a kind of ramp signal generator, comprises ramp signal circuit for generating as above.
In addition, the embodiment of the present invention also provides a kind of array base palte, comprising: the first shift register and the second shift register, and described array base palte also comprises ramp signal circuit for generating as above, described ramp signal circuit for generating comprises:
Pressure drop unit and collecting unit;
Described pressure drop unit connects respectively power input and earth terminal;
Described the first shift register is connected with described pressure drop unit, for controlling described pressure drop unit, the voltage of described power input input is carried out step by step to lower voltage continuously;
Described collecting unit has output terminal, and connects described pressure drop unit;
Described the second shift register is connected with described collecting unit, for controlling described collecting unit, the continually varying voltage of described pressure drop unit output is gathered and is exported.
The embodiment of the present invention also provides a kind of display device, comprises array base palte as above.
Ramp signal circuit for generating and signal generator that the embodiment of the present invention provides, array base palte and display device, adopt two shift register cells, the design of pressure drop unit and collecting unit, by different Timing Signal Designs, make the driving to pressure drop unit and collecting unit respectively of two shift register cells, realize the first shift register control pressure drop unit the voltage of power input input is carried out step by step to lower voltage continuously, the second shift register control collecting unit gathers and exports the continually varying voltage of pressure drop unit output simultaneously.A kind of like this component units of ramp signal circuit for generating of structure is less, and circuit level is high, can effectively reduce the area of ramp signal circuit for generating.In addition, compared with prior art, a kind of like this ramp signal circuit for generating of structure has higher sample frequency, thereby can effectively improve the linearity of ramp signal.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
The structural representation of a kind of ramp signal circuit for generating that Fig. 1 provides for the embodiment of the present invention;
The circuit connection structure schematic diagram of a kind of ramp signal circuit for generating that Fig. 2 provides for the embodiment of the present invention;
Fig. 3 is the signal sequence schematic diagram while being N-type transistor in ramp signal circuit for generating;
Fig. 4 is the simulation waveform figure of the ramp signal circuit for generating output signal shown in Fig. 2;
The circuit connection structure schematic diagram of another ramp signal circuit for generating that Fig. 5 provides for the embodiment of the present invention;
Fig. 6 is the simulation waveform figure of the ramp signal circuit for generating output signal shown in Fig. 5;
The circuit connection structure schematic diagram of another ramp signal circuit for generating that Fig. 7 provides for the embodiment of the present invention;
The circuit connection structure schematic diagram of the another ramp signal circuit for generating that Fig. 8 provides for the embodiment of the present invention;
Fig. 9 is the signal sequence schematic diagram while being P transistor npn npn in ramp signal circuit for generating.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, those of ordinary skills, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
The image element circuit that the embodiment of the present invention provides, as shown in Figure 1, comprising:
The first shift register 11, the second shift register 12, pressure drop unit 13 and collecting unit 14.
Wherein, pressure drop unit 13 connects respectively power input Vref and earth terminal.
The first shift register 11 is connected with pressure drop unit 13, for controlling the voltage of the 13 pairs of power input Vref inputs in pressure drop unit, carries out step by step lower voltage continuously.
Collecting unit 14 has output end vo, and collecting unit 14 connects pressure drop unit 13.
The second shift register 12 is connected with collecting unit 14, for controlling the continually varying voltage of 14 pairs of pressure drop unit of collecting unit, 13 outputs, gathers and exports.
The ramp signal circuit for generating that the embodiment of the present invention provides, adopt the design of two shift register cells, pressure drop unit and collecting units, by different Timing Signal Designs, make the driving to pressure drop unit and collecting unit respectively of two shift register cells, realize the first shift register control pressure drop unit the voltage of power input input is carried out step by step to lower voltage continuously, the second shift register control collecting unit gathers and exports the continually varying voltage of pressure drop unit output simultaneously.A kind of like this component units of ramp signal circuit for generating of structure is less, and circuit level is high, can effectively reduce the area of ramp signal circuit for generating.In addition, compared with prior art, a kind of like this ramp signal circuit for generating of structure has higher sample frequency, thereby can effectively improve the linearity of ramp signal.
Wherein, pressure drop unit 13 can adopt variously known can realize circuit structure or the electron device that input voltage reduces gradually, and the present invention does not limit this.
Concrete, as shown in Figure 2, pressure drop unit 13 comprises: be a plurality of the first transistor M that matrix form is arranged.
The grid that is positioned at the first transistor M of same a line is all connected with an output terminal of the first shift register 11.
Be positioned at first being extremely all connected with an input end of collecting unit 14 of the first transistor M of same row.
Be positioned at the second utmost point series connection of the first transistor M of same a line, and as shown in Figure 2, except crossing the first row and last column, be positioned at second being extremely all in series with second utmost point of the first transistor M of its next line first row of the first transistor M of any last row of a line.
In the first transistor M of series connection, between second utmost point of any two adjacent the first transistor M, be all in series with dropping resistor R.
Further, as shown in Figure 2, collecting unit 14 specifically comprises: a plurality of transistor seconds T.
The grid of transistor seconds T connects respectively the different output terminals of the second shift register 12, and first of transistor seconds T extremely all connects the output end vo of collecting unit 14.
Second utmost point of each transistor seconds T is connected with first utmost point that is positioned at the first transistor M of same row.
Further, in ramp signal circuit for generating as shown in Figure 2, the input end of the first shift register 11 can connect respectively the first clock signal clk 1, second clock signal CLKB1 and the first frame start signal STV1, for opening line by line the first transistor M.
The input end of the second shift register 12 can connect respectively the 3rd clock signal clk 2, the 4th clock signal clk B2 and the second frame start signal STV2, for within a line the first transistor M unlatching cycle, control the voltage that collecting unit 14 gathers first utmost point of each the first transistor M by column.
In embodiments of the present invention, shift register cell can be specifically GOA(Gate Driver on Array, the capable driving of array base palte) circuit, GOA circuit is a kind of cascade shift register, it receives the frame start signal STV of the input of starting, and conventionally by two clock signals (CLK, CLKB), control GOA internal circuit TFT(Thin Film Transistor, Thin Film Transistor (TFT)) unlatching or close, input signal one-level level is transmitted, wherein the signal output of every grade of CLKB signal controlling.
It should be noted that, in embodiments of the present invention, the first transistor M and transistor seconds T can be all N-type transistor, and when the first transistor M and transistor seconds T are N-type transistor, transistorized first can be extremely extremely drain electrode for source electrode, second.
The transistor adopting in all embodiment of the present invention can be all thin film transistor (TFT) or field effect transistor or the identical device of other characteristics, because the transistorized source electrode adopting here, drain electrode are symmetrical, so its source electrode, drain electrode are as broad as long.In embodiments of the present invention, for distinguishing transistor the two poles of the earth except grid, wherein a utmost point is called source electrode, and another utmost point is called drain electrode.In addition; according to transistorized characteristic, distinguish and transistor can be divided into N-type and P type; following examples all be take N transistor and are described as inner; what can expect is that those skilled in the art can expect easily not making under creative work prerequisite when adopting P transistor npn npn to realize, therefore also in embodiments of the invention protection domain.
From ramp signal circuit for generating as shown in Figure 2, can find out, pressure drop unit 13 can be by the capable the electric circuit constitute of n, every row circuit comprises again n resistance and n TFT pipe M series connection, the grid of TFT pipe M connects the output signal of outside GOA1 circuit, between every two resistance, connect the drain electrode of a TFT pipe M, the source shorted of same column TFT pipe M is connected to the drain electrode of TFT pipe T together, and the grid of TFT pipe T connects the output signal of GOA2 circuit, and the source electrode of TFT pipe T connects output end vo.
Adopt a kind of like this ramp signal circuit for generating of structure to produce ramp signal, wherein, the sequential of driving signal can be as shown in Figure 3, and the process that produces ramp signal specifically can comprise transmission of signal and two steps of collection signal.Specifically describe as follows:
Transmission of signal: input signal is inputted from resistance R 1 one end of the first row by direct current signal Vref.As shown in Figure 3, by clock signal clk 1, CLKB1, control GOA1 circuit, the single spin-echo of CLK1 and CLKB1 wherein, the first row given first output signal VoR1 of GOA1 circuit, manages M1～Mn to the TFT of the first row, and the TFT of this row is opened.The clock period of GOA1 is n times of GOA2 clock period, and when the first row TFT pipe M is opened by GOA1, the GOA2 circuit of being controlled by CLK2, CLKB2 is opened T1～Tn pipe successively, wherein the single spin-echo of CLK2 and CLKB2 like this.Because each resistance is all identical with TFT pipe, voltage signal will reduce successively.When the first row end of scan, GOA1 circuit is the second row TFT pipe M output VoR2 signal, and the second row TFT pipe M is opened, and the resistance R n of the first row passes to voltage signal the resistance R 1 of the second row, when the second row TFT pipe M is opened, GOA2 circuit is opened T1～Tn pipe again successively.Like this, it is capable that signal is passed to n line by line, until the end ground connection of the capable resistance R n of n.
It should be noted that, in embodiments of the present invention, the clock period of GOA circuit specifically refers to and continues a high level of output or a low level time span.The clock period of GOA1 is that the n of GOA2 clock period doubly can be understood as, the time span that GOA1 continues a high level of output be the GOA2 time span that continues a high level of output n doubly.At GOA1, to a row or column, continue in the time span of a high level of output, GOA2 can complete an or n leu time high level of output capable to n.
Collection signal: when the resistance R 1～Rn of the 1st row and TFT pipe M1～Mn work, GOA2 manages T1～Tn by TFT successively and opens, the drain electrode of T pipe connects the source electrode of the M pipe of each row, the source electrode of T pipe connects output signal Vo, and Vo has gathered according to time sequencing the ramp voltage signal that the first row is linear decline like this; When the resistance R 1～Rn of the 2nd row and TFT pipe M1～Mn work, GOA2 manages T1～Tn by TFT successively again and opens, and Vo continues to gather the second row and is the linear ramp voltage signal declining; Until gather the capable slope dropping signal to 0 of n, the work that gathers a decline ramp signal completes, like this can circle collection ramp signal.
The signal simulation situation of a kind of like this output signal Vo of ramp signal circuit for generating can be as shown in Figure 4, as seen from Figure 4, the output VoR1 of the first row of GOA1 is between two high level, be between the complete frame-scan period, to have completed the collection of a complete ramp signal, output signal VoC1～VoCn of GOA2 completes successively single pass in first high level of VoR1, and come temporarily at VoR2, VoC1～VoCn scans for the second time, until finish a frame-scan period.In signal simulation figure, show, the ramp signal circuit for generating that the embodiment of the present invention provides can produce a decline ramp waveform with good linear.
It should be noted that, transistor M array in the embodiment of the present invention can be selected according to actual conditions the ranks number of array, what should easily expect is, when the ranks number of transistor M increases, by increasing the scanning output end of GOA circuit, the sample frequency for voltage signal can be further improved, thereby the linearity of ramp signal can be further improved.
In the above-described embodiments, be with power input Vref, to connect the drain electrode of the first transistor M1 that is positioned at the first row first row, the drain electrode connection earth terminal that is positioned at the first transistor Mn of last row of last column is the explanation that example is carried out.
Wherein, dropping resistor R can make of conductive materials such as ITO, bonding line between every two row connects can adopt the making of metallic conduction material, although the resistance of metal is less, but still can there is certain bonding line resistance, in order to obtain having the ramp signal of good linear, in embodiments of the present invention, from the first row to last column, the resistance of adjacent two row dropping resistor R can reduce by bonding line resistance equivalence, can form like this decline ramp signal that the linearity is higher.In the process of practical application, the value that the resistance of adjacent two row dropping resistor R reduces can be according to the panel technique of practical application by calculating accordingly.
For example, can find according to technique data the square resistance Rs of metallic conduction material, then according to the length of wire (L) and wide (W), obtain square and count N=L/W, N*Rs is the bonding line resistance value that connects the bonding line of two resistance between capable so.In embodiments of the present invention, from the first row to last column, the resistance of adjacent two row dropping resistor R can reduce N*Rs successively, so, can effectively overcome the impact that bonding line resistance produces voltage drop, forms the higher decline ramp signal of the linearity.
Or power input Vref can also connect the drain electrode of the first transistor M that is positioned at last row of last column, the drain electrode that is positioned at the first transistor of the first row first row can also connect earth terminal.
Concrete, as shown in Figure 5, the input end grounding of the R1 of the first row, the output termination direct-flow input signal Vref of the Rn that n is capable, a kind of like this ramp signal circuit for generating of structure can form acclivity waveform signal.It drives signal can adopt signal as shown in Figure 3 equally, and the course of work can be divided into transmission of signal and two processes of collection signal equally, and principle of work and decline ramp signal circuit for generating are as shown in Figure 2 similar, and only voltage is in the process of rising.
The signal simulation situation of a kind of like this output signal Vo of ramp signal circuit for generating can be as shown in Figure 6, from simulation result, at the output VoR1 of the first row of GOA1, between two high level, completed the collection of a complete acclivity signal, in signal simulation figure, show, the ramp signal circuit for generating that the embodiment of the present invention provides can produce an acclivity waveform with good linear.
Similar with the decline ramp signal circuit for generating shown in Fig. 2, in the ramp signal circuit for generating shown in Fig. 5, wherein, dropping resistor R can make of conductive materials such as ITO, bonding line between every two row connects can adopt the making of metallic conduction material, although the resistance of metal is less, but still can there is certain bonding line resistance, in order to obtain having the ramp signal of good linear, in embodiments of the present invention, from the first row to last column, the resistance of adjacent two row dropping resistor R can increase by bonding line resistance is equivalent, can form like this decline ramp signal that the linearity is higher.In the process of practical application, the value that the resistance of adjacent two row dropping resistor R increases can obtain according to panel technique in fact used.Concrete grammar can, referring to previous embodiment, repeat no more herein.
In the above-described embodiments, be all to take the explanation that the first transistor M and transistor seconds T carry out as N-type transistor as example.In addition, the ramp signal circuit for generating that the embodiment of the present invention provides can also be for P type TFT.When the first transistor M and transistor seconds T are P transistor npn npn, corresponding decline ramp signal circuit for generating and acclivity signal generating circuit figure are respectively as shown in accompanying drawing 7,8, Fig. 9 is for driving the corresponding circuit timing diagram of the ramp signal circuit for generating as shown in Fig. 7 or Fig. 8, corresponding principle can, with reference to the explanation of the above-mentioned ramp signal circuit for generating about N-type TFT structure, repeat no more herein.
The component units of the ramp signal circuit for generating of a kind of like this structure that the embodiment of the present invention provides is less, and circuit level is high, can effectively reduce the area of ramp signal circuit for generating.In addition, compared with prior art, a kind of like this ramp signal circuit for generating of structure has higher sample frequency, thereby can effectively improve the linearity of ramp signal.
Further, in above-mentioned ramp signal circuit for generating, the driving force of output end vo institute output signal of considering collecting unit 14 is limited, therefore can amplifying unit 15 be additionally set in inside or the outside of ramp signal circuit for generating, the input end of this amplifying unit 15 can connect the output end vo of collecting unit 14, for the voltage of collecting unit 14 outputs is carried out to power amplification.
For example, in ramp signal circuit for generating as shown in Figure 2, amplifying unit 15 specifically can adopt power amplifier or other to have the circuit of identical function, and the present invention does not limit this.
Being also advantageous in that of the ramp signal circuit for generating that the embodiment of the present invention provides, the resistance matrix structure that contains cabling by setting is carried out the collection of ramp signal, the type of drive of GOA2 only needs simple scanning, in addition the circuit structure of GOA2 is relatively simple, and the area of whole circuit is also relatively little.
The embodiment of the present invention also provides a kind of ramp signal generator, comprises ramp signal circuit for generating as above.
Like this ramp signal generator can be separately or with other combination of devices as a signal source, be widely used in the various devices or circuit structure that need to carry out ramp signal driving.Wherein, the structure of ramp signal circuit for generating has been done detailed description in the aforementioned embodiment, does not repeat herein.
The ramp signal generator that the embodiment of the present invention provides, comprise ramp signal circuit for generating, this circuit adopts the design of two shift register cells, pressure drop unit and collecting units, by different Timing Signal Designs, make the driving to pressure drop unit and collecting unit respectively of two shift register cells, realize the first shift register control pressure drop unit the voltage of power input input is carried out step by step to lower voltage continuously, the second shift register control collecting unit gathers and exports the continually varying voltage of pressure drop unit output simultaneously.A kind of like this component units of ramp signal circuit for generating of structure is less, and circuit level is high, can effectively reduce the area of ramp signal circuit for generating.In addition, compared with prior art, a kind of like this ramp signal circuit for generating of structure has higher sample frequency, thereby can effectively improve the linearity of ramp signal.
The ramp signal circuit for generating that the embodiment of the present invention provides can also be applied to the array base-plate structure in display panel.Wherein, in prior art, in array base palte, adopt the circuit structures that comprise the first shift register and the second shift register more.
Wherein, the first shift register and the second shift register are respectively used to viewing area pixel cell input grid line scan signals or data line sweep signal.Adopt a kind of like this picture element array structure can effectively reduce the peripheral wiring of display device, realize the narrow frame design of display device.
Further, this array base palte can also comprise ramp signal circuit for generating as above, and wherein, this ramp signal circuit for generating specifically comprises:
Pressure drop unit and collecting unit;
Pressure drop unit connects respectively power input and earth terminal;
The first shift register is connected with pressure drop unit, for controlling pressure drop unit, the voltage of power input input is carried out step by step to lower voltage continuously;
Collecting unit has output terminal, and connects pressure drop unit;
The second shift register is connected with collecting unit, for controlling collecting unit, the continually varying voltage of pressure drop unit output is gathered and is exported.
The array base palte that adopts a kind of like this structure, by pressure drop unit and collecting unit are integrated on array base palte, and utilizes existing two shift registers on array base palte, thereby forms ramp signal circuit for generating.So, on the surface of array base palte, without additionally setting up a large amount of elements, can realize ramp signal generating function, thereby can effectively control the area of display panel, drive circuit, guarantee that display device can realize the design of narrow frame.
Wherein, the structure of ramp signal circuit for generating has been done detailed description in the aforementioned embodiment, does not repeat herein.
The array base palte that the embodiment of the present invention provides, comprise ramp signal circuit for generating, this ramp signal circuit for generating adopts two shift register cells, the design of pressure drop unit and collecting unit, by different Timing Signal Designs, make the driving to pressure drop unit and collecting unit respectively of two shift register cells, realize the first shift register control pressure drop unit the voltage of power input input is carried out step by step to lower voltage continuously, the second shift register control collecting unit gathers and exports the continually varying voltage of pressure drop unit output simultaneously.A kind of like this component units of ramp signal circuit for generating of structure is less, and circuit level is high, can effectively reduce the area of ramp signal circuit for generating.In addition, compared with prior art, a kind of like this ramp signal circuit for generating of structure has higher sample frequency, thereby can effectively improve the linearity of ramp signal.
The display device that the embodiment of the present invention provides, comprises array base palte as above.
It should be noted that, display device provided by the present invention can be: any product or parts with Presentation Function such as liquid crystal panel, Electronic Paper, oled panel, LCD TV, liquid crystal display, digital album (digital photo frame), mobile phone, panel computer.
Wherein, the structure of array base palte has been done detailed description in the aforementioned embodiment, repeats no more herein.
A kind of like this display device of structure, comprise array base palte, this array base palte comprises ramp signal circuit for generating, this ramp signal circuit for generating adopts two shift register cells, the design of pressure drop unit and collecting unit, by different Timing Signal Designs, make the driving to pressure drop unit and collecting unit respectively of two shift register cells, realize the first shift register control pressure drop unit the voltage of power input input is carried out step by step to lower voltage continuously, the second shift register control collecting unit gathers and exports the continually varying voltage of pressure drop unit output simultaneously.A kind of like this component units of ramp signal circuit for generating of structure is less, and circuit level is high, can effectively reduce the area of ramp signal circuit for generating.In addition, compared with prior art, a kind of like this ramp signal circuit for generating of structure has higher sample frequency, thereby can effectively improve the linearity of ramp signal.
One of ordinary skill in the art will appreciate that: all or part of flow process that realizes said method embodiment can complete by the relevant hardware of computer program instructions, aforesaid program can be stored in a computer read/write memory medium, this program, when carrying out, is carried out the step that comprises said method embodiment; And aforesaid storage medium comprises: various media that can be program code stored such as ROM, RAM, magnetic disc or CDs.
The above; be only the specific embodiment of the present invention, but protection scope of the present invention is not limited to this, is anyly familiar with those skilled in the art in the technical scope that the present invention discloses; can expect easily changing or replacing, within all should being encompassed in protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection domain of described claim.
Claims (11)
1. a ramp signal circuit for generating, is characterized in that, comprising:
The first shift register, the second shift register, pressure drop unit and collecting unit;
Described pressure drop unit connects respectively power input and earth terminal;
Described the first shift register is connected with described pressure drop unit, for controlling described pressure drop unit, the voltage of described power input input is carried out step by step to lower voltage continuously;
Described collecting unit has output terminal, and described collecting unit connects described pressure drop unit;
Described the second shift register is connected with described collecting unit, for controlling described collecting unit, the continually varying voltage of described pressure drop unit output is gathered and is exported.
2. ramp signal circuit for generating according to claim 1, is characterized in that, described pressure drop unit comprises: be a plurality of the first transistors that matrix form is arranged;
The grid that is positioned at the described the first transistor of same a line is all connected with an output terminal of described the first shift register;
Be positioned at first being extremely all connected with an input end of described collecting unit of described the first transistor of same row;
Be positioned at the second utmost point series connection of the described the first transistor of same a line, and be positioned at second being extremely all in series with second utmost point of the described the first transistor of its next line first row of described the first transistor of any last row of a line;
In the described the first transistor of series connection, between second utmost point of any two adjacent described the first transistors, be all in series with dropping resistor.
3. ramp signal circuit for generating according to claim 2, is characterized in that, described collecting unit comprises: a plurality of transistor secondses;
The grid of described transistor seconds connects respectively the different output terminals of described the second shift register, and first of described transistor seconds extremely all connects the output terminal of described collecting unit;
Described in each, second utmost point of transistor seconds is connected with first utmost point that is positioned at the described the first transistor of same row.
4. ramp signal circuit for generating according to claim 3, is characterized in that,
Described the first transistor and described transistor seconds are N-type transistor, or described the first transistor and described transistor seconds are P transistor npn npn;
When described the first transistor and described transistor seconds are N-type transistor, transistorized first very source electrode, second very drain.
5. ramp signal circuit for generating according to claim 2, is characterized in that,
Described power input connects second utmost point of the described the first transistor that is positioned at the first row first row, and second utmost point that is positioned at the described the first transistor of last row of last column connects described earth terminal; Or,
Described power input connects second utmost point of the described the first transistor that is positioned at last row of last column, and second utmost point that is positioned at the described the first transistor of the first row first row connects described earth terminal.
6. ramp signal circuit for generating according to claim 5, is characterized in that,
The resistance of described dropping resistor that is series at same a line is identical;
And work as second utmost point that described power input connects the described the first transistor that is positioned at the first row first row, when second utmost point that is positioned at the described the first transistor of last row of last column connects described earth terminal, from the first row to last column, the resistance equal proportion of dropping resistor reduces described in adjacent two row;
When described power input connects second utmost point of the described the first transistor that is positioned at last row of last column, when second utmost point that is positioned at the described the first transistor of the first row first row connects described earth terminal, from the first row to last column, the resistance equal proportion of dropping resistor increases described in adjacent two row.
7. ramp signal circuit for generating according to claim 2, is characterized in that,
The input end of described the first shift register connects respectively the first clock signal, second clock signal and the first frame start signal, for opening line by line described the first transistor;
The input end of described the second shift register connects respectively the 3rd clock signal, the 4th clock signal and the second frame start signal, for at a line the first transistor in the unlatching cycle, control the voltage that described collecting unit gathers first utmost point of the first transistor described in each by column.
8. according to the arbitrary described ramp signal circuit for generating of claim 1-7, it is characterized in that, described ramp signal circuit for generating also comprises:
Amplifying unit, the input end of described amplifying unit connects the output terminal of described collecting unit, for the voltage of described collecting unit output is carried out to power amplification.
9. a ramp signal generator, is characterized in that, comprises the ramp signal circuit for generating as described in as arbitrary in claim 1-8.
10. an array base palte, comprising: the first shift register and the second shift register, it is characterized in that, and described array base palte also comprises the ramp signal circuit for generating as described in as arbitrary in claim 1-8, described ramp signal circuit for generating comprises:
Pressure drop unit and collecting unit;
Described pressure drop unit connects respectively power input and earth terminal;
Described the first shift register is connected with described pressure drop unit, for controlling described pressure drop unit, the voltage of described power input input is carried out step by step to lower voltage continuously;
Described collecting unit has output terminal, and connects described pressure drop unit;
Described the second shift register is connected with described collecting unit, for controlling described collecting unit, the continually varying voltage of described pressure drop unit output is gathered and is exported.
11. 1 kinds of display device, is characterized in that, comprise array base palte as claimed in claim 10.
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| CN201310703124.1A CN103714773B (en) | 2013-12-19 | 2013-12-19 | Ramp generator and signal generator, array substrate and display unit |
| PCT/CN2014/076268 WO2015089970A1 (en) | 2013-12-19 | 2014-04-25 | Ramp signal generation circuit and operation method therefor, ramp signal generator, array substrate and display device |
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| CN201310703124.1A CN103714773B (en) | 2013-12-19 | 2013-12-19 | Ramp generator and signal generator, array substrate and display unit |
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| CN108667293A (en) * | 2018-07-09 | 2018-10-16 | 成都信息工程大学 | A kind of secondary slope compensation circuit suitable for current-mode BUCK converters |
| CN109147704A (en) * | 2018-09-28 | 2019-01-04 | 合肥鑫晟光电科技有限公司 | Shift register cell, gate driving circuit, display device and driving method |
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| WO2015089970A1 (en) | 2015-06-25 |
| CN103714773B (en) | 2016-06-01 |
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