CN103712720B - Capacitance pressure transducer, and inertial sensor integrated device and forming method thereof - Google Patents

Capacitance pressure transducer, and inertial sensor integrated device and forming method thereof Download PDF

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CN103712720B
CN103712720B CN201410005181.7A CN201410005181A CN103712720B CN 103712720 B CN103712720 B CN 103712720B CN 201410005181 A CN201410005181 A CN 201410005181A CN 103712720 B CN103712720 B CN 103712720B
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layer
inertial sensor
conductive layer
semiconductor substrate
pressure transducer
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CN103712720A (en
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季锋
范伟宏
闻永祥
刘琛
饶晓俊
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Hangzhou Silan Integrated Circuit Co Ltd
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Hangzhou Silan Integrated Circuit Co Ltd
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Abstract

The invention provides a kind of capacitance pressure transducer, and inertial sensor integrated device and forming method thereof, this device comprises: Semiconductor substrate; Cover the epitaxial loayer of this Semiconductor substrate, in the Semiconductor substrate in the pressure sensor area below this epitaxial loayer, there is cavity; Be positioned at the first medium layer on epitaxial loayer; Be positioned at the first conductive layer on first medium layer; Be positioned at the second dielectric layer on the first conductive layer; Be positioned at the second conductive layer in second dielectric layer, the second conductive layer above cavity is patterned into multiple capacitor plate arranged side by side, and second conductive layer in inertial sensor region is patterned into movable mass; Be positioned at the electrode layer on the second conductive layer, the electrode layer of pressure sensor area is patterned into pressure transducer wiring, and the electrode layer in inertial sensor region is patterned into inertial sensor pressure point district.Capacitance pressure transducer, and inertial sensor are integrated in same device by the present invention, and make chip area less, cost is lower.

Description

Capacitance pressure transducer, and inertial sensor integrated device and forming method thereof
Technical field
The present invention relates to MEMS sensor technical field, particularly relate to a kind of capacitance pressure transducer, and inertial sensor integrated device and forming method thereof.
Background technology
Pressure transducer the earliest comes across 1962, along with the development of MEMS (micro electro mechanical system) (MEMS) technology and reaching its maturity of silicon micro-machining technology, make sensitive element microminiaturized, achieve mass, cost degradation that pressure transducer is produced, establish its leading position in field of pressure measurement.Particularly Bosch utilizes the pressure transducer of APSM porous epitaxial silicon technology manufacture to have the advantages such as precision is high, size is little, represents the higher level that current pressure transducer manufactures.
Inertial sensor comprises gyroscope, acceierometer sensor, velograph and their single, double, three axles and combines Inertial Measurement Unit (IMU) etc.Within 1991, capacitance microaccelerator is succeeded in developing, and within 1998, gyroscope is succeeded in developing, and these devices have a wide range of applications in inertia measurement field of mechanisms and as the basic original paper of inertial navigation.The inertial sensor produced based on MEMS technology have volume little, lightweight, low in energy consumption, can be mass-produced, the series of advantages such as cost is low, reliability is high, be widely used in productive life field.
Along with the development of science and technology, the demand of MEMS technology miniaturization is more and more stronger.How pressure transducer and inertial sensor are integrated in one chip, are called a problem demanding prompt solution.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of capacitance pressure transducer, and inertial sensor integrated device and forming method thereof, capacitance pressure transducer, and inertial sensor is integrated in same device, and make chip area less, cost is lower.
For solving the problems of the technologies described above, the invention provides a kind of capacitance pressure transducer, and inertial sensor integrated device, comprising:
Semiconductor substrate, comprises pressure sensor area arranged side by side and inertial sensor region;
Cover the epitaxial loayer of this Semiconductor substrate, in the Semiconductor substrate in the pressure sensor area below this epitaxial loayer, there is cavity;
Be positioned at the first medium layer on described epitaxial loayer;
Be positioned at the first conductive layer on described first medium layer, first conductive layer in described inertial sensor region is patterned into inertial sensor wiring;
Be positioned at the second dielectric layer on described first conductive layer;
Be positioned at the second conductive layer in described second dielectric layer, the second conductive layer above described cavity is patterned into multiple capacitor plate arranged side by side, and second conductive layer in described inertial sensor region is patterned into movable mass;
Be positioned at the electrode layer on described second conductive layer, the electrode layer of described pressure sensor area is patterned into pressure transducer wiring, and the electrode layer in described inertial sensor region is patterned into inertial sensor pressure point district;
Wherein, the first medium layer above described cavity, the first conductive layer and second dielectric layer have window, and the first medium layer below the space around described movable mass and second dielectric layer have window.
According to one embodiment of present invention, the material of described epitaxial loayer is monocrystalline silicon.
According to one embodiment of present invention, the material of described first medium layer and second dielectric layer is monox.
According to one embodiment of present invention, the material of described first conductive layer and the second conductive layer is polysilicon.
Present invention also offers a kind of formation method of capacitance pressure transducer, and inertial sensor integrated device, comprising:
There is provided Semiconductor substrate, this Semiconductor substrate comprises pressure sensor area arranged side by side and inertial sensor region;
Porous silicon layer is formed in the Semiconductor substrate of described pressure sensor area;
Use hydrogen annealing process that described porous silicon layer is moved, and use epitaxy technique to form epitaxial loayer at described semiconductor substrate surface, described porous silicon layer is converted into cavity after described hydrogen annealing process and epitaxy technique;
Form first medium layer on said epitaxial layer there;
Described first medium layer form the first conductive layer and carries out graphically to this first conductive layer, to be removed by the first conductive layer above described cavity, and first conducting layer figure in described inertial sensor region being turned to inertial sensor wiring;
Form second dielectric layer, the second conductive layer and electrode layer successively;
Carry out graphically to described electrode layer, the electrode layer of described pressure sensor area is patterned into pressure transducer wiring, the electrode layer in described inertial sensor region is patterned into inertial sensor pressure point district;
Carry out graphically to described second conductive layer, so that the second conducting layer figure above described cavity is turned to multiple capacitor plate arranged side by side, and second conducting layer figure in described inertial sensor region is turned to movable mass;
By the space around described capacitor plate and movable mass, described first medium layer and second dielectric layer are corroded, first medium layer above described cavity and second dielectric layer are removed, the first medium layer below the space around described movable mass and second dielectric layer are removed.
According to one embodiment of present invention, in the Semiconductor substrate of described pressure sensor area, form porous silicon layer to comprise:
Implanting p-type ion in the Semiconductor substrate of described pressure sensor area, to form P type doped layer;
Carry out galvanic corrosion to the Semiconductor substrate of described P type doped layer and below thereof, to form porous silicon layer, this porous silicon layer comprises upper strata porous silicon layer and is positioned at the lower floor's porous silicon layer below this upper strata porous silicon layer.
According to one embodiment of present invention, at HF and C 2h 5in the mixed solution of OH, galvanic corrosion is carried out to the Semiconductor substrate of described P type doped layer and below thereof.
According to one embodiment of present invention, in the Semiconductor substrate of described pressure sensor area, implanting p-type ion comprises:
Form mask layer on the semiconductor substrate;
Carry out graphically to described mask layer, inject window to be formed in the position of described cavity;
With the mask layer after graphical for mask, P type ion implantation is carried out to described Semiconductor substrate.
According to one embodiment of present invention, described mask layer is rhythmo structure, and comprise silicon oxide layer and be positioned at the silicon nitride layer on this silicon oxide layer, the thickness of this silicon oxide layer is the thickness of this silicon nitride layer is .
According to one embodiment of present invention, described mask layer is graphically comprised:
Described silicon nitride layer forms photoresist layer;
Formed on described photoresist layer by litho developing process and inject window, the position of this injection window corresponds to the position of described cavity;
Utilize the photoresist layer to be graphically mask, described silicon nitride layer and silicon oxide layer are etched, the silicon nitride layer in described injection window ranges and silicon oxide layer etching are removed;
By described graphical after photoresist layer remove.
According to one embodiment of present invention, carrying out corroding the technique used to described first medium layer and second dielectric layer by the space around described capacitor plate and movable mass is HF gas phase fumigation process.
According to one embodiment of present invention, the material of described epitaxial loayer is monocrystalline silicon.
According to one embodiment of present invention, the material of described first medium layer and second dielectric layer is monox.
According to one embodiment of present invention, the material of described first conductive layer and the second conductive layer is polysilicon.
According to one embodiment of present invention, the material of described second conductive layer is polysilicon, and the formation method of this second conductive layer comprises:
Described second dielectric layer deposits seed polysilicon layer;
Described second conductive layer is formed at described seed polysilicon layer Epitaxial growth.
Compared with prior art, the present invention has the following advantages:
In the integrated device of the embodiment of the present invention, the cavity of capacitance pressure transducer, embeds in Semiconductor substrate, epitaxial loayer film above cavity is as the movable diaphragm of capacitance pressure transducer, first conducting layer figure turns to inertial sensor wiring, second conducting layer figure turns to the capacitor plate of capacitance pressure transducer, and the movable mass of inertial sensor, thus capacitance pressure transducer, and inertial sensor are integrated in same chip, be conducive to reducing chip area, reduce costs.
In the formation method of the integrated device of the embodiment of the present invention, galvanic corrosion is adopted to form porous silicon layer, formed the cavity of capacitance pressure transducer, by hydrogen annealing, epitaxy technique, this cavity is positioned at epitaxial loayer (movable diaphragm as capacitance pressure transducer) below and directly embeds Semiconductor substrate; Inertial sensor adopts surface processing technique to be formed, the movable mass of inertial sensor and the capacitor plate of capacitance pressure transducer, can pass through graphically obtaining the second conductive layer, thus define capacitance pressure transducer, and inertial sensor in same technological process.In addition, this formation method can be compatible with CMOS processing technology, without the need to special configuration production line, can be conveniently used in large-scale production.
Accompanying drawing explanation
Fig. 1 is the schematic flow sheet of the capacitance pressure transducer, of the embodiment of the present invention and the formation method of inertial sensor integrated device;
Fig. 2 to Figure 18 is the cross-sectional view that in the capacitance pressure transducer, of the embodiment of the present invention and the formation method of inertial sensor integrated device, each step is corresponding.
Embodiment
Below in conjunction with specific embodiments and the drawings, the invention will be further described, but should not limit the scope of the invention with this.
With reference to figure 1, the capacitance pressure transducer, of the present embodiment and the formation method of inertial sensor integrated device comprise the steps:
Step S11, provides Semiconductor substrate, and this Semiconductor substrate comprises pressure sensor area arranged side by side and inertial sensor region;
Step S12, forms porous silicon layer in the Semiconductor substrate of described pressure sensor area;
Step S13, uses hydrogen annealing process that described porous silicon layer is moved, and uses epitaxy technique to form epitaxial loayer at described semiconductor substrate surface, and described porous silicon layer is converted into cavity after described hydrogen annealing process and epitaxy technique;
Step S14, forms first medium layer on said epitaxial layer there;
Step S15, described first medium layer forms the first conductive layer and carries out graphically to this first conductive layer, to be removed by the first conductive layer above described cavity, and first conducting layer figure in described inertial sensor region is turned to inertial sensor wiring;
Step S16, forms second dielectric layer, the second conductive layer and electrode layer successively;
Step S17, carries out graphically to described electrode layer, the electrode layer of described pressure sensor area is patterned into pressure transducer wiring, the electrode layer in described inertial sensor region is patterned into inertial sensor pressure point district;
Step S18, carries out graphically to described second conductive layer, so that the second conducting layer figure above described cavity is turned to multiple capacitor plate arranged side by side, and second conducting layer figure in described inertial sensor region is turned to movable mass;
Step S19, by the space around described capacitor plate and movable mass, described first medium layer and second dielectric layer are corroded, first medium layer above described cavity and second dielectric layer are removed, the first medium layer below the space around described movable mass and second dielectric layer are removed.
Be described in detail below with reference to Fig. 2 to Figure 18.
With reference to figure 2, provide Semiconductor substrate 100, this Semiconductor substrate 100 can be divided into pressure sensor area arranged side by side and inertial sensor region, and the arrangement mode in two regions can do suitable adjustment.As a nonrestrictive example, in the present embodiment, side, the left side is pressure sensor area, and side, the right is inertial sensor region.This Semiconductor substrate 100 can be such as highly doped silicon chip, but is not limited to this.
Afterwards, form mask layer on a semiconductor substrate 100, as a nonrestrictive example, this mask layer can be rhythmo structure, comprises monox (SiO 2) layer 101 and silicon nitride (Si 3n 4) layer 102.The thickness of this silicon oxide layer 101 is such as about left and right, its formation method can be thermal oxidation method.The thickness of this silicon nitride layer 102 is about such as its formation method can be low-pressure chemical vapor deposition (LPVD).
With reference to figure 3, silicon nitride layer 102 is formed photoresist layer 103, the thickness of this photoresist layer 103 can be such as 1 μm-3 μm, can be formed on photoresist layer 103 by litho developing process afterwards and inject window A, the position of this injection window A corresponds to the position of the cavity of capacitance pressure transducer.
With reference to figure 4, utilize the photoresist layer to be graphically mask, silicon nitride layer 102 and silicon oxide layer 101 are etched, the silicon nitride layer 102 injected within the scope of window A and silicon oxide layer 101 etching are removed.Photoresist layer after graphical can be removed afterwards, such as, can adopt dry method O 2photoresist layer is removed by plasma or wet method.
With reference to figure 5, P type ion implantation is carried out to the Semiconductor substrate 100 injected within the scope of window A, inject ion and be preferably boron ion, to form P type doped layer 104.After ion implantation, can also anneal.This P type doped layer 104 is positioned at the surface portion injecting window A scope Semiconductor substrate 100.
With reference to figure 6, to this P type doped layer 104(Fig. 5) and the Semiconductor substrate 100 of below carry out galvanic corrosion, to form porous silicon layer, this porous silicon layer comprises upper strata porous silicon layer 105 and lower floor's porous silicon layer 106.Wherein, the position residing for upper strata porous silicon layer 105 and P type doped layer 104(Fig. 5) position roughly corresponding, lower floor's porous silicon layer 106 is positioned at below upper strata porous silicon layer 105.
As a nonrestrictive example, can at HF and C 2h 5galvanic corrosion is carried out, to form this porous silicon layer in the mixed solution of OH.
Afterwards, silicon nitride layer 102 and silicon oxide layer 101(can be shown in Fig. 5) remove, such as can use HF and C 2h 5the mixed solution of OH or H 3pO 4solution removes.
With reference to figure 7, use hydrogen annealing process that porous silicon layer is moved, and use epitaxy technique to form epitaxial loayer 107 on Semiconductor substrate 100 surface, after hydrogen annealing process and epitaxy technique, this upper strata porous silicon layer and lower floor's porous silicon layer are converted into cavity 100a.Namely epitaxial loayer 107 above cavity 100a can be used as the movable diaphragm of capacitance pressure transducer.
As a nonrestrictive example, this hydrogen annealing process can be carried out in epitaxial furnace.The material of this epitaxial loayer 107 can be monocrystalline silicon, is preferably the monocrystalline silicon of P type doping.
It should be noted that, first the present embodiment carries out P type ion implantation, and then form double-deck porous silicon layer by galvanic corrosion, form cavity 100a via hydrogen annealing and epitaxy technique more afterwards, the cavity 100a formed like this has good pattern.Certainly, it will be appreciated by those skilled in the art that and also can not do P type ion implantation, directly formed the porous silicon layer of single layer structure by galvanic corrosion, then also can form cavity 100a via hydrogen annealing and epitaxy technique.
With reference to figure 8, form first medium layer 108 on the surface of epitaxial loayer 107.As a nonrestrictive example, the material of this first medium layer 108 can be monox (SiO 2), its thickness can be 2 ~ 3 μm, and its formation method can be chemical vapor deposition.
With reference to figure 9, carry out graphically to the first medium layer 108 formed, form the connecting hole B of the movable diaphragm of capacitance pressure transducer.Specifically, photoresist layer can be formed on the surface of first medium layer 108, then after photoetching development, first medium layer 108 be etched, thus form connecting hole B on first medium layer 108, afterwards photoresist layer is removed.This connecting hole B can be positioned at the side of cavity 100a.
With reference to Figure 10, form the first conductive layer 110, this first conductive layer 110 covers first medium layer 108 and fills connecting hole B(sees Fig. 9).As a nonrestrictive example, the material of this first medium layer 108 can be polysilicon, and be preferably the polysilicon of P type doping, its thickness is about 1 μm, and its formation method can be chemical vapor deposition.
With reference to Figure 11, carry out graphically, the first conductive layer 110 be positioned at above cavity 100a being removed to this first conductive layer 110, and first conductive layer 110 in inertial sensor region is patterned into inertial sensor wiring.Furthermore, can form photoresist layer on the first conductive layer 110, the thickness of this photoresist layer can be such as 1 μm ~ 3 μm; Then by photoetching and etching technics, the first conductive layer 110 is carried out graphically.Dry method O can be adopted afterwards 2photoresist layer is removed by plasma or wet method.
With reference to Figure 12, form second dielectric layer 112, the first medium layer 108 that this second dielectric layer 112 covers the first conductive layer 110 and exposes.As a nonrestrictive example, the material of this second dielectric layer 112 can be monox, and its thickness can be 2 ~ 3 μm.
With reference to Figure 13, carry out graphically to second dielectric layer 112, form the through hole C of capacitance pressure transducer, and the contact hole D of inertial sensor.More specifically, can form photoresist layer in second dielectric layer 112, the thickness of this photoresist layer can be 1 μm ~ 3 μm; The through hole C of capacitance pressure transducer, and the contact hole D of inertial sensor is formed by photoetching and etching technics; Then dry method O is adopted 2plasma or wet method remove photoresist layer.
With reference to Figure 14, form the second conductive layer 114, this second conductive layer 114 covers second dielectric layer 110 and filling vias C and contact hole D(is shown in Figure 13).The material of this second conductive layer 114 can be polysilicon, and its formation method is preferably: first in patterned second dielectric layer 112, deposit seed polysilicon layer, and then epitaxial growth forms the second conductive layer 114 of polysilicon material.
With reference to Figure 15, form electrode layer 115 on the second conductive layer 114 surface.As a nonrestrictive example, the material of this electrode layer 115 can be aluminium, and its thickness is about 1 μm, and its formation method can be sputtering sedimentation.Certainly, it will be appreciated by those skilled in the art that the material of this electrode layer 115 can also be other suitable conductive materials.
With reference to Figure 16, carry out graphically to electrode layer 115, mineralization pressure sensor wiring and inertial sensor pressure point district.Such as, can form photoresist layer on electrode layer 115, the thickness of this photoresist layer can be 1 μm ~ 3 μm; Carry out graphically by photoetching and etching process to electrode layer 115 afterwards, form inertial sensor pressure point district and pressure transducer wiring; Dry method O can be adopted afterwards 2plasma removes photoresist layer.
With reference to Figure 17, carry out graphically, forming multiple capacitor plate 114a arranged side by side and movable mass 114b to the second conductive layer 114.Such as, can form photoresist layer on the electrode layer 115 after graphical and the second conductive layer 114, the thickness of photoresist layer can be 1 μm ~ 3 μm; Afterwards by photoetching and deep etching, form the capacitor plate 114a of capacitance pressure transducer, and the movable mass 114b of inertial sensor; Adopt dry method O afterwards 2plasma removes photoresist layer.After etching, around each capacitor plate 114a and movable mass 114b, there is space.
With reference to Figure 18, by the space around capacitor plate 114a and movable mass 114b, the first medium layer 108 exposed and second dielectric layer 112 are corroded, first medium layer 108 above cavity 100a and second dielectric layer 112 are removed, the first medium layer 108 below space around movable mass 114b and second dielectric layer 112 are removed.As a preferred embodiment, HF gas phase fumigation process can be adopted to corrode first medium layer 108 and second dielectric layer 112.
Still with reference to Figure 18, so far, the capacitance pressure transducer, that the present embodiment is formed and inertial sensor integrated device comprise: Semiconductor substrate 100, and it comprises pressure sensor area arranged side by side and inertial sensor region; Epitaxial loayer 107, is positioned in Semiconductor substrate 100, in pressure sensor area, has cavity 100a in the Semiconductor substrate 100 below this epitaxial loayer 107; First medium layer 108, be positioned on epitaxial loayer 107, this first medium layer 107 is positioned at the part above cavity 100a and the part be positioned at around movable mass 114b below space is removed rear formation window, this first medium layer 107 can also be formed with the connecting hole of movable diaphragm; First conductive layer 110, being positioned on first medium layer 108 and filling the connecting hole of this movable diaphragm, first conductive layer 110 in inertial sensor region is patterned into inertial sensor wiring, and the first conductive layer 110 above cavity 100a is removed rear formation window; Second dielectric layer 112, be positioned on the first conductive layer 110, this second dielectric layer 112 is positioned at the part above cavity 100a and the part be positioned at around movable mass 114b below space is removed rear formation window, and the contact hole D(of through hole C and inertial sensor that this second dielectric layer 112 can also be formed with pressure transducer is shown in Figure 13); Second conductive layer 114, to be positioned in second dielectric layer 112 and filling vias C and contact hole D, the second conductive layer 114 above cavity 100a is patterned into multiple capacitor plate 114a arranged side by side, and second conductive layer 114 in inertial sensor region is patterned into movable mass 114b; Electrode layer 115, is positioned on the second conductive layer 114, and the electrode layer 115 of pressure sensor area is patterned into pressure transducer wiring, and the electrode layer 115 in inertial sensor region is patterned into inertial sensor pressure point district.
Wherein, the material of epitaxial loayer 107 can be monocrystalline silicon; The material of first medium layer 108 and second dielectric layer 112 can be monox; The material of the first conductive layer 110 and the second conductive layer 114 can be polysilicon; The material of electrode layer 115 can be aluminium.But, it will be appreciated by those skilled in the art that the material of these retes is not limited to this, according to actual needs, also can be replaced by other suitable materials.
About the more information of this capacitance pressure transducer, and inertial sensor integrated device, please refer to the associated description about the formation method of capacitance pressure transducer, and inertial sensor integrated device in previous embodiment, repeat no more here.
To sum up, the technical scheme of the present embodiment has following beneficial effect:
1. capacitance pressure transducer, and inertial sensor are integrated in same chip by Porous Silicon Technology and surface treatment by the present embodiment, go in various suitable system, complete the detection to acceleration or angular velocity and each parameter of pressure;
2. the technical scheme of the present embodiment has the advantage of surface micromachined, chip after processing is convenient to encapsulation, have that size is little, cost is low, the advantage such as highly sensitive, good stability, and this formation method and CMOS production line are compatible, for not needing special configuration production line during large-scale production.
The above is only preferred embodiment of the present invention, not does any pro forma restriction to the present invention.Therefore, every content not departing from technical solution of the present invention, just according to technical spirit of the present invention to any simple amendment made for any of the above embodiments, equivalent conversion, all still belong in the protection domain of technical solution of the present invention.

Claims (15)

1. capacitance pressure transducer, and an inertial sensor integrated device, is characterized in that, comprising:
Semiconductor substrate, comprises pressure sensor area arranged side by side and inertial sensor region;
Cover the epitaxial loayer of this Semiconductor substrate, in the Semiconductor substrate in the pressure sensor area below this epitaxial loayer, there is cavity;
Be positioned at the first medium layer on described epitaxial loayer;
Be positioned at the first conductive layer on described first medium layer, first conductive layer in described inertial sensor region is patterned into inertial sensor wiring;
Be positioned at the second dielectric layer on described first conductive layer;
Be positioned at the second conductive layer in described second dielectric layer, the second conductive layer above described cavity is patterned into multiple capacitor plate arranged side by side, and second conductive layer in described inertial sensor region is patterned into movable mass;
Be positioned at the electrode layer on described second conductive layer, the electrode layer of described pressure sensor area is patterned into pressure transducer wiring, and the electrode layer in described inertial sensor region is patterned into inertial sensor pressure point district;
Wherein, the first medium layer above described cavity, the first conductive layer and second dielectric layer have window, and the first medium layer below the space around described movable mass and second dielectric layer have window.
2. capacitance pressure transducer, according to claim 1 and inertial sensor integrated device, is characterized in that, the material of described epitaxial loayer is monocrystalline silicon.
3. capacitance pressure transducer, according to claim 1 and inertial sensor integrated device, is characterized in that, the material of described first medium layer and second dielectric layer is monox.
4. capacitance pressure transducer, according to claim 1 and inertial sensor integrated device, is characterized in that, the material of described first conductive layer and the second conductive layer is polysilicon.
5. a formation method for capacitance pressure transducer, and inertial sensor integrated device, is characterized in that, comprising:
There is provided Semiconductor substrate, this Semiconductor substrate comprises pressure sensor area arranged side by side and inertial sensor region;
Porous silicon layer is formed in the Semiconductor substrate of described pressure sensor area;
Use hydrogen annealing process that described porous silicon layer is moved, and use epitaxy technique to form epitaxial loayer at described semiconductor substrate surface, described porous silicon layer is converted into cavity after described hydrogen annealing process and epitaxy technique;
Form first medium layer on said epitaxial layer there;
Described first medium layer form the first conductive layer and carries out graphically to this first conductive layer, to be removed by the first conductive layer above described cavity, and first conducting layer figure in described inertial sensor region being turned to inertial sensor wiring;
Form second dielectric layer, the second conductive layer and electrode layer successively;
Carry out graphically to described electrode layer, the electrode layer of described pressure sensor area is patterned into pressure transducer wiring, the electrode layer in described inertial sensor region is patterned into inertial sensor pressure point district;
Carry out graphically to described second conductive layer, so that the second conducting layer figure above described cavity is turned to multiple capacitor plate arranged side by side, and second conducting layer figure in described inertial sensor region is turned to movable mass;
By the space around described capacitor plate and movable mass, described first medium layer and second dielectric layer are corroded, first medium layer above described cavity and second dielectric layer are removed, the first medium layer below the space around described movable mass and second dielectric layer are removed.
6. formation method according to claim 5, is characterized in that, forms porous silicon layer and comprise in the Semiconductor substrate of described pressure sensor area:
Implanting p-type ion in the Semiconductor substrate of described pressure sensor area, to form P type doped layer;
Carry out galvanic corrosion to the Semiconductor substrate of described P type doped layer and below thereof, to form porous silicon layer, this porous silicon layer comprises upper strata porous silicon layer and is positioned at the lower floor's porous silicon layer below this upper strata porous silicon layer.
7. formation method according to claim 6, is characterized in that, at HF and C 2h 5in the mixed solution of OH, galvanic corrosion is carried out to the Semiconductor substrate of described P type doped layer and below thereof.
8. formation method according to claim 6, is characterized in that, in the Semiconductor substrate of described pressure sensor area, implanting p-type ion comprises:
Form mask layer on the semiconductor substrate;
Carry out graphically to described mask layer, inject window to be formed in the position of described cavity;
With the mask layer after graphical for mask, P type ion implantation is carried out to described Semiconductor substrate.
9. formation method according to claim 8, is characterized in that, described mask layer is rhythmo structure, and comprise silicon oxide layer and be positioned at the silicon nitride layer on this silicon oxide layer, the thickness of this silicon oxide layer is the thickness of this silicon nitride layer is
10. formation method according to claim 9, is characterized in that, graphically comprises described mask layer:
Described silicon nitride layer forms photoresist layer;
Formed on described photoresist layer by litho developing process and inject window, the position of this injection window corresponds to the position of described cavity;
Utilize the photoresist layer to be graphically mask, described silicon nitride layer and silicon oxide layer are etched, the silicon nitride layer in described injection window ranges and silicon oxide layer etching are removed;
By described graphical after photoresist layer remove.
11. formation methods according to claim 5, is characterized in that, carrying out corroding the technique used to described first medium layer and second dielectric layer by the space around described capacitor plate and movable mass is HF gas phase fumigation process.
12. formation methods according to claim 5, is characterized in that, the material of described epitaxial loayer is monocrystalline silicon.
13. formation methods according to claim 5, is characterized in that, the material of described first medium layer and second dielectric layer is monox.
14. formation methods according to claim 5, is characterized in that, the material of described first conductive layer and the second conductive layer is polysilicon.
15. formation methods according to claim 5, it is characterized in that, the material of described second conductive layer is polysilicon, the formation method of this second conductive layer comprises:
Described second dielectric layer deposits seed polysilicon layer;
Described second conductive layer is formed at described seed polysilicon layer Epitaxial growth.
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