CN102303844B - MEMS (micro electro mechanical system) apparatus and forming method thereof - Google Patents

MEMS (micro electro mechanical system) apparatus and forming method thereof Download PDF

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CN102303844B
CN102303844B CN201110233506.3A CN201110233506A CN102303844B CN 102303844 B CN102303844 B CN 102303844B CN 201110233506 A CN201110233506 A CN 201110233506A CN 102303844 B CN102303844 B CN 102303844B
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polysilicon
silicon layer
unformed silicon
mems device
substrate
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CN102303844A (en
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郑晨焱
张挺
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Shanghai Advanced Semiconductor Manufacturing Co Ltd
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Shanghai Advanced Semiconductor Manufacturing Co Ltd
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Abstract

The invention provides an MEMS (micro electro mechanical system) apparatus and a forming method thereof. The forming method comprises the following steps: providing a substrate on which a groove is formed; depositing polycrystalline silicon or an amorphous silicon layer which is used for filling the groove to realize the sealing process and cover the surface of the substrate; patterning the polycrystalline silicon or amorphous silicon layer covered on the substrate surface so as to form a pattern of a semiconductor apparatus. The invention can improve the reliability of the filling, simplify the process flow and reduce the cost.

Description

MEMS device and forming method thereof
Technical field
The present invention relates to MEMS device and MEMS technology, relate in particular to a kind of MEMS device and forming method thereof.
Background technology
Along with the development of MEMS (MEMS) technology, MEMS device is widely used, as microsensor, micromachine and other micromodule equipments.Compared with conventional art, MEMS device has that volume is little, price is low, high reliability.
In the manufacture process of MEMS device, often need in substrate, form multiple grooves, then form cavity in channel bottom etching, finally in the groove forming before, fill the materials such as silica and seal.On the one hand the fillibility of the packing materials such as silica poor, than the corrosion that is easier to be subject to multiple solution, gas, the reliability of device is caused to potential threat; On the other hand, prior art, in the time forming semiconductor devices, as resistance etc. that square resistance is had certain requirements, often need to form extra semiconductor layer and adulterate by Implantation or diffusion in substrate.Adopt the advantage of ion implantation technology to be to obtain the repeated injection of different kinds of ions, then after high temperature (generally exceeding 1000 degrees Celsius) annealing, form effectively doping.But the method is comparatively complicated, and the cost of ion implantation technology is very high, the uniformity of the doping ion distribution after injection and the injection degree of depth are all subject to larger restriction.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of MEMS device and forming method thereof, improves reliability the simplification of flowsheet of filling, and reduces costs.
For solving the problems of the technologies described above, the invention provides a kind of formation method of MEMS device, comprising:
Substrate is provided, in described substrate, is formed with groove;
Deposit spathic silicon or unformed silicon layer, described polysilicon or unformed silicon layer are filled described groove to realize sealing process, and cover the surface of described substrate;
The polysilicon or the unformed silicon layer that cover on described substrate surface are carried out graphically, to form the figure of the semiconductor devices being used in conjunction with described MEMS device.
Alternatively, in the described polysilicon of deposition or unformed silicon layer, also pass into reacting gas so that described polysilicon or unformed silicon layer are adulterated.
Alternatively, described reacting gas is boracic or phosphorous or containing arsenic or containing the gas of antimony.
Alternatively, described the polysilicon or the unformed silicon layer that cover on described substrate surface are carried out graphically, forming the figure of semiconductor devices comprises: the polysilicon or the unformed silicon layer that cover on described substrate surface are carried out graphically, with form resistance figure, inductance coil figure, capacitor plate figure, be similar to good conductor ampere wires figure one of them or be combined.
Alternatively, before deposit spathic silicon or unformed silicon layer, also comprise: the substrate of described channel bottom is carried out to etching to form cavity in described substrate, and described groove is communicated with described cavity.
Alternatively, after deposit spathic silicon or unformed silicon layer, to cover polysilicon on described substrate surface or unformed silicon layer carry out graphical before or after, also comprise described polysilicon or unformed silicon layer annealed.
Alternatively, use chemical vapour deposition (CVD), low-pressure chemical vapor deposition or ald to form described polysilicon or unformed silicon layer.
The present invention also provides a kind of MEMS device, comprising:
Substrate, is formed with groove in described substrate;
Fill polysilicon or the unformed silicon layer of described groove;
Be positioned at the figure of the semiconductor devices on described substrate surface, the material of the figure of described semiconductor devices is polysilicon or unformed silicon.
Alternatively, in the figure of described polysilicon or unformed silicon layer and semiconductor devices, there is doping ion.
Alternatively, described doping ion is boron ion or phosphonium ion or arsenic ion or antimony ion.
Alternatively, the figure of described semiconductor devices comprise figure, the capacitor plate of figure, the inductance coil of resistance figure, be similar to figure one of them or any combination of the ampere wires of good conductor.
Alternatively, be also formed with cavity in the substrate of described beneath trenches, described groove is communicated with described cavity.
Compared with prior art, the present invention has the following advantages:
In MEMS device of the embodiment of the present invention and forming method thereof, adopt polysilicon or unformed silicon to fill suprabasil groove, realize the sealing process of MEMS device with polysilicon or unformed silicon.Polysilicon or unformed silicon have good fillibility, in the time filling the groove of high-aspect-ratio, have good performance, and more reliable and more stable compared with the packing material such as polysilicon or unformed silicon and conventional silica, are conducive to improve the reliability of MEMS device.
Further, in the formation method of the MEMS device of the embodiment of the present invention, can also adopt polysilicon or the unformed silicon layer of doping to fill suprabasil groove, afterwards the part polysilicon or the unformed silicon layer that cover on substrate surface are carried out graphically, form the figure of semiconductor devices, as resistance, capacitor plate, inductance coil, be similar to the ampere wires of good conductor etc., carry out filling groove and form semiconductor devices with same layer polysilicon or unformed silicon layer, having simplified technique.And realize doping by passing into reacting gas when deposit spathic silicon or the unformed silicon layer in the present embodiment, and compared with Implantation, its technique is simpler, cost is lower, and doping content is more even, and the degree of depth of doping is unrestricted.
Accompanying drawing explanation
Fig. 1 is the schematic flow sheet of the formation method of the MEMS device of the embodiment of the present invention;
Fig. 2 to Fig. 5 is the cross-sectional view of each step of the formation method of the MEMS device of first embodiment of the invention;
Fig. 6 to Fig. 8 is the cross-sectional view of each step of the formation method of the MEMS device of second embodiment of the invention.
The specific embodiment
The MEMS device of prior art often adopts the materials such as silica to fill, and its fillibility is poor and be subject to the erosion of external environment, causes potential integrity problem.In addition, the technique that forms integrated semiconductor devices in prior art in MEMS device is comparatively complicated, and cost is higher.
In MEMS device of the embodiment of the present invention and forming method thereof, adopt polysilicon or unformed silicon to fill suprabasil groove, polysilicon or unformed silicon have good fillibility, in the time filling the groove of high-aspect-ratio, there is good performance, and polysilicon or unformed silicon are more reliable and more stable compared with the packing materials such as conventional silica, be conducive to improve the reliability of MEMS device.
Further, in the formation method of the MEMS device of the embodiment of the present invention, can also adopt polysilicon or the unformed silicon layer of doping to fill suprabasil groove, afterwards the part polysilicon or the unformed silicon layer that cover on substrate surface are carried out graphically, form the figure that is integrated in the semiconductor devices in MEMS device, as resistance, capacitor plate, inductance coil, be similar to the ampere wires of good conductor etc., also carry out filling groove and form semiconductor devices with same layer polysilicon or unformed silicon layer, thereby having simplified technique.And realize doping by passing into reacting gas when deposit spathic silicon or the unformed silicon layer in the present embodiment, and compared with Implantation, its technique is simpler, cost is lower, and doping content is more even, and the degree of depth of doping is unrestricted.
Below in conjunction with specific embodiments and the drawings, the invention will be further described, but should not limit the scope of the invention with this.
Fig. 1 is the schematic flow sheet of the MEMS device formation method of the embodiment of the present invention, comprising:
Step S11, provides substrate, in described substrate, is formed with groove;
Step S12, deposit spathic silicon or unformed silicon layer, described polysilicon or unformed silicon layer are filled described groove to realize sealing process, and cover the surface of described substrate;
Step S13, carries out graphically the polysilicon or the unformed silicon layer that cover on described substrate surface, to form the figure of the semiconductor devices being used in conjunction with described MEMS device.
Fig. 2 to Fig. 5 shows the cross-sectional view of each step in first embodiment of the invention, below in conjunction with Fig. 1 and Fig. 2 to Fig. 5, the first embodiment is described in detail.
In conjunction with Fig. 1 and Fig. 2, execution step S11, provides substrate 101, is formed with groove 102 in substrate 101.The quantity of groove 102 can be one or more, has by the separated part 103 of groove 102 between adjacent trenches 102.Fig. 2 is only signal, and in other specific embodiments, the shape of groove 102 can be the spill figure of any type, and for example its sidewall can tilt with bottom.
Wherein, substrate 101 can be various types of Semiconductor substrate, as silicon substrate, germanium silicon substrate, III-V group element compound substrate, or well known to a person skilled in the art that other can be used for the substrate type of MEMS technique.
In conjunction with Fig. 1 and Fig. 3, execution step S22, deposit spathic silicon or unformed silicon layer 104, polysilicon or unformed silicon layer 104 filling grooves to be to realize sealing process, and cover the surface of substrate 101.Concrete, can adopt chemical vapour deposition (CVD) (CVD), low-pressure chemical vapor deposition (LPCVD) or ald (ALD) to form polysilicon or unformed silicon layer 104.In the present embodiment, in deposit spathic silicon or unformed silicon layer 104, also in the reaction chamber of deposition, passing into reacting gas adulterates to the polysilicon or the unformed silicon layer 104 that form, this reacting gas can be the gas that contains P type doping ion or N-type doping ion, as boracic or phosphorous or containing arsenic or containing the gas of antimony.Concrete, in the present embodiment, adopt LPCVD to form polysilicon or unformed silicon layer 104, in deposit spathic silicon or unformed silicon layer 104, in the reactant gas source of LPCVD, pass into appropriate borine, by controlling the temperature of ratio, flow and substrate 101 of borine, can form polysilicon or the unformed silicon layer 104 with different resistivity, and according to the actual needs, can select follow-up annealing process.Certainly, in other specific embodiments, also can not adulterate to polysilicon or unformed silicon layer 104, polysilicon or unformed silicon layer 104 are non-doping.
In conjunction with Fig. 1 and Fig. 3, execution step S13, carries out graphically covering the lip-deep polysilicon of substrate 101 or unformed silicon layer, to form the figure 106 of the semiconductor devices being used in conjunction with described MEMS device.Patterned process to polysilicon or unformed silicon layer can comprise the technique such as photoetching, etching.In the present embodiment, also polysilicon or the unformed silicon layer of groove top are carried out to planarization, form the polysilicon or the unformed silicon layer 105 that are filled in groove, it has the function of filling and electric isolation.In the present embodiment, polysilicon layer or unformed silicon adulterate, and the figure 106 of semiconductor devices can be figure one of them or any combination of the figure of the figure of the figure of resistance, inductance coil, capacitor plate, the ampere wires that is similar to good conductor.In the present embodiment, the figure 106 of semiconductor devices is specially the figure of resistance.
Polysilicon or unformed silicon layer are carried out graphical before or after, can also anneal to this polysilicon or unformed silicon layer, to obtain the electrical parameter of suitable square resistance/resistivity and to form stable polysilicon.
In other specific embodiments, if polysilicon or unformed silicon layer are non-doping, the figure 106 of semiconductor devices can be the figure of resistance so, can regulate by controlling length, the width etc. of figure 106 of semiconductor devices in graphical process the size of the resistance (resistance is larger conventionally) of formation.
Afterwards with reference to Figure 4 and 5, form electrode 107 at the two ends of the figure 106 of resistance, to be drawn, thereby can form resistor network.In one embodiment, in MEMS device, can comprise pressure sensor, acceleration transducer etc., this resistor network can be as the adjusting of output resistance, so that system integration when practical application.In other specific embodiments, if the figure of semiconductor devices 106 is figures of capacitor plate, dielectric layer and metal level can also be formed successively so thereon, to form electric capacity.
So far, the structure of the MEMS device providing in the first embodiment as shown in Figure 4, comprising: substrate 101, is formed with groove on it; Be filled in polysilicon or unformed silicon layer 105 in groove; The figure 106 of semiconductor devices, is positioned on the surface of substrate 101, and its material is polysilicon or unformed silicon.Be filled in the figure 106 of polysilicon in groove or unformed silicon layer 105 and semiconductor devices and can there is doping ion, as boron ion, phosphonium ion etc.The figure 106 of semiconductor devices can be figure, the capacitor plate of figure, the inductance coil of resistance figure, be similar to figure one of them or any combination of the ampere wires of good conductor.The figure 106 of semiconductor devices can be used as the semiconductor devices being integrated in MEMS device, as electric capacity, inductance etc. in the output matching resistance of various sensors, peripheral circuit.
Fig. 6 to Fig. 8 shows the cross-sectional view of each step of the formation method of MEMS device in the second embodiment, below in conjunction with Fig. 6 to Fig. 8, the second embodiment is elaborated.
With reference to figure 6, first substrate 201 is provided, in substrate 201, be formed with groove 203, between adjacent trenches 203, have by the separated part 204 of groove.In addition, in the present embodiment, also the substrate 201 to groove 203 bottoms is carried out etching and is formed cavity 202, and cavity 202 is communicated with groove 203.Cavity 202 can be as the cavity in the devices such as pressure sensor, acceleration transducer in MEMS device.
With reference to figure 7, deposit spathic silicon or unformed silicon layer 205 are filled groove, form the cavity 202 of sealing, and polysilicon or unformed silicon layer 205 also cover the surface of substrate 201 in addition.The formation method of polysilicon or unformed silicon layer 205 can be CVD, LPCVD, ALD etc., can pass into reacting gas so that the polysilicon or the unformed silicon layer 205 that form are adulterated in deposition process.Concrete, in the present embodiment, use LPCVD to form polysilicon or unformed silicon layer 205, and introduce phosphorous gas material simultaneously, doping content can regulate by kind, content and the flow of the phosphorous gas material introduced in deposition process, after deposition, can also anneal to polysilicon or the unformed silicon layer 205 of formation.Certainly,, in other specific embodiments, also can polysilicon or unformed silicon layer 205 not adulterated or be annealed.
Afterwards with reference to figure 8, remove unnecessary polysilicon or the unformed silicon layer in groove top, formation is filled in polysilicon or the unformed silicon layer 206 in groove, and the polysilicon or the unformed silicon layer that cover in substrate 201 are carried out graphically, form the figure 207 of semiconductor devices, as the figure of the figure of the figure of resistance, capacitor plate, inductance coil, be similar to figure one of them or any combination of the ampere wires of good conductor.
To polysilicon or unformed silicon layer carry out graphical before or after, can also anneal to described polysilicon or unformed silicon layer, to obtain the electrical parameter of suitable square resistance/resistivity and to form stable polysilicon.
So far, the MEMS device providing in the second embodiment as shown in Figure 8, comprising: substrate 201, is formed with groove in substrate 201; Be filled in polysilicon or unformed silicon layer 206 in groove; Be positioned at the figure 207 of the semiconductor devices on substrate surface, its material is polysilicon or unformed silicon.Be filled in the figure 207 of polysilicon in groove or unformed silicon layer 206 and semiconductor devices and can there is doping ion, as boron ion, phosphonium ion, arsenic ion, antimony ion etc.The figure 207 of semiconductor devices can be figure, the capacitor plate of figure, the inductance coil of resistance figure, be similar to figure one of them or any combination of the ampere wires of good conductor.In the present embodiment, in the substrate 201 of beneath trenches, be also formed with cavity 202, this cavity 202 and groove are communicated with.
To sum up, in the present embodiment, the figure of semiconductor devices is that the polysilicon or the unformed silicon layer that while utilizing filling groove, form form, and can realize doping and not need to carry out extra Implantation by introducing reacting gas when deposit spathic silicon or the unformed silicon layer, its technique is comparatively simple, be conducive to reduce costs, and the uniformity of doping is better, and different from ion implantation technology, its doping depth is also unrestricted.
Although the present invention with preferred embodiment openly as above; but it is not for limiting the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; can make possible variation and modification, therefore protection scope of the present invention should be as the criterion with the scope that the claims in the present invention were defined.

Claims (10)

1. a formation method for MEMS device, is characterized in that, comprising:
Substrate is provided, in described substrate, is formed with groove;
The substrate of described channel bottom is carried out to etching to form cavity in described substrate, and described groove is communicated with described cavity;
Deposit spathic silicon or unformed silicon layer, described polysilicon or unformed silicon layer are filled described groove to realize sealing process, and cover the surface of described substrate;
The polysilicon or the unformed silicon layer that cover on described substrate surface are carried out graphically, to form the figure of the semiconductor devices being used in conjunction with described MEMS device.
2. the formation method of MEMS device according to claim 1, is characterized in that, in the described polysilicon of deposition or unformed silicon layer, also passes into reacting gas so that described polysilicon or unformed silicon layer are adulterated.
3. the formation method of MEMS device according to claim 2, is characterized in that, described reacting gas is boracic or phosphorous or containing the gas of arsenic or antimony.
4. the formation method of MEMS device according to claim 2, it is characterized in that, described the polysilicon or the unformed silicon layer that cover on described substrate surface are carried out graphically, forming the figure of semiconductor devices comprises: the polysilicon or the unformed silicon layer that cover on described substrate surface are carried out graphically, with form resistance figure, inductance coil figure, capacitor plate figure, be similar to good conductor ampere wires figure one of them or be combined.
5. the formation method of MEMS device according to claim 1, it is characterized in that, after deposit spathic silicon or unformed silicon layer, to cover polysilicon on described substrate surface or unformed silicon layer carry out graphical before or after, also comprise described polysilicon or unformed silicon layer are annealed, to obtain the electrical parameter of suitable square resistance/resistivity and to form stable polysilicon.
6. the formation method of MEMS device according to claim 1, is characterized in that, uses chemical vapour deposition (CVD), low-pressure chemical vapor deposition or ald to form described polysilicon or unformed silicon layer.
7. a MEMS device, is characterized in that, comprising:
Substrate, is formed with groove in described substrate, is also formed with cavity in the substrate of described beneath trenches, and described groove is communicated with described cavity;
Fill polysilicon or the unformed silicon layer of described groove;
Be positioned at the figure of the semiconductor devices on described substrate surface, the material of the figure of described semiconductor devices is polysilicon or unformed silicon.
8. MEMS device according to claim 7, is characterized in that, in the figure of described polysilicon or unformed silicon layer and semiconductor devices, has doping ion.
9. MEMS device according to claim 8, is characterized in that, described doping ion is boron ion or phosphonium ion or arsenic ion or antimony ion.
10. MEMS device according to claim 8, is characterized in that, the figure of described semiconductor devices comprise figure, the capacitor plate of the figure of resistance, inductance coil figure, be similar to figure one of them or any combination of the ampere wires of good conductor.
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* Cited by examiner, † Cited by third party
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JP2014086447A (en) * 2012-10-19 2014-05-12 Seiko Epson Corp Electronic apparatus and manufacturing method of the same
CN103449358A (en) * 2013-08-27 2013-12-18 上海先进半导体制造股份有限公司 Manufacturing method of closed cavity of micro-electromechanical system (MEMS)
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CN105092137B (en) * 2014-05-21 2017-12-05 中芯国际集成电路制造(上海)有限公司 A kind of MEMS pressure sensor and preparation method thereof
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1289142A (en) * 1999-09-21 2001-03-28 国际商业机器公司 Optimized penetrance injection for simutaneously forming silicon-metal compacitor
US6495294B1 (en) * 1999-10-28 2002-12-17 Denso Corporation Method for manufacturing semiconductor substrate having an epitaxial film in the trench
CN1945796A (en) * 2005-10-06 2007-04-11 株式会社上睦可 Manufacturing method of semiconductor substrate
CN101090169A (en) * 2006-06-16 2007-12-19 北京大学 Implementing method for interconnected structure of RF MEMS switch
JP2009224606A (en) * 2008-03-17 2009-10-01 Shin Etsu Handotai Co Ltd Manufacturing method of semiconductor element having superjunction structure
CN101937927A (en) * 2009-07-01 2011-01-05 上海先进半导体制造股份有限公司 Deep groove super PN junction structure and manufacturing method thereof
CN102110593A (en) * 2010-12-15 2011-06-29 无锡中微晶园电子有限公司 Method for improving stability of polysilicon thin-film resistor

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4670915B2 (en) * 2008-08-08 2011-04-13 ソニー株式会社 Semiconductor device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1289142A (en) * 1999-09-21 2001-03-28 国际商业机器公司 Optimized penetrance injection for simutaneously forming silicon-metal compacitor
US6495294B1 (en) * 1999-10-28 2002-12-17 Denso Corporation Method for manufacturing semiconductor substrate having an epitaxial film in the trench
CN1945796A (en) * 2005-10-06 2007-04-11 株式会社上睦可 Manufacturing method of semiconductor substrate
CN101090169A (en) * 2006-06-16 2007-12-19 北京大学 Implementing method for interconnected structure of RF MEMS switch
JP2009224606A (en) * 2008-03-17 2009-10-01 Shin Etsu Handotai Co Ltd Manufacturing method of semiconductor element having superjunction structure
CN101937927A (en) * 2009-07-01 2011-01-05 上海先进半导体制造股份有限公司 Deep groove super PN junction structure and manufacturing method thereof
CN102110593A (en) * 2010-12-15 2011-06-29 无锡中微晶园电子有限公司 Method for improving stability of polysilicon thin-film resistor

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