CN103681320B - The manufacture method of germanium-silicon heterojunction bipolar triode device - Google Patents
The manufacture method of germanium-silicon heterojunction bipolar triode device Download PDFInfo
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- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 title claims abstract description 58
- 238000000034 method Methods 0.000 title claims abstract description 42
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 22
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 86
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 73
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 65
- 239000010703 silicon Substances 0.000 claims abstract description 65
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 40
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 40
- 239000001301 oxygen Substances 0.000 claims abstract description 40
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 35
- 229920005591 polysilicon Polymers 0.000 claims abstract description 26
- 239000013078 crystal Substances 0.000 claims abstract description 16
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 14
- 229910052732 germanium Inorganic materials 0.000 claims abstract description 13
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims abstract description 13
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 12
- 238000001312 dry etching Methods 0.000 claims abstract description 11
- 238000004140 cleaning Methods 0.000 claims abstract description 10
- 238000001259 photo etching Methods 0.000 claims abstract description 10
- 238000000151 deposition Methods 0.000 claims abstract description 7
- 239000000428 dust Substances 0.000 claims abstract description 7
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims abstract description 7
- 238000005530 etching Methods 0.000 claims abstract description 6
- 210000003323 beak Anatomy 0.000 claims abstract description 5
- 239000000377 silicon dioxide Substances 0.000 claims description 36
- 150000002500 ions Chemical class 0.000 claims description 33
- 238000000407 epitaxy Methods 0.000 claims description 26
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 24
- 238000002955 isolation Methods 0.000 claims description 23
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 20
- 230000003647 oxidation Effects 0.000 claims description 17
- 238000007254 oxidation reaction Methods 0.000 claims description 17
- 238000002347 injection Methods 0.000 claims description 14
- 239000007924 injection Substances 0.000 claims description 14
- 238000002513 implantation Methods 0.000 claims description 12
- 238000005468 ion implantation Methods 0.000 claims description 12
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 9
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 9
- 229910052796 boron Inorganic materials 0.000 claims description 9
- 239000012535 impurity Substances 0.000 claims description 9
- 229910052698 phosphorus Inorganic materials 0.000 claims description 9
- 239000011574 phosphorus Substances 0.000 claims description 9
- 229920002120 photoresistant polymer Polymers 0.000 claims description 9
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 6
- 229910052785 arsenic Inorganic materials 0.000 claims description 6
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 6
- 238000000137 annealing Methods 0.000 claims description 5
- 238000001039 wet etching Methods 0.000 claims description 5
- 229910015900 BF3 Inorganic materials 0.000 claims description 3
- WTEOIRVLGSZEPR-UHFFFAOYSA-N boron trifluoride Chemical compound FB(F)F WTEOIRVLGSZEPR-UHFFFAOYSA-N 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- 229910021332 silicide Inorganic materials 0.000 claims description 3
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims description 3
- 230000004913 activation Effects 0.000 claims description 2
- 230000008021 deposition Effects 0.000 abstract description 4
- 230000007547 defect Effects 0.000 description 3
- 230000003111 delayed effect Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 229910001423 beryllium ion Inorganic materials 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 238000002203 pretreatment Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66242—Heterojunction transistors [HBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
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- Microelectronics & Electronic Packaging (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
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Abstract
The invention discloses a kind of manufacture method of germanium-silicon heterojunction bipolar triode device, the recessed regrowth field oxide of crystal formation of etching N type epitaxial region, then silicon oxide deposition is also formed recessed lower than the field oxygen of single-crystal surface 500 ~ 1000 dust with cmp planarization; Silicon oxide deposition and unformed silicon, photoetching and the unformed silicon of dry etching open active area, base, and its window edge is positioned at an oxygen beak place, and grow germanium and silicon epitaxial after cleaning silicon face, the germanium silicon upper surface in active area and Chang Yang district flushes substantially; Deposit emitter-window medium, opens emitter-window and collector electrode active area, the heavily doped emitter-polysilicon of deposit N-type, forms EB junction and low-resistance channel.The present invention adjusts the relative altitude of an oxygen with monocrystalline silicon and the position of germanium silicon window relative field oxygen beak, and germanium si growth surface is smooth, and evenly, emitter-window size is easy to control for germanium silicon and emitter-polysilicon thickness, and germanium silicium HBT device property is stablized.
Description
Technical field
The present invention relates to semiconductor integrated circuit field, belong to a kind of manufacture method of germanium-silicon heterojunction bipolar triode device especially.
Background technology
In the germanium-silicon heterojunction bipolar triode technique of routine, after n type buried layer 1 ', n type buried layer 2 ', low-doped n type extension 3 ' and collector terminal 4 ' complete, raw long field oxide 6 ' or with shallow slot as isolation, deposit one deck silica and one deck amorphous silicon subsequently, photoetching and dry etching amorphous silicon open active area, base; Wet method is removed the silica that exposes and is cleaned silicon face, and carry out the growth of germanium silicon epitaxial layer 9 ', the germanium silicon epitaxial layer of growing single-crystal structure on active area, base, other region is then polysilicon structure.Subsequent technique comprises dry quarter successively and removes the polysilicon of collector terminal 4 ' and the polysilicon of perimeter, outer base area, deposit medium also photoetching and dry quarter opens emitter-window and collector terminal, deposit N-type heavily doped polysilicon, the emitter-polysilicon 12 ' that emitter-window place is formed contacts with Ge-Si crystal silicon and forms EB junction, N-type heavily doped polysilicon contacts with N-type heavy doping collector region monocrystalline silicon (i.e. collector terminal 4 ') and forms low-resistance exit, resulting devices just defines, the sectional view of device architecture as shown in Figure 1, silica and amorphous si-layer can be left in outer base area.
In germanium-silicon heterojunction bipolar triode, Ge-Si heterojunction is the core of device, owing to introducing the unformed silicon of one deck, in order to the defect formed when reducing germanium silicon growth needs to adopt the high temperature pre-treatment higher than 900 degree in follow-up germanium and silicon epitaxial layer growth, and at high temperature unformed silicon can crystallization again, make device surface pattern very coarse, cause subsequent technique to affect by this and there will be the problems such as such as photoetching cannot be aimed at, defect increases, base-collector junction junction leakage, technique are unstable.But for comprise except germanium silicium HBT, also have other devices manufacturing process in, amorphous silicon is used to protect other devices and necessary, is optimized by isolation structure and selects the position of active area, base window edge to stablize device performance most important.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of manufacture method of germanium-silicon heterojunction bipolar triode device, the thickness evenness of germanium silicon epitaxial layer and emitter-polysilicon can be improved, reduce the defect of base, solve the junction leakage between collector electrode and base stage, improve stability and the product yield of technique.
For solving the problems of the technologies described above, the manufacture method of germanium-silicon heterojunction bipolar triode device of the present invention, comprises the following steps:
Step 1, P-type silicon substrate forms n type buried layer, and n type buried layer grows N-type epitaxy layer; Carry out N-type ion implantation, in N-type epitaxy layer, form the first ion implanted region that bottom is connected with n type buried layer, described first ion implanted region becomes collector electrode draw-out area;
Step 2, growth one deck liner oxidation silicon, deposit one deck silicon nitride on it; The region for forming field oxygen is opened in photoetching, dryly carves the silicon nitride and liner oxidation silicon of removing opened areas and the crystal formation of etching N type epitaxial loayer is recessed, in the raw long field oxide isolation of described recess;
Step 3, deposit one deck silica also carries out cmp planarization to this layer of silica, and wet method is removed silicon nitride and removed liner oxidation silicon, and the partial oxidation silicon formation field oxygen that wet method removes field oxygen isolation is recessed;
Step 4, grows a sacrificial silicon oxide layer, carries out N-type ion implantation, forms the second ion implanted region under the emitter-window of follow-up definition, and being connected with n type buried layer bottom described second ion implanted region becomes the low resistance base of collector electrode; Wet etching removes sacrificial silicon oxide layer, carries out cleaning obtain flawless monocrystalline silicon surface to silicon chip surface;
Step 5, growth one deck silica, first deposit one deck silica unformed silicon of deposit one deck again on it, photoetching and the unformed silicon of dry etching form active area, base window, the edge of active area, described base window is positioned at a beak place for oxygen isolation, and other region outside the window of active area, base retains amorphous silicon and silica;
Step 6, growth germanium silicon epitaxial layer, the germanium silicon epitaxial layer at window place, active area, base is monocrystal silicon structure, field oxygen isolation and the first ion implanted region on germanium silicon epitaxial layer be polysilicon structure;
Step 7, makes to block active area, base and outer base area with photoresist, and dry etching is removed the polysilicon of the part that is not blocked and is parked on silica, and rewetting method removes silica;
Step 8, deposit emitter-window medium, lithographic definition dry etching opens emitter-window and collector electrode draw-out area, cleaning silicon chip surface deposit N-type polycrystalline silicon, described emitter-window medium is from bottom to top for silica adds silicon nitride;
Step 9, make to block emitter and collector draw-out area with photoresist, etching is removed the polysilicon of non-occluded area and the silicon nitride of emitter-window medium and is parked on silica, makes resilient coating carry out P type ion implantation to outer base area and form injection region, outer base area with silica; Remove photoresist, deposit medium also returns formation at quarter polysilicon side wall;
Step 10, carries out thermal annealing, and the N-type impurity in emitter-polysilicon activates and diffuses to form EB junction, and the impurity activation of germanium silicon epitaxial layer and collector region also diffuses to form base-collector junction; Depositing silicide alloy-layer, adopts contact hole technique to be connected with collector electrode emitter, base stage with metal connecting line technique.
In step 1, n type buried layer is heavy doping, and injection ion is arsenic, and Implantation Energy is 30 ~ 120keV, and dosage is 10
15~ 10
16cm
-2; The impurity of N-type epitaxy layer is phosphorus, and doping content is 2 × 10
15~ 5 × 10
16cm
-3; The injection ion of the first ion implanted region is phosphorus, and Implantation Energy is 80 ~ 180keV, and dosage is 10
15~ 10
16cm
-2.
In step 1, after n type buried layer is formed, boiler tube is adopted to carry out high temperature propelling, regrowth N-type epitaxy layer.The temperature that high temperature advances is 1000 ~ 1100 DEG C, and the time is 30 ~ 120 minutes.
In step 2, the recessed degree of depth of monocrystalline of N-type epitaxy layer is 3000 ~ 8000 dusts, and the thickness of field oxygen isolation is 6000 ~ 15000 dusts, and the thickness of liner oxidation silicon is 100 ~ 300 dusts, and the thickness of silicon nitride is 1000 ~ 3000 dusts.
In step 3, the thickness of silica is 3000 ~ 8000 dusts, cmp removes the silica on silicon nitride completely, silicon oxide surface 500 ~ 1000 dusts lower than the single-crystal surface of N-type epitaxy layer of field oxygen recess, form a mono-crystalline structures in ramped shaped between the isolation of described field oxygen with N-type epitaxy layer top.
In step 4, the thickness of sacrificial oxide layer is 100 ~ 300 dusts, second ion implanted region is once injected by selective N type ion or is repeatedly injected formation, wherein once injects or repeatedly inject to have at least the injection degree of depth once injected to reach the thickness of N-type epitaxy layer.
In step 5, the unformed silicon face in the isolation of field oxygen and the single-crystal surface of N-type epitaxy layer flush.
In step 6, germanium silicon epitaxial layer is divided into silicon buffer layer, germanium silicon layer and silicon cap layer, and wherein germanium silicon layer and silicon cap layer are respectively doped with boron; The thickness of described silicon buffer layer is 100 ~ 500 dusts; The thickness of described germanium silicon layer is 200 ~ 800 dusts, wherein 20 ~ 300 dust doped with boron, and doping content is 2 × 10
19~ 6 × 10
19cm
-3; The thickness of described silicon cap layer is 200 ~ 500 dusts, and doping content is 10
15~ 10
17cm
-3; Ge-Si crystal surface on active area, base and the difference in height between the germanium policrystalline silicon surface in the isolation of field oxygen are-300 ~ 300 dusts.
In step 8, N-type polycrystalline silicon is doping in place or ion implantation doping, and Doped ions is phosphorus and/or arsenic, and concentration is greater than 10
20cm
-3.
In step 8, the oxide layer deposit N-type polycrystalline silicon again of the rear first rapid thermal oxidation growth in cleaning silicon chip surface 5 ~ 10 dusts.
In step 9, the injection ion of injection region, outer base area is boron or boron fluoride, and Implantation Energy is 5 ~ 120keV, and implantation dosage is 10
15~ 10
16cm
-2.
In step 10, the temperature of thermal annealing is 1015 ~ 1050 DEG C, and the time is 5 ~ 30 seconds, forms 300 ~ 500 dusts and gradual EB junction.
The present invention is recessed through monocrystalline silicon layer, field oxide growth, silicon oxide deposition and cmp form field oxygen isolated area, make an oxygen isolated area lower than active area, base through wet etching, a mono-crystalline structures in ramped shaped comparatively delayed is formed between active area, base and field oxygen isolated area, make germanium and silicon epitaxial edge of window along being positioned at this region, level and smooth pattern can be obtained at monocrystalline and polycrystalline junction, and by reducing the height in confronting active district of Chang Yang district, the upper surface that substantially can be flushed after germanium silicon growth, this improvement can obtain uniform germanium and silicon epitaxial layer thickness and emitter-polysilicon thickness, the better emitter-window size controlling key, thus obtain stable germanium silicium HBT device property.
Accompanying drawing explanation
Fig. 1 is the schematic cross-section of existing germanium-silicon heterojunction bipolar triode device;
Fig. 2 to Figure 16 is germanium-silicon heterojunction bipolar triode device schematic cross-section in the fabrication process in the present invention.
Embodiment
Below in conjunction with accompanying drawing and embodiment, the present invention is further detailed explanation.
The manufacture method of germanium-silicon heterojunction bipolar triode device provided by the invention, comprises the following steps:
Step 1, P-type silicon substrate 1 is formed heavily doped n type buried layer 2, n type buried layer 2 grows lightly doped N-type epitaxy layer 3, wherein the injection ion of n type buried layer 2 is upwards spread less arsenic when higher thermal expense, Implantation Energy is 30 ~ 120keV, and dosage is 10
15~ 10
16cm
-2, the impurity of N-type epitaxy layer 3 is phosphorus, and doping content is 2 × 10
15~ 5 × 10
16cm
-3; Carry out N-type ion implantation, inject the phosphorus that ion preferably at high temperature easily advances, Implantation Energy is 80 ~ 180keV, and dosage is 10
15~ 10
16cm
-2, in N-type epitaxy layer 3, form the first ion implanted region 4 that bottom is connected with n type buried layer 2, this first ion implanted region 4 becomes collector electrode draw-out area; Preferably, after n type buried layer 2 is formed, adopt boiler tube to carry out temperature is 1000 ~ 1100 DEG C, the time be 30 ~ 120 minutes high temperature advance, regrowth N-type epitaxy layer 3;
Step 2, the liner oxidation silicon of growth one deck 100 ~ 300 dust, the silicon nitride 5 of deposit one deck 1000 ~ 3000 dust on it; The region for forming field oxygen is opened in photoetching, dryly carves the silicon nitride 5 and liner oxidation silicon of removing opened areas and the crystal formation degree of depth of etching N type epitaxial loayer 3 is the recessed of 3000 ~ 8000 dusts, as shown in Figure 2;
Step 3 is the field oxygen isolation 6 of 6000 ~ 15000 dusts at described monocrystalline recess growth thickness, as shown in Figure 3;
Step 4, deposit a layer thickness is the silica of 3000 ~ 8000 dusts, and as shown in Figure 4, then carry out cmp and remove silica on silicon nitride 5 completely, wet method is removed silicon nitride 5 and also removed liner oxidation silicon, as shown in Figure 5;
Step 5, the partial oxidation silicon formation field oxygen that wet method removes field oxygen isolation 6 is recessed, silicon oxide surface 500 ~ 1000 dusts lower than the single-crystal surface of N-type epitaxy layer 3 of field oxygen recess, a mono-crystalline structures in ramped shaped comparatively delayed is formed, as shown in Figure 6 between described field oxygen isolation 6 and N-type epitaxy layer 3 top;
Step 6, grow the sacrificial silicon oxide layer of one 100 ~ 300 dusts, carry out selective N type ion implantation, form the second ion implanted region 7 11 times in the emitter-window of follow-up definition, be connected with n type buried layer 2 bottom described second ion implanted region 7 and become the low resistance base of collector electrode; Wet etching removes sacrificial silicon oxide layer, carries out cleaning obtain flawless monocrystalline silicon surface to silicon chip surface; The thin silicon oxide of regrowth one deck 30 ~ 80 dust, first deposit one deck silica unformed silicon 8 of deposit one deck again on it, as shown in Figure 7, unformed silicon 8 surface in now field oxygen isolation 6 and the single-crystal surface of N-type epitaxy layer 3 flush; Second ion implanted region 7 can be once inject or repeatedly inject, can the puncture voltage of adjusting means, wherein has at least the energy once injected will ensure to inject the thickness that the degree of depth reaches N-type epitaxy layer 3;
Step 7, photoetching and the unformed silicon of dry etching form active area, base window, and the edge of active area, described base window is positioned at a beak place for oxygen isolation 6, and other region outside the window of active area, base retains amorphous silicon and silica, as shown in Figure 8, Figure 9;
Step 8, growth germanium silicon epitaxial layer 9, the germanium silicon epitaxial layer at window place, active area, base is monocrystal silicon structure, and the germanium silicon epitaxial layer in field oxygen isolation 6 is polysilicon structure; Germanium silicon epitaxial layer 9 is divided into silicon buffer layer, germanium silicon layer and silicon cap layer, and wherein germanium silicon layer and silicon cap layer are respectively doped with boron; The thickness of described silicon buffer layer is 100 ~ 500 dusts; The thickness of described germanium silicon layer is 200 ~ 800 dusts, wherein 20 ~ 300 dust doped with boron, and doping content is 2 × 10
19~ 6 × 10
19cm
-3; The thickness of described silicon cap layer is 200 ~ 500 dusts, and doping content is 10
15~ 10
17cm
-3; The difference in height on the polycrystalline surface that the single-crystal surface of active area, base and field oxygen are isolated on 6 is-300 ~ 300 dusts, as shown in Figure 10;
Step 9, makes to block active area, base and outer base area with photoresist, and dry etching removes the polysilicon of the part that is not blocked, and rewetting method removes silica, as shown in figure 11;
Step 10, deposit emitter-window medium 10, described emitter-window medium 10 is preferably double-deck, as silica adds silicon nitride, lithographic definition dry etching opens emitter-window 11 and collector electrode draw-out area, as shown in figure 12;
Step 11, cleaning silicon chip surface also deposit N-type polycrystalline silicon, as shown in figure 13, N-type polycrystalline silicon can be doping in place also can be ion implantation doping, and Doped ions is phosphorus and/or arsenic, and concentration is greater than 10
20cm
-3; Also can the oxide layer deposit N-type polycrystalline silicon again of the rear first rapid thermal oxidation growth in cleaning silicon chip surface 5 ~ 10 dusts;
Step 12, make to block emitter and collector draw-out area with photoresist, etch the silicon nitride in the polysilicon and emitter-window medium 10 removing non-occluded area and be parked on silica, make resilient coating with silica and P type ion implantation is carried out to outer base area, as shown in figure 14, injecting ion is boron or boron fluoride, and Implantation Energy is 5 ~ 120keV, and implantation dosage is 10
15~ 10
16cm
-2, form injection region, outer base area 13;
Step 13, removes photoresist, and deposit medium also returns formation at quarter polysilicon side wall, as shown in figure 15;
Step 14, carry out thermal annealing, temperature is 1015 ~ 1050 DEG C, higher than conventional germanium silicon technology 0 ~ 20 DEG C, time is 5 ~ 30 seconds, and the N-type impurity in emitter-polysilicon 12 activates and diffuses to form the gradual EB junction that the degree of depth is 300 ~ 500 dusts, and its side is due to the optimization of silica undercut shape, its depth profiles of dopant distribution is comparatively mild, can stop the improper increase of base recombination current; The impurity of germanium silicon epitaxial layer and collector region is also activated and diffuses to form base-collector junction simultaneously;
Step 15, depositing silicide alloy-layer 14, adopts contact hole technique to be connected with collector electrode emitter, base stage with metal connecting line technique, as shown in figure 16.
The present invention is recessed through monocrystalline silicon layer, field oxide growth, silicon oxide deposition and cmp form field oxygen isolated area, make an oxygen isolated area lower than active area, base through wet etching, a mono-crystalline structures in ramped shaped comparatively delayed is formed between active area, base and field oxygen isolated area, make germanium and silicon epitaxial edge of window along being positioned at this region, level and smooth pattern can be obtained at monocrystalline and polycrystalline junction, and by reducing the height in confronting active district of Chang Yang district, the upper surface that substantially can be flushed after germanium silicon growth, this improvement can obtain uniform germanium and silicon epitaxial layer thickness and emitter-polysilicon thickness, the better emitter-window size controlling key, thus obtain stable germanium silicium HBT device property.
Above by specific embodiment to invention has been detailed description, but these are not construed as limiting the invention.Without departing from the principles of the present invention, those skilled in the art can make many distortion and improvement to the present invention, and these also should be considered as protection scope of the present invention.
Claims (13)
1. a manufacture method for germanium-silicon heterojunction bipolar triode device, is characterized in that, comprises the following steps:
Step 1, P-type silicon substrate (1) is formed n type buried layer (2), and n type buried layer (2) grows N-type epitaxy layer (3); Carry out N-type ion implantation, in N-type epitaxy layer (3), form the first ion implanted region (4) that bottom is connected with n type buried layer (2), described first ion implanted region (4) becomes collector electrode draw-out area;
Step 2, growth one deck liner oxidation silicon, deposit one deck silicon nitride (5) on it; The region for forming field oxygen is opened in photoetching, dryly carves the silicon nitride (5) and liner oxidation silicon of removing opened areas and the crystal formation of etching N type epitaxial loayer (3) is recessed, isolates (6) at the raw long field oxide of described recess;
Step 3, deposit one deck silica also carries out cmp planarization to this layer of silica, and wet method is removed silicon nitride (5) and removed liner oxidation silicon, and the partial oxidation silicon formation field oxygen that wet method removes field oxygen isolation (6) is recessed;
Step 4, grow a sacrificial silicon oxide layer, carry out N-type ion implantation, under the emitter-window (11) of follow-up definition, form the second ion implanted region (7), described second ion implanted region (7) bottom is connected with n type buried layer (2) and becomes the low resistance base of collector electrode; Wet etching removes sacrificial silicon oxide layer, carries out cleaning obtain flawless monocrystalline silicon surface to silicon chip surface;
Step 5, growth one deck silica, first deposit one deck silica unformed silicon of deposit one deck (8) again on it, photoetching and the unformed silicon of dry etching form active area, base window, the edge of active area, described base window is positioned at a beak place for oxygen isolation (6), and other region outside the window of active area, base retains amorphous silicon and silica;
Step 6, growth germanium silicon epitaxial layer (9), the germanium silicon epitaxial layer at window place, active area, base is monocrystal silicon structure, and the germanium silicon epitaxial layer on field oxygen isolation (6) and the first ion implanted region (4) is polysilicon structure;
Step 7, makes to block active area, base and outer base area with photoresist, and dry etching is removed the polysilicon of the part that is not blocked and is parked on silica, and rewetting method removes silica;
Step 8, deposit emitter-window medium (10), lithographic definition dry etching opens emitter-window (11) and collector electrode draw-out area, cleaning silicon chip surface deposit N-type polycrystalline silicon, described emitter-window medium (10) is from bottom to top for silica adds silicon nitride;
Step 9, make to block emitter and collector draw-out area with photoresist, etching is removed the polysilicon of non-occluded area and the silicon nitride of emitter-window medium (10) and is parked on silica, makes resilient coating carry out P type ion implantation to outer base area and form injection region, outer base area (13) with silica; Remove photoresist, deposit medium also returns formation at quarter polysilicon side wall;
Step 10, carries out thermal annealing, and the N-type impurity in emitter-polysilicon (12) activates and diffuses to form EB junction, and the impurity activation of germanium silicon epitaxial layer and collector region also diffuses to form base-collector junction; Depositing silicide alloy-layer, adopts contact hole technique to be connected with collector electrode emitter, base stage with metal connecting line technique.
2. the manufacture method of germanium-silicon heterojunction bipolar triode device according to claim 1, is characterized in that, in step 1, n type buried layer (2) is heavy doping, and injection ion is arsenic, and Implantation Energy is 30 ~ 120keV, and dosage is 10
15~ 10
16cm
-2; The impurity of N-type epitaxy layer (3) is phosphorus, and doping content is 2 × 10
15~ 5 × 10
16cm
-3; The injection ion of the first ion implanted region (4) is phosphorus, and Implantation Energy is 80 ~ 180keV, and dosage is 10
15~ 10
16cm
-2.
3. the manufacture method of germanium-silicon heterojunction bipolar triode device according to claim 1 and 2, is characterized in that, in step 1, adopts boiler tube to carry out high temperature propelling, regrowth N-type epitaxy layer (3) after n type buried layer (2) is formed.
4. the manufacture method of germanium-silicon heterojunction bipolar triode device according to claim 3, is characterized in that, the temperature that high temperature advances is 1000 ~ 1100 DEG C, and the time is 30 ~ 120 minutes.
5. the manufacture method of germanium-silicon heterojunction bipolar triode device according to claim 1, it is characterized in that, in step 2, the recessed degree of depth of monocrystalline of N-type epitaxy layer (3) is 3000 ~ 8000 dusts, the thickness of field oxygen isolation (6) is 6000 ~ 15000 dusts, the thickness of liner oxidation silicon is 100 ~ 300 dusts, and the thickness of silicon nitride is 1000 ~ 3000 dusts.
6. the manufacture method of germanium-silicon heterojunction bipolar triode device according to claim 1, it is characterized in that, in step 3, the thickness of silica is 3000 ~ 8000 dusts, cmp removes the silica on silicon nitride (5) completely, silicon oxide surface 500 ~ 1000 dusts lower than the single-crystal surface of N-type epitaxy layer (3) of field oxygen recess, form a mono-crystalline structures in ramped shaped between described field oxygen isolation (6) and N-type epitaxy layer (3) top.
7. the manufacture method of germanium-silicon heterojunction bipolar triode device according to claim 1, it is characterized in that, in step 4, the thickness of sacrificial oxide layer is 100 ~ 300 dusts, second ion implanted region (7) is once injected by selective N type ion or is repeatedly injected formation, wherein once injects or repeatedly inject to have at least the injection degree of depth once injected to reach the thickness of N-type epitaxy layer (3).
8. the manufacture method of germanium-silicon heterojunction bipolar triode device according to claim 1, is characterized in that, in step 5, unformed silicon (8) surface on field oxygen isolation (6) and the single-crystal surface of N-type epitaxy layer (3) flush.
9. the manufacture method of germanium-silicon heterojunction bipolar triode device according to claim 1, is characterized in that, in step 6, germanium silicon epitaxial layer (9) is divided into silicon buffer layer, germanium silicon layer and silicon cap layer, and wherein germanium silicon layer and silicon cap layer are respectively doped with boron; The thickness of described silicon buffer layer is 100 ~ 500 dusts; The thickness of described germanium silicon layer is 200 ~ 800 dusts, wherein 20 ~ 300 dust doped with boron, and doping content is 2 × 10
19~ 6 × 10
19cm
-3; The thickness of described silicon cap layer is 200 ~ 500 dusts, and doping content is 10
15~ 10
17cm
-3; Ge-Si crystal surface on active area, base and the difference in height between the germanium policrystalline silicon surface on field oxygen isolation (6) are-300 ~ 300 dusts.
10. the manufacture method of germanium-silicon heterojunction bipolar triode device according to claim 1, is characterized in that, in step 8, N-type polycrystalline silicon is doping in place or ion implantation doping, and Doped ions is phosphorus and/or arsenic, and concentration is greater than 10
20cm
-3.
The manufacture method of 11. germanium-silicon heterojunction bipolar triode device according to claim 1, is characterized in that, in step 8, and the oxide layer deposit N-type polycrystalline silicon again of the rear first rapid thermal oxidation growth in cleaning silicon chip surface 5 ~ 10 dusts.
The manufacture method of 12. germanium-silicon heterojunction bipolar triode device according to claim 1, is characterized in that, in step 9, the injection ion of injection region, outer base area (13) is boron or boron fluoride, and Implantation Energy is 5 ~ 120keV, and implantation dosage is 10
15~ 10
16cm
-2.
The manufacture method of 13. germanium-silicon heterojunction bipolar triode device according to claim 1, is characterized in that, in step 10, the temperature of thermal annealing is 1015 ~ 1050 DEG C, and the time is 5 ~ 30 seconds, forms 300 ~ 500 dusts and gradual EB junction.
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| CN102403222A (en) * | 2010-09-09 | 2012-04-04 | 上海华虹Nec电子有限公司 | Manufacturing method for silicon germanium heterojunction bipolar transistors |
| CN102412278A (en) * | 2010-09-26 | 2012-04-11 | 上海华虹Nec电子有限公司 | Vertical type PNP triode in SiGe BiCMOS process and manufacturing method thereof |
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| CN102403222A (en) * | 2010-09-09 | 2012-04-04 | 上海华虹Nec电子有限公司 | Manufacturing method for silicon germanium heterojunction bipolar transistors |
| CN102412278A (en) * | 2010-09-26 | 2012-04-11 | 上海华虹Nec电子有限公司 | Vertical type PNP triode in SiGe BiCMOS process and manufacturing method thereof |
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