CN103678056A - Method for testing control function of PCIE bus equipment - Google Patents
Method for testing control function of PCIE bus equipment Download PDFInfo
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- CN103678056A CN103678056A CN201210339772.9A CN201210339772A CN103678056A CN 103678056 A CN103678056 A CN 103678056A CN 201210339772 A CN201210339772 A CN 201210339772A CN 103678056 A CN103678056 A CN 103678056A
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- pcie bus
- bus equipment
- bus apparatus
- configuration register
- control function
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Abstract
The invention discloses a method for testing the control function of PCIE bus equipment. The method includes the steps that firstly, a configuration value of a local configuration register of the PCIE bus equipment is read; secondly, a corresponding function position of the configuration value of the configuration register is modified, and the working state of the PCIE bus equipment is changed; thirdly, the modified configuration value of the configuration register is rewritten into the local configuration register of the PCIE bus equipment; fourthly, local interruptions are set, whether the response of a drive module of the PCIE bus equipment is interrupted or not and whether the drive module enters the changed working state or not are detected, if the drive module enters the changed working state, it is determined that the control function of the PCIE bus equipment is normal, or else it is determined that the control function of the PCIE bus equipment is abnormal. By utilizing the method to detect whether the control of the PCIE bus equipment is successful or not, the number of times for utilizing a tester to conduct test is reduced, and working efficiency of test is effectively improved.
Description
Technical field
The present invention relates to satellite mobile communication system technical field, particularly a kind of PCIE bus apparatus is controlled the method for testing of function.
Background technology
PCI Express is bus interface of new generation.The interface of PCI-E is different and difference to some extent comprises X1, X4, X8 and X16 according to bus bit wide, and X2 pattern will be for internal interface but not slot pattern.PCI-E specification is connected to 32 passages from 1 passage and connects, and has very strong retractility, to meet the different demands of different system equipment to data transfer bandwidth.In addition, shorter PCI-E card can insert in longer PCI-E slot and use, and PCI-E interface can also be supported hot-swappable.250MB/ transmission speed second of PCI-E X1 can meet main flow sound effect chip, network card chip and the demand of memory device to data transfer bandwidth, and the PCI-E interface that bit wide is X16 can provide the bandwidth of 5GB/s, has replaced AGP Application of Interface.
PCI-E technical specification allows to realize X1(250MB/ second), X2, X4, X8, X12, X16 and X32 passage specification, PCI-E X1 and PCI-E X16 have become PCI-E main flow specification at present, much chipset manufacturer adds the support to PCI-E X1 in the middle of South Bridge chip simultaneously, adds the support to PCI-E X16 in the middle of north bridge chips.Remove and provide outside high data transfer bandwidth, PCI-E, because adopt serial data packet mode to transmit data, so each stitch of PCI-E interface can obtain than the more bandwidth of conventional I/O standard, can reduce PCI-E device fabrication cost and volume.In addition, PCI-E also supports high-order power management, supports hot plug, and supported data synchronous transmission, for prioritised transmission data are carried out bandwidth optimization, therefore PCIE bus is used widely.
Due to the widespread use of PCIE bus, PCIE bus apparatus is increasing, and therefore effectively PCIE bus apparatus control function test method is very important.At present, it is to send control command by application module that PCIE bus apparatus is controlled functional test, whether then use test instrument detection device makes a response to control command, and the shortcoming of this method is repeatedly to use comparatively accurate testing tool tracking equipment state, and testing efficiency is low.
Summary of the invention
The object of the present invention is to provide a kind of PCIE bus apparatus to control the method for testing of function, test PCIE bus PCIE bus apparatus is controlled to function by the inventive method, testing efficiency is high.
In order to realize foregoing invention object, the invention provides following technical scheme:
PCIE bus apparatus of the present invention is controlled the method for testing of function, comprises the following steps:
Step 1: the Configuration Values that reads the local configuration register of PCIE bus apparatus;
Step 2: revise the corresponding function position of the Configuration Values of configuration register, change the duty of PCIE bus apparatus;
Step 3: the local configuration register that the Configuration Values of amended configuration register is write again to PCIE bus apparatus;
Step 4: local interruption is set, whether the driver module that detects PCIE bus apparatus responds interruption, is incorporated to the duty after change, if driver module enters the duty after change, PCIE bus apparatus control function is normal, otherwise PCIE bus apparatus is controlled dysfunction.
compared with prior art, beneficial effect of the present invention: the inventive method is by changing the Configuration Values of the local register of PCIE bus apparatus, change the duty of PCIE bus apparatus, detect again the whether duty after changing of PCIE bus apparatus, whether the control function that judges PCIE bus apparatus is normal, simple to operate, thereby reduced the number of times that adopts exact instrument to test, effectively improved the work efficiency of test.
Accompanying drawing explanation:
Fig. 1 is that PCIE bus apparatus is controlled function test method FB(flow block).
Embodiment
Below in conjunction with test example and embodiment, the present invention is described in further detail.But this should be interpreted as to the scope of the above-mentioned theme of the present invention only limits to following embodiment, all technology realizing based on content of the present invention all belong to scope of the present invention.
With reference to figure 1, PCIE bus apparatus of the present invention is controlled the method for testing of function, comprises the following steps:
S1: driver module reads the Configuration Values of the local configuration register of PCIE bus apparatus by PCIE bus, the current residing duty of judgement PCIE bus apparatus;
S2: revise the corresponding function position of the Configuration Values of local configuration register, be about to the current duty of PCIE bus apparatus and change into: the spatial data of application module is delivered to kernel;
S3: the local configuration register that the Configuration Values of amended local configuration register is write again to PCIE bus apparatus;
S4: local interruption is set;
S5: when PCIE bus apparatus produces local interruption, whether application module detection driver module responds interrupts and carries out corresponding interruption and process, detect driver module and whether the spatial data transmission of application module is arrived to kernel, if it is PCIE bus apparatus control function is normal, otherwise PCIE bus apparatus is controlled dysfunction.
By the inventive method, detect the control function of PCIE bus to PCIE bus apparatus, testing efficiency is high, has effectively ensured the performance of PCIE bus apparatus.By to controlling the local register configuration of normally functioning PCIE bus apparatus, make PCIE bus apparatus meet user's request for utilization.
Claims (1)
1. PCIE bus apparatus is controlled a method of testing for function, it is characterized in that, the method comprises the following steps:
Step 1: the Configuration Values that reads the local configuration register of PCIE bus apparatus;
Step 2: revise the corresponding function position of the Configuration Values of configuration register, change the duty of PCIE bus apparatus;
Step 3: the local configuration register that the Configuration Values of amended configuration register is write again to PCIE bus apparatus;
Step 4: local interruption is set, whether the driver module that detects PCIE bus apparatus responds interruption, is incorporated to the duty after change, if driver module enters the duty after change, PCIE bus apparatus control function is normal, otherwise PCIE bus apparatus is controlled dysfunction.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210339772.9A CN103678056A (en) | 2012-09-14 | 2012-09-14 | Method for testing control function of PCIE bus equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210339772.9A CN103678056A (en) | 2012-09-14 | 2012-09-14 | Method for testing control function of PCIE bus equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN103678056A true CN103678056A (en) | 2014-03-26 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201210339772.9A Pending CN103678056A (en) | 2012-09-14 | 2012-09-14 | Method for testing control function of PCIE bus equipment |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108052428A (en) * | 2017-12-08 | 2018-05-18 | 郑州云海信息技术有限公司 | A kind of test method for testing PCIe card warm connection function |
| CN108228504A (en) * | 2016-12-21 | 2018-06-29 | 华为技术有限公司 | The interconnection method and PCIE device of a kind of PCIE device |
| CN109189602A (en) * | 2018-09-21 | 2019-01-11 | 郑州云海信息技术有限公司 | A kind of PCIE Slot Fault Locating Method, device and equipment |
| CN113169906A (en) * | 2018-12-12 | 2021-07-23 | 三菱电机株式会社 | Information processing apparatus, information processing method, and information processing program |
-
2012
- 2012-09-14 CN CN201210339772.9A patent/CN103678056A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108228504A (en) * | 2016-12-21 | 2018-06-29 | 华为技术有限公司 | The interconnection method and PCIE device of a kind of PCIE device |
| CN108228504B (en) * | 2016-12-21 | 2020-03-10 | 华为技术有限公司 | PCIE (peripheral component interface express) equipment and docking method thereof |
| CN108052428A (en) * | 2017-12-08 | 2018-05-18 | 郑州云海信息技术有限公司 | A kind of test method for testing PCIe card warm connection function |
| CN109189602A (en) * | 2018-09-21 | 2019-01-11 | 郑州云海信息技术有限公司 | A kind of PCIE Slot Fault Locating Method, device and equipment |
| CN113169906A (en) * | 2018-12-12 | 2021-07-23 | 三菱电机株式会社 | Information processing apparatus, information processing method, and information processing program |
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Application publication date: 20140326 |
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