CN103675347A - Accelerometer and manufacturing process thereof - Google Patents
Accelerometer and manufacturing process thereof Download PDFInfo
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- CN103675347A CN103675347A CN201210357089.8A CN201210357089A CN103675347A CN 103675347 A CN103675347 A CN 103675347A CN 201210357089 A CN201210357089 A CN 201210357089A CN 103675347 A CN103675347 A CN 103675347A
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Abstract
Disclosed is an accelerometer which includes a measurement body, and an upper cover plate silicon chip and a lower cover plate silicon chip, which are connected with the measurement body. The measurement body includes a framework, elastic beams and a mass block, which are arranged in the framework. The mass block is connected with the framework through the plurality of groups of elastic beams. Each group of elastic beam includes two elastic folding beams which are arranged symmetrically with the center line of the mass block being the axis. Cover plate silicon chips provided with electrodes are bonded on both of the upper and lower surfaces of the measurement body and capacitances are formed between the cover plate silicon chips and the measurement body. The accelerometer has the advantages of being high in measurement precision, high in stability and low in noise and the like.
Description
Technical field
The present invention relates to sensor field, relate in particular to a kind of accelerometer
Background technology
Now, accelerometer is applicable to many application, for example measure the intensity of earthquake and collect data, the impact strength while detecting car crass and the angle and direction that detects inclination in mobile phone and game machine.And in the situation that microelectromechanical systems (MEMS) technology is constantly progressive, many nano level small-sized accelerometers are extensively adopted by commercialization.
The accelerometer of conventional MEMS divides two kinds of pressure resistance type and condenser types, and piezoresistive accelerometer for example application number is 200480003916.7, within open day, is the Chinese invention patent application on March 15th, 2006.Piezoresistive accelerometer generally has semi-girder and mass to form, and force sensing resistance is arranged on semi-girder.Mass can move because of acceleration, makes semi-girder distortion, thereby causes the variation of resistance value.But in the situation that not having acceleration or acceleration amplitude more small, semi-girder can not produce huge distortion.Make resistance value there is no marked change.Only have when the amplitude of acceleration produces distortion to semi-girder greatly, this accelerometer just can detect acceleration.For this reason, this acceleration is in respect of measuring the shortcomings such as inaccurate, degree of accuracy is not high.
Capacitive accelerometer for example U.S. Patent number US6805008 is the United States Patent (USP) on October 19th, 2004 in open day, and capacitive accelerometer also comprises semi-girder and mass.When having acceleration, outside framework can be to acceleration direction motion, and due to the effect of inertia, the displacement meeting of mass is very little, mass and another interelectrode clearance distance is changed and cause the variation of electric capacity.These two kinds of accelerometers are all made by micro fabrication, have the features such as volume is little, cost is low.Yet semi-girder is elastic beam, and only have four semi-girders that four limits of mass are connected with framework.For this reason, when outside framework moves, the displacement amplitude of each semi-girder is very large.And each semi-girder can not produce identical distortion and displacement yet.Make the swing Mode Shape of this accelerometer slightly asymmetric.
Summary of the invention
Technical matters to be solved by this invention is to overcome the deficiency of above-mentioned prior art, provides a kind of swing Mode Shape symmetrical, and has the accelerometer of higher degree of accuracy, stability and reliability.
According to a kind of accelerometer provided by the present invention, comprising: the upper cover plate silicon chip and the lower cover silicon chip that measure body, are connected with described measurement body; Described measurement body comprises framework, is positioned at elastic beam and the mass of described framework; Described mass is connected by many groups of described elastic beams with described framework, and described in every group, elastic beam comprises two elastic foldable beams, and it is rotational symmetry setting that described elastic foldable beam be take the center line of described mass.
The technical solution adopted in the present invention also has following subsidiary characteristic:
Two ends of described elastic foldable beam are located along the same line.
Described mass is cuboid, and the xsect of described mass is square.
One end of described elastic foldable beam is connected with the corner of described mass respectively.
Described measurement body is epitaxial silicon on double-sided insulation body (SOI) structure, comprises upper silicon layer, intermediate silicon layers and lower silicon layer; Between every two-layer silicon layer, be respectively arranged with silicon dioxide layer.On described double-sided insulation body, epitaxial silicon structure is also referred to as two-sided soi structure.
A plurality of described elastic beams form in respectively described upper silicon layer and described lower silicon layer symmetrically, form double-decker.
On described measurement body, described upper cover plate silicon chip and described lower cover silicon chip, be respectively arranged with electrode.
Manufacturing process according to accelerometer provided by the present invention, comprises the following steps:
The first step forms a plurality of holes that are deep to intermediate silicon layers by photoetching, deep etching and etching respectively on the upper lower silicon layer of two-sided soi wafer;
Second step, amasss polysilicon to intermediate silicon layers and fills up described hole at described inner hole deposition, forms electric pathway; Then the superficial growth at the upper lower silicon layer of described two-sided soi wafer goes out silicon dioxide layer; And carry out polishing grinding;
The 3rd step forms the symmetrical elastic foldable beam of many groups by photoetching, deep etching and etching on the upper lower silicon layer of described two-sided soi wafer; And put on surface outside and grow silicon dioxide at the dew of described elastic foldable beam by high-temperature oxydation, or at the dew of described elastic beam, put deposit layer of silicon dioxide layer on surface outside by chemogenic deposit (CVD) method;
The 4th step, the silicon dioxide of dew being put in described intermediate silicon layers outside by photoetching and etching is removed, and described in deep etching intermediate silicon layers to certain depth;
The 5th step, by intermediate silicon layers between framework and mass simultaneously in the vertical direction and horizontal direction corrode, thereby form free-moving elastic beam;
The 6th step, puts described silicon dioxide etching outside by dew;
The 7th step, carries out disposable bonding by described two-sided soi wafer and lower cover silicon chip after upper cover plate silicon chip, processing.
In the manufacturing process of accelerometer provided by the invention, also further comprising the steps:
Processing technology to described upper cover plate silicon chip and lower cover silicon chip also comprises:
A, on described upper cover plate silicon chip or lower cover silicon chip, by photoetching, deep etching and etching, form a through hole;
B, on the bonding face of described upper cover plate silicon chip and described lower cover silicon chip respectively by photoetching, deep etching and be etched in depressed area of each self-forming on the bonding face of described upper cover plate silicon chip and described lower cover silicon chip;
C, with described two-sided soi wafer bonding before, described upper cover plate silicon chip and described lower cover silicon chip are cleaned;
D, with described two-sided soi wafer bonding after, depositing metal extraction electrode on the surface of described upper cover plate silicon chip, described lower cover silicon chip, by the depositing metal on the surface of described two-sided soi wafer of the described through hole on described upper cover plate silicon chip or lower cover silicon chip, and by described through hole extraction electrode.
Silicon dioxide layer in above-mentioned processing technology in the present invention plays its silicon layer covering of protection, makes it not be etched or corrode.
The method of described deep etching and described etching is one or more methods in following methods: dry etching or wet etching, described dry etching comprises: deep reaction ion etching and the reactive ion etching of silicon.The described mordant for etching silicon layer is one or more combination of following mordant: the xenon difluoride of potassium hydroxide, tetramethyl aqua ammonia, ethylenediamine phosphorus benzenediol or gaseous state.
The described mordant for corrode silicon dioxide layer is one or more combination of following mordant: the hydrogen fluoride of buffered hydrofluoric acid, 49% hydrofluorite or gaseous state.Silicon dioxide layer also can carry out dry etching removal by reactive ion etching.
According to a kind of accelerometer provided by the present invention and manufacturing process tool thereof, have the following advantages: first, by upper and lower two-layer symmetrical elastic beam is set respectively between mass and framework, make one-piece construction more symmetrical, stable.In the situation that having acceleration, the displacement amplitude of every elastic beam is also relatively little, makes to swing Mode Shape more symmetrical.
And mentioned manufacturing process has been used two-sided soi wafer and disposable three wafer bonding technology in the present invention, by elastic beam and mass that on two-sided soi wafer, corrosion forms, can aim at very accurately and height of formation symmetrical structure.The Two-layer Beam of the bonding technology manufacturing of using compared with prior art, the feature such as the accelerometer precision of this technique manufacturing is high, error is little, yield rate has also obtained larger lifting.And because etching process is comparatively simple, the production efficiency of this product processes is high, cost is also lower.
Accompanying drawing explanation
Fig. 1 is structural representation of the present invention.
Fig. 2 is the stereographic map of the measurement body in the present invention.
Fig. 3 is the vertical view of the measurement body in the present invention.
Fig. 4 is the first step to the three step schematic diagram of the manufacture method in the present invention.
Fig. 5 is the 4th step to the six step schematic diagram of the manufacture method in the present invention.
Fig. 6 is the 7th step schematic diagram of the manufacture method in the present invention.
Embodiment
Below in conjunction with accompanying drawing, the present invention is described in further detail:
With reference to Fig. 1, a kind of accelerometer, comprising: the upper cover plate silicon chip 2 and the lower cover silicon chip 3 that measure body 1, are connected with described measurement body 1; On described measurement body 1, described upper cover plate silicon chip 2 and described lower cover silicon chip 3, be respectively arranged with electrode 4; Described measurement body 1 is two-sided soi structure, comprises upper silicon layer 5, intermediate silicon layers 6 and lower silicon layer 7; Between every two-layer silicon layer, be respectively arranged with silicon dioxide layer 8.A plurality of described elastic beams 12 form in respectively described upper silicon layer 5 and described lower silicon layer 7 symmetrically.
With reference to Fig. 2 and Fig. 3, described measurement body 1 comprises framework 11, is positioned at elastic beam 12 and the mass 13 of described framework 11; Described mass 13 is connected by many groups of described elastic beams 12 with described framework 11, and described in every group, elastic beam 12 comprises two elastic foldable beams 121, and it is rotational symmetry setting that described elastic foldable beam 121 be take the center line of described mass 13.Wherein, two of every elastic foldable beam 121 ends are located along the same line.
With reference to Fig. 2 and Fig. 3, preferably, described mass 13 is cuboid, and the xsect of described mass 13 is square.The described elastic beam 12 of many groups is respectively in upper silicon layer 5 and lower silicon layer 7.Preferably, in every layer of silicon layer, be provided with four groups of elastic beams 12.Described in every group, elastic beam 12 comprises two elastic foldable beams 121.And one end of every described elastic foldable beam 121 is connected with the corner 131 of described mass 13 respectively.Make mass 13 in the situation that there is no acceleration, remain on horizontality.When acceleration being detected, the elastic foldable beam 121 that is arranged on corner 131 also can limit the displacement amplitude of mass 13, prevents from measuring higher than top limit or wrong data.In the present invention, mass 13 also can be other shapes, such as hexagon, octagon or circle etc.And the elastic beam in the present invention 12, also can be for multilayer, organize structure more, be not restricted to two-layer, the structure of four groups every layer.
Referring to Fig. 1 and Fig. 3, described measurement body is two-sided soi structure, comprises upper silicon layer 5, intermediate silicon layers 6 and lower silicon layer 7; Between every two-layer silicon layer, be respectively arranged with silicon dioxide layer 8.A plurality of described elastic foldable beams 121 form in respectively described upper silicon layer 5 and described lower silicon layer 7 symmetrically.And be respectively arranged with electrode 4 on described measurement body 1, described upper cover plate silicon chip 2 and described lower cover silicon chip 3.After energising, measure between body 1 and upper cover plate silicon chip 2 and lower cover silicon chip 3 and all can produce a capacitance.In the situation that there is no acceleration, measure body 1 constant with upper cover plate silicon chip 2 and lower cover silicon chip 3 capacitance each other.And when acceleration being detected, the framework 11 in described measurement body 1 can, because being subject to acceleration action, move to acceleration direction.Meanwhile, described elastic beam 12 also can produce certain displacement.But because of inertia effect, the displacement amplitude of mass 13 can be relatively little.According to formula C=ε A/d, the electric capacity between two parallel conducting strips equals dielectric coefficient and is multiplied by over against area divided by vertical interval.When described mass 13 produces displacement because of acceleration, the spacing between mass 13 and upper cover plate silicon chip 2 and lower cover silicon chip 3 can change.For this reason, the electric capacity of measuring between body 1 and upper cover plate silicon chip 2 and lower cover silicon chip 3 also can change.The acceleration that integrated chip can go out to detect by the change calculations of electric capacity.After acceleration disappears, elastic beam 12 can be got back to original state, makes mass 13 and upper cover plate silicon chip 2 and lower cover silicon chip 3 capacitance each other be attributed to steady state value.
Two-layer and a plurality of displacement amplitudes while effectively having reduced along axisymmetric elastic beam 12 in mass 13 that each elastic foldable beam 121 produces displacement because of acceleration are set between mass 13 and framework 11.And make the displacement amplitude of every elastic foldable beam 121 basic identical.Thereby prevented from the probability of misdata excessively being detected because of elastic beam 12 displacements.In addition,, because the displacement amplitude of every elastic foldable beam 121 is all smaller, every elastic foldable beam 121 is got back to the required time of original state and also can greatly be shortened.Many elastic beams 12 are set and also make this accelerometer comparatively small acceleration can be detected, increased the detection degree of accuracy of this accelerometer.
Then,, according to Fig. 4,5,6 manufacturing process that describe in detail for the manufacture of the accelerometer in the present invention, comprise the following steps:
The first step applies respectively photoresist on the upper silicon layer 5 of two-sided soi wafer and lower silicon layer 7.According to specific pattern, upper silicon layer 5 and lower silicon layer 7 are exposed afterwards, and develop with developer solution.The pattern being exposed like this will display.The partial depth that the deep reaction ion etching of recycle silicon is exposed upper silicon layer 5 and lower silicon layer 7 is etched to silicon dioxide layer 8.Then with reactive ion dry etching or buffered hydrofluoric acid, to being revealed the silicon dioxide layer 8 of putting outside, carry out etching.Thereby form a plurality of holes that are deep to intermediate silicon layers 6.Use afterwards photoresist layer is removed.
Second step, amasss polysilicon to intermediate silicon layers and fills up described hole at described inner hole deposition, thereby forms electric pathway; Then at the upper silicon layer 5 of described two-sided soi wafer and the superficial growth of lower silicon layer 7, go out silicon dioxide layer.And by chemistry and mechanical polishing method, polished in the surface of upper silicon layer 5 and lower silicon layer 7, reach the level and smooth standard on surface.
The 3rd step applies respectively photoresist on the upper silicon layer 5 of described two-sided soi wafer and lower silicon layer 7.According to specific pattern, upper silicon layer 5 and lower silicon layer 7 are exposed afterwards, and develop with developer solution.The pattern being exposed like this will display.First utilize reactive ion dry etching or buffered hydrofluoric acid to carry out etching to the part being exposed on the silicon dioxide layer growing.The deep reaction ion etching of recycling silicon by upper silicon layer 5 and lower silicon layer 7 deep etchings to silicon dioxide layer 8.Finally with reactive ion dry etching or buffered hydrofluoric acid, to being revealed the silicon dioxide layer 8 of putting outside, carry out etching.Thereby form a plurality of elastic beams 12.And after will photoresist removing, utilizing high temperature to go out layer of silicon dioxide layer in the superficial growth of described elastic beam 12, or by chemical deposition (CVD) method the surface deposition layer of silicon dioxide layer at described elastic beam 12.
The 4th step, removes in silicon dioxide layer 8 and reveals and put silicon dioxide outside with silicon dioxide dry etching.And again use the deep reaction ion etching of silicon or the xenon difluoride of gaseous state by intermediate silicon layers 6 deep etchings to certain depth.
The 5th step, is used the xenon difluoride of potassium hydroxide or tetramethyl aqua ammonia or ethylenediamine phosphorus benzenediol or gaseous state to carry out level and longitudinally corrosion to being etched to the intermediate silicon layers 6 of certain depth.And control etching time according to the size in the region that needs to be corroded in intermediate silicon layers 6.After intermediate silicon layers 6 is corroded, upper and lower two-layer free-moving a plurality of elastic beams 12 have been formed.
The 6th step, the described silicon dioxide that dew is put at silicon face falls with the hydrogen fluoride corrosion of buffered hydrofluoric acid or 49% hydrofluorite or gaseous state.；
The 7th step, carries out disposable bonding by described two-sided soi wafer and lower cover silicon chip after upper cover plate silicon chip, processing.
In the manufacturing process of accelerometer provided by the invention, also further comprising the steps:
Processing technology to described upper cover plate silicon chip and lower cover silicon chip also comprises:
A, with described two-sided soi wafer bonding before, on described upper cover plate silicon chip 2 or lower cover silicon chip 3 surfaces, apply photoresist.According to specific pattern, it is exposed afterwards, and develop with developer solution.The pattern being exposed like this will display.The partial depth that recycling deep reaction ion etching or potassium hydroxide or tetramethyl aqua ammonia or ethylenediamine phosphorus benzenediol are exposed upper cover plate silicon chip 2 or lower cover silicon chip 3 is etched to silicon dioxide layer 8.Then with the hydrogen fluoride of buffered hydrofluoric acid or 49% hydrofluorite or gaseous state, the silicon dioxide layer 8 being exposed is carried out to etching, and form a through hole.And CD-ROM drive agent is removed.
B, on the bonding face of upper cover plate silicon chip 2 and lower cover silicon chip 3, apply photoresist, according to specific pattern, it is exposed afterwards, and develop with developer solution.The pattern being exposed like this will display.Recycling deep reaction ion etching or potassium hydroxide or tetramethyl aqua ammonia or ethylenediamine phosphorus benzenediol, the partial depth respectively upper cover plate silicon chip 2 and lower cover silicon chip 3 being exposed is etched to certain position.Thereby depressed area of each self-forming on the bonding face of upper cover plate silicon chip 2 and lower cover silicon chip 3, and CD-ROM drive agent is removed.
C, with described two-sided soi wafer bonding before, upper cover plate silicon chip 2 and 3 pairs of lower cover silicon chips are cleaned;
D, with described two-sided soi wafer bonding after, depositing metal extraction electrode 4 on the surface of described upper cover plate silicon chip 2, described lower cover silicon chip 3, by described through hole depositing metal on the surface of described two-sided soi wafer of 3 on described upper cover plate silicon chip 2 or lower cover silicon chip, and by described through hole extraction electrode 4.
Silicon dioxide layer in above-mentioned processing technology in the present invention plays its silicon layer covering of protection, makes it not be etched or corrode.
The method of the deep etching described in the present invention and described etching is one or more methods in following methods: dry etching or wet etching, described dry etching comprises: deep reaction ion etching and the reactive ion etching of silicon.
After producing the accelerometer described in the present invention, also need itself and other electronic component to encapsulate, and the method for encapsulation and required material, equipment, technique all adopt prior art.
Material, equipment, technique used in said method in the present invention all adopt prior art, but by utilizing these materials and technique, especially the accelerometer that has utilized two-sided soi wafer to manufacture, there is the variation of matter, by corrosion forms on two-sided soi wafer elastic beam 13 and mass 14, can aim at very accurately and height of formation symmetrical structure.The Two-layer Beam of the bonding technology manufacturing of using compared with prior art, the accelerometer precision of this technique manufacturing is high, error is little, yield rate has also obtained larger lifting.And because etching process is comparatively simple, the production efficiency of this product processes is high, cost is also lower.In addition, geometry of the present invention and the stressed vibration shape are full symmetrical configuration.Make the detection degree of accuracy of this accelerometer high.
Claims (12)
1. an accelerometer, comprising: the upper cover plate silicon chip and the lower cover silicon chip that measure body, are connected with described measurement body; Described measurement body comprises framework, is positioned at elastic beam and the mass of described framework; It is characterized in that, described mass is connected by many groups of described elastic beams with described framework, and described in every group, elastic beam comprises two elastic foldable beams, and it is rotational symmetry setting that described elastic foldable beam be take the center line of described mass.
2. accelerometer as claimed in claim 1, is characterized in that, two ends of described elastic foldable beam are located along the same line.
3. accelerometer as claimed in claim 1, is characterized in that, described mass is cuboid, and the xsect of described mass is square.
4. accelerometer as claimed in claim 1, is characterized in that, one end of described elastic foldable beam is connected with the corner of described mass respectively.
5. accelerometer as claimed in claim 1, is characterized in that, described measurement body is epitaxial silicon structure on double-sided insulation body, comprises upper silicon layer, intermediate silicon layers and lower silicon layer; Between every two-layer silicon layer, be respectively arranged with silicon dioxide layer.
6. accelerometer as claimed in claim 5, is characterized in that, a plurality of described elastic beams form in respectively described upper silicon layer and described lower silicon layer symmetrically, forms double-decker.
7. accelerometer as claimed in claim 1, is characterized in that, on described measurement body, described upper cover plate silicon chip and described lower cover silicon chip, is respectively arranged with electrode.
8. a manufacturing process for accelerometer, is characterized in that, described manufacturing process comprises the following steps:
The first step forms a plurality of holes that are deep to intermediate silicon layers by photoetching, deep etching and etching respectively on the upper lower silicon layer of epitaxial silicon silicon chip on double-sided insulation body;
Second step, amasss polysilicon to intermediate silicon layers and fills up described hole at described inner hole deposition; Then on described double-sided insulation body, the superficial growth of the upper lower silicon layer of epitaxial silicon silicon chip goes out silicon dioxide layer;
The 3rd step forms the symmetrical elastic foldable beam of many groups by photoetching, deep etching and etching on the upper lower silicon layer of epitaxial silicon silicon chip on described double-sided insulation body; And put on surface outside and grow silicon dioxide at the dew of described elastic foldable beam by high-temperature oxydation, or at the dew of elastic foldable beam, put deposit layer of silicon dioxide on surface outside by chemical deposition method;
The 4th step, the silicon dioxide of dew being put in described intermediate silicon layers outside by photoetching and etching is removed, and described in deep etching intermediate silicon layers to certain depth;
The 5th step, by the intermediate silicon layers corrosion between framework and mass, thereby forms free-moving elastic beam;
The 6th step, puts described silicon dioxide etching outside by dew;
The 7th step, carries out disposable bonding by epitaxial silicon silicon chip and lower cover silicon chip on the described double-sided insulation body after upper cover plate silicon chip, processing.
9. the manufacturing process of accelerometer as claimed in claim 8, is characterized in that, the processing technology of described upper cover plate silicon chip and lower cover silicon chip is also comprised:
A, on described upper cover plate silicon chip or lower cover silicon chip, by photoetching, deep etching and etching, form a through hole;
B, on the bonding face of described upper cover plate silicon chip and described lower cover silicon chip respectively by depressed area of each self-forming of photoetching, deep etching and etching;
C, with described two-sided SOI silicon on insulator wafer bonding before, described upper cover plate silicon chip and described lower cover silicon chip are cleaned;
D, with described double-sided insulation body on after epitaxial silicon wafer bonding, depositing metal extraction electrode on the surface of described upper cover plate silicon chip, described lower cover silicon chip, by depositing metal on the surface of the epitaxial silicon silicon chip on described double-sided insulation body of the described through hole on described upper cover plate silicon chip or lower cover silicon chip, and by described through hole extraction electrode.
10. the manufacturing process of accelerometer according to claim 8 or claim 9, it is characterized in that, the method of described deep etching and described etching is one or more methods in following methods: dry etching or wet etching, described dry etching comprises: deep reaction ion etching and the reactive ion etching of silicon.
The manufacturing process of 11. accelerometers according to claim 10, it is characterized in that the combination of one or more that the described mordant for etching silicon layer is following mordant: the xenon difluoride of potassium hydroxide, tetramethyl aqua ammonia, ethylenediamine phosphorus benzenediol or gaseous state.
The manufacturing process of 12. accelerometers according to claim 10, is characterized in that, the combination of one or more that the described mordant for corrode silicon dioxide layer is following mordant: the hydrogen fluoride of buffered hydrofluoric acid, 49% hydrofluorite or gaseous state.
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| CN104181331A (en) * | 2014-08-27 | 2014-12-03 | 电子科技大学 | Piezoresistive acceleration sensor and manufacturing method thereof |
| CN106405152A (en) * | 2016-10-19 | 2017-02-15 | 北京大学深圳研究生院 | Micro accelerator and manufacturing method thereof |
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