CN103647937A - An image tracking system and an image data processing method thereof - Google Patents
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Abstract
The invention discloses an image tracking system comprising a video image acquisition module, an FPGA and a DSP, wherein the video image acquisition module is used for shooting video images and outputting digital image data. The FPGA is used for storing a present frame of digital image data which is output by the video image acquisition module through a digital signal output end thereof in to a first storage area of a storage via a data storage port of the FPGA. Digital image data of a previous fame stored in a second storage area of the storage is read through a data read port of the FPGA, and after the digital image data is subjected to gray scale transformation and median filtering, the data is output through a digital signal output end of the FPGA. The DSP unit is used for carrying out target searching and tracking according to the digital image data output by the FPGA. Through the utilization of the image tracking system and the image data processing method of the invention, capability of performing real time processing on the image data can be improved.
Description
Technical field
The present invention relates to image tracking technique field, relate in particular to a kind of image tracking system and image processing method thereof.
Background technology
Moving object detection and tracking is that combining image pattern recognition and image tracking method detect-identify-process of following the tracks of the target in image sequence on the basis based on dynamic image analysis, and it is a very active branch in Image processing and compute machine vision field.Wherein, the image tracking system for moving object detection and tracking has been widely used in the numerous areas such as Industry Control, military equipment, medical research, video monitoring.
At present, existing image tracking system structure as shown in Figure 1, generally by video image acquisition module, DSP(Digital Signal Processor, digital signal processor) unit, memory, D/A (digital to analog converter, digital signal converts analog signal to) unit, display form.Wherein, DSP unit is for carrying out preliminary treatment and target search and tracking and matching calculation process by the DID being collected by video image acquisition module, and the DID after processing is sent to D/A unit, by D/A unit convert thereof into analog signal again display show.
The present inventor finds, monokaryon DSP in above-mentioned system, need to successively carry out preliminary treatment coding and target search and the tracking and matching calculation process of DID, can cause to the processing capability in real time of high resolution video image high speed moving object a little less than, therefore the image tracking system that provides a kind of processing capability in real time stronger is provided.
Summary of the invention
Goal of the invention of the present invention is to provide a kind of image tracking system and image processing method thereof, in order to improve the processing capability in real time to view data.
According to an aspect of the present invention, provide a kind of image tracking system, having comprised:
Video image acquisition module, for capture video image, output digital image data;
FPGA, for the present frame DID that described video image acquisition module is exported by its digital signal output end, is deposited into the first memory block of described memory by the data storage port of this FPGA; And the data read port by this FPGA reads the previous frame DID of the storage in the second memory block of described memory, carry out, after greyscale transformation and medium filtering, by the digital signal output end of this FPGA, exporting;
DSP unit, for carrying out target search and tracking according to the DID of described FPGA output.
Preferably, described FPGA, also for after receiving at described present frame DID, by the next frame DID of described video image acquisition module output, is deposited into the second memory block of described memory; And read by the data read port of this FPGA the DID of storing in the first memory block of described memory, carry out, after greyscale transformation and medium filtering, by the digital signal output end of this FPGA, exporting.
Preferably, described video image acquisition module specifically comprises:
Digital camera, for taking digital video image, and exports the DID of shooting by the digital signal output end of this digital camera; Or,
Described video image acquisition module specifically comprises:
Analog video camera, for taking analog video image, and exports the simulated image data of shooting by the analog signal output of this analog video camera;
AD unit, for converting the simulated image data of described analog video camera output to DID, and by the DID output after conversion.
Preferably, described image tracking system also comprises: display;
The digital signal input end of described display is connected with the digital signal output end of described FPGA;
Described DSP unit also for will carry out target search with follow the tracks of after and mark the DID of target, the digital signal output end by this DSP unit returns to described FPGA;
Described FPGA is the data receiver form according to described display for DID that described DSP unit is returned also, outputs to described display and shows.
Preferably, described image tracking system also comprises:
Flash memory, for storing the operation processing program of described DSP unit.
Preferably, described DSP is specially 8 core DSP.
According to another aspect of the present invention, also provide a kind of image processing method of image tracking system, having comprised:
FPGA in described system is by the present frame DID of the video image acquisition module output in described system, by the data storage port of this FPGA, deposit the first memory block of memory in described system in, and read the data in the second memory block in described memory by the data read port of this FPGA, carry out after greyscale transformation and medium filtering, output to the DSP unit in described system;
Described DSP unit carries out target search and tracking according to the DID of described FPGA output.
Further, the FPGA in described system deposits the present frame DID receiving behind the first memory block of memory in described system in, also comprises:
Described FPGA is deposited into the second memory block in described memory by the next frame DID receiving; And read the data in the first memory block in described memory, and carry out after greyscale transformation and medium filtering, output to the DSP unit in described system.
Further, described FPGA is by the DID receiving, and order is deposited into the first/bis-memory block of described memory successively, specifically comprises:
Data reception module in described FPGA is cached to the DID receiving in local cache district; In described buffer area, the data of buffer memory reach while setting byte, produce the full useful signal output of data of this buffer area; When the data memory module in described FPGA receives the full useful signal of data of buffer area, the data in this buffer area are written in the first/bis-memory block.
Further, in described DSP unit, according to the DID receiving, after carrying out target search and following the tracks of, also comprise:
Described DSP unit will carry out target search with follow the tracks of process after and mark the DID of target, the digital signal output end by this DSP unit returns to described FPGA;
The DID that described FPGA returns to described DSP unit, according to the data receiver form of display, outputs to described display and shows.
As shown from the above technical solution, the image tracking system that the embodiment of the present invention provides, by FPGA replace DSP to the DID receiving carry out greyscale transformation and medium filtering, to remove the interference in data, and will carry out target search and follow the tracks of rear and mark the DID of target according to the data receiver form of display, outputing to display shows, and multi-core DSP executed in parallel target is searched element and the processing of tracking and matching complicated algorithm, thereby improve the processing capability in real time to the moving object of high resolution video image high speed.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, below will the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described.Apparently, the accompanying drawing in below describing is only some embodiments of the present invention, for those of ordinary skills, can also obtain according to these accompanying drawing illustrated embodiments other embodiment and accompanying drawing thereof.
Fig. 1 is the structural representation of existing image tracking system;
The structural representation of the image tracking system that Fig. 2 provides for the embodiment of the present invention;
The method flow diagram that the view data of the image tracking system that Fig. 3 provides for the embodiment of the present invention is processed.
Embodiment
For making object of the present invention, technical scheme and advantage clearer, referring to accompanying drawing and enumerate preferred embodiment, the present invention is described in more detail.Yet, it should be noted that, many details of listing in specification are only used to make reader to have a thorough understanding to one or more aspects of the present invention, even if do not have these specific details also can realize these aspects of the present invention.
The present inventor considers FPGA(Field Programmable Gata Array, field programmable gate array) can parallel processing relatively simple algorithm, adopt in an embodiment of the present invention large-scale FPGA to substitute DSP unit DID is carried out to preliminary treatment coding, and after carrying out target search and following the tracks of, and mark the DID of target according to the data receiver form of display, outputing to display shows, adopt multi-core DSP to walk abreast simultaneously and DID is carried out to the complicated algorithm of target search and tracking, thereby improve the processing capability in real time to the moving object of high resolution video image high speed.
Below in conjunction with accompanying drawing, describe technical scheme of the present invention in detail.The structural representation of the image tracking system that Fig. 1 provides for the embodiment of the present invention.This system comprises: video image acquisition module 201, FPGA202, memory 203, DSP unit 204.
The digital signal output end of video image acquisition module 201 is connected with the digital signal input end of FPGA202, for capture video image, and output digital image data.
FPGA202 is used for the present frame DID that video image acquisition module 201 is exported by its digital signal output end, is deposited into the first memory block of memory 203 by data storage port; And by the data in the second memory block in data read port read memory 203, carry out, after greyscale transformation and medium filtering, by digital signal output end, exporting.
The data-in port of memory 203, data-out port are connected with data storage port, the data read port of FPGA202 respectively, and have been divided in advance the first memory block and the second memory block, for distributed store DID.
In the embodiment of the present invention, memory 203 specifically can comprise DDR-SDRAM (Double Data Rate Synchronous Dynamic Random Access Memory, double data rate Synchronous Dynamic Random Access Memory) and DDR-SDRAM controller; DDR SDRAM is specially DDR2SDRAM (Double-Data-Rate Two Synchronous Dynamic Random Access Memory, second generation double data rate Synchronous Dynamic Random Access Memory) or DDR3SDRAM (Double-Data-Rate Three Synchronous Dynamic Random Access Memory, third generation double data rate Synchronous Dynamic Random Access Memory).
Further, FPGA202 is also for after receiving at present frame DID, the next frame DID that video image acquisition module 201 is exported by its digital signal output end, is deposited into the second memory block of memory 203 by the data storage port of FPGA202; And the data in the first memory block of the data read port read memory 203 by FPGA202, carry out, after greyscale transformation and medium filtering, by the digital signal output end of FPGA202, exporting.
Further, video image acquisition module 201 can comprise: digital camera.
Digital camera is used for shooting digital pictures data, and the simulated image data of shooting is exported by the digital signal output end of this digital camera.
Or video image acquisition module 201 can comprise: analog video camera, AD unit.
Wherein, analog video camera is used for taking analog video image, and the simulated image data of shooting is exported by the analog signal output of this analog video camera; AD unit converts DID to for the simulated image data that analog video camera is exported, and by the DID output after conversion.
Further, the image tracking system that the embodiment of the present invention provides also comprises: display 205.
The digital signal input end of display 205 is connected with the digital signal output end of FPGA202.
Correspondingly, DSP unit 204 also, for by carrying out target search and the DID of following the tracks of afterwards and mark target, returns to FPGA202 by its digital signal output end;
FPGA202 is the data receiver form according to display 205 for DID that DSP unit 204 is returned also, outputs to display 205 and shows.
In practical application, if display 205 is VGA(Video Graphics Array, Video Graphics Array) display, the image tracking system that the embodiment of the present invention provides can also comprise: D/A unit.
Correspondingly, FPGA202 also outputs to D/A unit for the DID that DSP unit 204 is returned;
D/A unit is for the DID of FPGA202 output is converted to analog electrical signal, and outputs to display 205 and show.
Further, the image tracking system that the embodiment of the present invention provides also comprises: Flash memory 206;
Flash memory 206, for storing the operation processing program of DSP unit 204, guarantees DSP unit offline operation.
The method flow schematic diagram that the view data of the image tracking system that Fig. 3 provides for the embodiment of the present invention is processed.Comprise the steps:
S301:FPGA202 deposits present frame DID in the first memory block of memory 203, and the data in the second memory block of 203 in memory are read out, and carries out, after greyscale transformation and medium filtering, outputing to DSP unit 204.
In this step, FPGA202 is by the present frame DID of video image acquisition module 201 outputs, by the data storage port of this FPGA, deposit the first memory block of memory 203 in, and the data in the second memory block of the data read port read memory 203 by this FPGA, carry out, after greyscale transformation and medium filtering, outputing to DSP unit 204.
Particularly, the data reception module of FPGA202 is first cached to the DID of video image acquisition module 201 outputs in local buffer area, in buffer area, the data of buffer memory reach while setting byte, produce the full useful signal output of data of this buffer area, when the data memory module in FPGA202 receives the full useful signal of data of buffer area, the data in this buffer area are written to the first memory block by data storage port.Afterwards, empty local cache district.
In fact, the first above-mentioned memory block, the second memory block can replace as writing memory block, reading memory block; In this step, the first memory block is as writing memory block, and the second memory block is as reading memory block; So, when FPGA202 receives the complete view data of next frame, the second memory block will be used as writes memory block, and the first memory block will be used as reads memory block.
S302:DSP unit 204 carries out target search and tracking according to the DID of FPGA202 output.
In this step, DSP in DSP unit 204 is that multi-core DSP can carry out target search and tracking and matching computing to the DID receiving simultaneously, wherein, target tracking algorism specifically adopts the Mean Shift algorithm of strong robustness, target is searched element and is well known to those skilled in the art with the algorithm of tracking and matching, repeats no more herein.
S303:DSP unit 204 by after carrying out target search and follow the tracks of processing and the DID that marks target return to FPGA202.
The DID that S304:FPGA202 returns to DSP unit 204, according to the data receiver form of display 205, outputs to display 205 and shows.
As shown from the above technical solution, the image tracking system that the embodiment of the present invention provides, by FPGA replace DSP to the DID receiving carry out greyscale transformation and medium filtering, to remove the interference in data, and will carry out target search and follow the tracks of rear and mark the DID of target according to the data receiver form of display, outputing to display shows, and multi-core DSP executed in parallel target is searched element and the processing of tracking and matching complicated algorithm, thereby improve the processing capability in real time to the moving object of high resolution video image high speed.
Obviously, those skilled in the art can carry out various changes and modification and not depart from the spirit and scope of the present invention the present invention.Like this, if of the present invention these are revised and within modification belongs to the scope of the claims in the present invention and equivalent technologies thereof, the present invention also comprises these changes and modification interior.
Claims (10)
1. an image tracking system, is characterized in that, comprising:
Video image acquisition module, for capture video image, output digital image data;
FPGA, for the present frame DID that described video image acquisition module is exported by its digital signal output end, is deposited into the first memory block of described memory by the data storage port of this FPGA; And the data read port by this FPGA reads the previous frame DID of the storage in the second memory block of described memory, carry out, after greyscale transformation and medium filtering, by the digital signal output end of this FPGA, exporting;
DSP unit, for carrying out target search and tracking according to the DID of described FPGA output.
2. image tracking system according to claim 1, is characterized in that,
Described FPGA, also for after receiving at described present frame DID, by the next frame DID of described video image acquisition module output, is deposited into the second memory block of described memory; And read by the data read port of this FPGA the DID of storing in the first memory block of described memory, carry out, after greyscale transformation and medium filtering, by the digital signal output end of this FPGA, exporting.
3. image tracking system according to claim 1, is characterized in that, described video image acquisition module specifically comprises:
Digital camera, for taking digital video image, and exports the DID of shooting by the digital signal output end of this digital camera; Or,
Described video image acquisition module specifically comprises:
Analog video camera, for taking analog video image, and exports the simulated image data of shooting by the analog signal output of this analog video camera;
AD unit, for converting the simulated image data of described analog video camera output to DID, and by the DID output after conversion.
4. image tracking system according to claim 1, is characterized in that, described image tracking system also comprises: display;
The digital signal input end of described display is connected with the digital signal output end of described FPGA;
Described DSP unit also for will carry out target search with follow the tracks of after and mark the DID of target, the digital signal output end by this DSP unit returns to described FPGA;
Described FPGA is the data receiver form according to described display for DID that described DSP unit is returned also, outputs to described display and shows.
5. image tracking system according to claim 1, is characterized in that, described image tracking system also comprises:
Flash memory, for storing the operation processing program of described DSP unit.
6. according to the image tracking system described in claim 1-5 any one, it is characterized in that, described DSP is specially 8 core DSP.
7. an image processing method for image tracking system, is characterized in that, comprising:
FPGA in described system is by the present frame DID of the video image acquisition module output in described system, by the data storage port of this FPGA, deposit the first memory block of memory in described system in, and the data read port by this FPGA reads the data in the second memory block of described memory, carry out after greyscale transformation and medium filtering, output to the DSP unit in described system;
Described DSP unit carries out target search and tracking according to the DID of described FPGA output.
8. method according to claim 7, is characterized in that, the FPGA in described system deposits the present frame DID receiving behind the first memory block of memory in described system in, also comprises:
Described FPGA is deposited into the second memory block in described memory by the next frame DID receiving; And read the data in the first memory block in described memory, and carry out after greyscale transformation and medium filtering, output to the DSP unit in described system.
9. method according to claim 8, is characterized in that, described FPGA is by the DID receiving, and order is deposited into the first/bis-memory block of described memory successively, specifically comprises:
Data reception module in described FPGA is cached to the DID receiving in local cache district; In described buffer area, the data of buffer memory reach while setting byte, produce the full useful signal output of data of this buffer area; When the data memory module in described FPGA receives the full useful signal of data of buffer area, the data in this buffer area are written in the first/bis-memory block.
10. method according to claim 7, is characterized in that, in described DSP unit, according to the DID receiving, after carrying out target search and following the tracks of, also comprises:
Described DSP unit will carry out target search with follow the tracks of process after and mark the DID of target, the digital signal output end by this DSP unit returns to described FPGA;
The DID that described FPGA returns to described DSP unit, according to the data receiver form of display, outputs to described display and shows.
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