CN103646887B - A kind of method of automatic reduction defects detection noise - Google Patents
A kind of method of automatic reduction defects detection noise Download PDFInfo
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- CN103646887B CN103646887B CN201310612742.5A CN201310612742A CN103646887B CN 103646887 B CN103646887 B CN 103646887B CN 201310612742 A CN201310612742 A CN 201310612742A CN 103646887 B CN103646887 B CN 103646887B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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Abstract
The present invention relates to large scale integrated circuit and manufacture field, a kind of method particularly relating to automatic reduction defects detection noise, it is applied in the technique of newly created defects detection program, defect detection equipment is fed back to timely by the defect categorical data after optimizing, so that defects detection program is optimized, after the adjustment automatically of several batch wafers, the sensitivity of this defects detection program can be automatically adjusted to a rational scope, i.e. adapt with actual technological parameter, and then realize on producing, the defect of considerable wafer effectively being observed, the correctness of efficiency and engineering judgement so that production is greatly improved.
Description
Technical field
The present invention relates to large scale integrated circuit and manufacture field, particularly relate to a kind of reduction defects detection noise automatically
Method.
Background technology
At present, in advanced integrated circuit fabrication process, the most all include the operation of hundreds of step, and in office
The mistake what process links is small, is all likely to result in the inefficacy of whole chip, closes especially with circuit
Constantly reducing of key size, it is stricter to the requirement of technology controlling and process；So, in order in process of production and
Shi Faxian and solution produced problem, be required to configure high sensitivity optical defect detection equipment, to produce device
Product carry out on-line checking, and then find the mistake that product occurs in preparation process timely.
The basic functional principle of defects detection is the optical imagery on chip to be changed chemical conversion for by different bright dull grays
The data image that rank represent.Fig. 1～3 is to be converted into the optical imagery on chip to be represented by different bright dull gray rank
The schematic flow sheet of data image；As shown in Figures 1 to 3, first, optical microscope is utilized to obtain a chip
Optical imagery (as shown in Figure 1), then utilize sample devices the optical imagery of this chip is sampled (as
Shown in Fig. 2), obtain the data image being made up of different bright dull gray rank as shown in Figure 3 after carrying out GTG process,
Defect detection equipment is finally utilized the datagraphic feature of adjacent chip to be compared, with detection chip whether
There are abnormal defect and defect position.
Wherein, before drawbacks described above detection equipment carries out defects detection technique to chip, need create one and be somebody's turn to do
The defects detection program that chip adapts, and this new defects detection program creation when, due to new technology
There is the biggest uncertainty, generally require and the sensitivity of defects detection program is set higher, and because brilliant
Certain difference itself is existed between circle and wafer, so the chip on detection wafer, and chip is powered on
When the data signal on road is compared, will necessarily be disturbed by Substrate signal, thus be produced a lot of noises,
In actual production technology, owing to the existence of above-mentioned noise can make between the different wafers of same batch
Defects count can differ greatly.
Fig. 4 is the defects count schematic diagram on same batch difference wafer；Fig. 5 is to lack on each wafer in Fig. 4
Fall into the block diagram that quantity is corresponding with its ID；As shown in Figures 4 and 5, with a batch of wafer (ID=21～25),
Due to the existence of noise, cause the difference of the quantity of defect (defect count) between different wafer (wafer)
Huge, as wafer that ID is 24 on it quantity of defect only have 8, and the defect on the wafer that ID is 23
Then having reached 140, the defects count difference between it reaches 132 (shown in Figure 5).
Further, since product wafer is after scanning through defect detection equipment, will be through the sight of ultramicroscope
Examine, just can determine that the defect that defect detection equipment detects is genuine defect or noise, the most as shown in Figure 6,
Product, after one procedure A, first carries out defects detection to this product, continues the defect detected
Carrying out classifying, (defect i.e. utilizing ultramicroscope to judge that defect detection equipment detects is genuine defect or makes an uproar
Sound) after, just can carry out next process B；So, ultramicroscope it is greatly lowered to real on wafer
The efficiency of the observation of defect, and also need to engineer the defects detection program in defect detection equipment is carried out excellent
Change, and then significantly reduce the efficiency of work.
Chinese patent (publication number: CN1877292A) describes a kind of defect inspection method.First, it is provided that
Semiconductor detection piece, and this quasiconductor detection piece includes at least one defect, then utilizes a failure analysis skill
Art, detects at least one suspicious abnormal region in the back side of this quasiconductor detection piece, followed by a physical energy,
Forming multiple reference marker around this suspicious abnormal region at this quasiconductor detection piece back side, finally, utilizing should
A little reference markers, calibrate the relative position of this defect in the front of this quasiconductor detection piece.
Chinese patent (publication number: CN103000548A) describes one, and to utilize fpga chip to carry out integrated
The method of circuit manufacturing process defects detection, comprises the steps: (1) configuration memorizer to fpga chip
Carry out retaking of a year or grade test, it is thus achieved that the test data of configuration memorizer；(2) detection test data, it is thus achieved that break down
Configuration memorizer coordinate information；(3) according to fault coordinate information, submodule rank, chip-scale are counted
Not and the fault scattergram of three kinds of ranks of disk rank；(4) the fault scattergram under three kinds of ranks is carried out respectively
Stack, it is thus achieved that trouble point distribution density；(5) distribution density uniformity is detected, it is thus achieved that accurate technique
Defect region occurred frequently and possible cause.
Summary of the invention
For the problem of above-mentioned existence, present invention is disclosed the method (A of a kind of automatic reduction defects detection noise
Kind of defect inspection method of automatic noise reduction), wherein, described method bag
Include:
A wafer being used for defects detection and a storage is provided to have the server of genetic defects categorical data；
Defect detection equipment transfers described genetic defects categorical data, and described wafer is carried out defects detection, and defeated
Go out defective data to defect scope；
After described defective data is classified by described defect scope, output defect categorical data is to described clothes
Business device；
After this defect categorical data is optimized by described server, described genetic defects categorical data is carried out more
Newly, new defect categorical data is generated；
Described defect detection equipment transfers described new defect categorical data, and according to this new defect categorical data
After defects detection program is updated, continue for the wafer of defects detection, another is carried out defects detection.
The above-mentioned method automatically reducing defects detection noise, wherein, described defect detection equipment is according to transferring
The sensitivity of described defects detection program is automatically updated by defect categorical data.
The above-mentioned method automatically reducing defects detection noise, wherein, each described wafer is provided with some
Several detection region it is provided with on individual chip, and each chip.
The above-mentioned method automatically reducing defects detection noise, wherein, automatically updating according to every of described sensitivity
Zones of different classification on individual described chip is controlled
The above-mentioned method automatically reducing defects detection noise is wherein, big according to the noise produced on described chip
The little setting carrying out described detection region.
The above-mentioned method automatically reducing defects detection noise, wherein, described detection region includes that high density stores
District, dense logic district, low-density logic area and low-density peripheral circuit region.
The above-mentioned method automatically reducing defects detection noise, wherein, described defect detection equipment is to described highly dense
It is 0～10% that degree memory block and described dense logic district carry out the sensitivity of defects detection.
The above-mentioned method automatically reducing defects detection noise, wherein, described defect detection equipment is to described low close
It is 0～30% that degree logic area and described low-density peripheral circuit region carry out the sensitivity of defects detection.
The above-mentioned method automatically reducing defects detection noise, wherein, described method also includes:
Defect inspection after successively multiple wafers being carried out above-mentioned defects detection technique, on described defect detection equipment
The sensitivity of ranging sequence is automatically adjusted to meet in the range of process requirements.
The above-mentioned method automatically reducing defects detection noise, wherein, the quantity of the plurality of wafer is 2～100.
In sum, the method for a kind of automatic reduction defects detection noise of the present invention, it is applied to the inspection of newly created defect
In the technique of ranging sequence, feed back to defect detection equipment timely by the defect categorical data after optimizing, with
Defects detection program is optimized, after automatically the adjusting of several batch wafers, this defects detection program
Sensitivity can be automatically adjusted to a rational scope, i.e. adapt with actual technological parameter, and then realize
On producing, the defect of considerable wafer is effectively observed, sentence with the efficiency and engineering that production is greatly improved
Disconnected correctness.
Accompanying drawing explanation
Fig. 1～3 is the stream that the optical imagery on chip is converted into the data image represented by different bright dull gray rank
Journey schematic diagram；
Fig. 4 is the defects count schematic diagram on same batch difference wafer；
Fig. 5 is the block diagram that in Fig. 4, on each wafer, defects count is corresponding with its ID；
Fig. 6 is traditional defects detection and observes schematic flow sheet；
Fig. 7 be a kind of automatic reduction defects detection noise of the present invention method in the schematic flow sheet of an embodiment；
Fig. 8 is the structural representation that chip arranges different detection region；
It is automatic that Fig. 9 is that the method utilizing the present invention automatically to reduce defects detection noise carries out flaw detection sensitivity
The schematic diagram adjusted.
Detailed description of the invention
Below in conjunction with the accompanying drawings the detailed description of the invention of the present invention is further described:
Fig. 7 be a kind of automatic reduction defects detection noise of the present invention method in the schematic flow sheet of an embodiment；
As it is shown in fig. 7, a kind of method of automatic reduction defects detection noise, including:
First, it is provided that one several for the wafer (preferably provide 2～100 wafers) and of defects detection
Storage has the server of genetic defects categorical data.
Secondly, (or server automatically will to use drawbacks described above detection equipment to transfer genetic defects categorical data
This genetic defects categorical data feeds back to defect detection equipment), this defect detection equipment divides according to this genetic defects
After the sensitivity of defects detection program is adjusted by class data, a wafer is carried out defects detection, and exports
The defective data of this wafer is to defect scope.
Preferably, above-mentioned defect detection equipment is that high sensitivity optical defect detects equipment such as optical microscope
Deng, defect scope is the equipment such as ultramicroscope.
Further, above-mentioned each wafer is provided with on some chips, and each chip all in accordance with its table
The noise size that face figure produces is provided with several detection regions；Wherein, Fig. 8 is that chip arranges different detection
The structural representation in region；As shown in Figure 8, each chip is provided with high density memory block, high density is patrolled
Collect district, low-density logic area and low-density peripheral circuit region.
Afterwards, after utilizing defect scope that above-mentioned defective data is classified, export defect categorical data
To middle server；After this defect categorical data is optimized by this server again, its genetic defects stored is divided
Class data are updated, to generate new defect categorical data.
Finally, defect detection equipment is transferred above-mentioned new defect categorical data (or new is lacked by server automatically
Sunken categorical data feeds back in defect detection equipment), and according to this new defect categorical data to defects detection journey
After sequence is updated, to continue another follow-up wafer being used for defects detection is carried out defects detection technique.
Wherein, according to new defect categorical data, defects detection program is updated mainly to its defects detection
Sensitivity update adjustment automatically, and be to control according to zones of different classification on above-mentioned each chip
System.
It addition, sequentially pass through multiple batch wafer (preferably 1～100, such as 1,2,3,20,50,80
Or 100) defects detection time, above-mentioned defects detection technique chip its sensitivity of zones of different the most in advance
In the range of being set as being consistent with process requirements, as dense logic district and the high density of noise will be not likely to produce
The flaw detection sensitivity of memory block is set as 0～10%(such as 0,2%, 5%, 7% or 10%), and easy
The flaw detection sensitivity of the low-density logic area and low-density peripheral circuit region that produce noise is then set as
0～30%(such as 0,10%, 15%, 20% or 30%).
It is automatic that Fig. 9 is that the method utilizing the present invention automatically to reduce defects detection noise carries out flaw detection sensitivity
The schematic diagram adjusted, its transverse axis represents the number carrying out defects detection technique wafer, and the longitudinal axis represents defects detection work
The sensitivity of skill；As it is shown in figure 9, after by utilizing the method for above-mentioned a kind of automatic reduction defects detection noise,
The sensitivity of defects detection technique gradually tends to be steady, and is ultimately disposed at the zone of reasonableness meeting process requirements
In, and then the defects detection can being widely used in production technology is central with observation, greatly saves people
Power, material resources.
Concrete, when carrying out the establishment of a new defects detection program, by using above-mentioned automatic reduction
The method of defects detection noise, after the wafer of the batch sequentially passing through 10 of setting adjusts automatically, and in advance
The ratio of low-density logic area and low-density peripheral circuit region noise sensitivity adjustment that sets is as 20%, and high density is deposited
The ratio of storage area and the noise sensitivity adjustment of dense logic district is 5%, and after certain time, defects detection sets
Standby sensitivity can be automatically adjusted to a rational scope as it is shown in figure 9, thus realize for producing upper big
The effective observation of amount wafer, greatly improves the efficiency of production and promotes the correctness of engineering judgement.
It addition, the method for a kind of automatic reduction defects detection noise of the present embodiment, in Logic, Memory,
On multiple technology platform such as RF, HV, Analog/Power, MEMS, CIS, Flash, eFlash, can answer
For >=130nm, 90nm, 65/55nm, 45/40nm, 32/28nm or≤22nm etc. multiple technology joint
In the technique of point.
In sum, owing to have employed technique scheme, the embodiment of the present invention proposed by lacking after optimizing
Sunken categorical data feeds back to defect detection equipment timely, to be optimized defects detection program, through several
Automatically, after the adjustment of individual batch wafer, the sensitivity of this defects detection program can be automatically adjusted to a rational model
Enclose, i.e. adapt with actual technological parameter, and then realize on producing, the defect of considerable wafer being carried out effectively
Observation, the correctness of efficiency and engineering judgement so that production is greatly improved.
By explanation and accompanying drawing, give the exemplary embodiments of the ad hoc structure of detailed description of the invention, based on this
Bright spirit, also can make other conversion.Although foregoing invention proposes existing preferred embodiment, but, this
A little contents are not intended as limitation.
For a person skilled in the art, read after described above, various changes and modifications undoubtedly will aobvious and
It is clear to.Therefore, appending claims should regard whole changes of true intention and the scope containing the present invention as
Change and revise.The scope of any and all equivalence and content in Claims scope, be all considered as still belonging to this
In the intention of invention and scope.
Claims (9)
1. the method for an automatic reduction defects detection noise, it is characterised in that described method includes:
A wafer being used for defects detection and a storage is provided to have the server of genetic defects categorical data；
Defect detection equipment transfers described genetic defects categorical data, and described wafer is carried out defects detection, and defeated
Go out defective data to defect scope；
After described defective data is classified by described defect scope, output defect categorical data is to described clothes
Business device；
After this defect categorical data is optimized by described server, described genetic defects categorical data is carried out more
Newly, new defect categorical data is generated；
Described defect detection equipment transfers described new defect categorical data, and according to this new defect categorical data
After defects detection program is updated, continue for the wafer of defects detection, another is carried out defects detection；
Defects detection program after successively multiple wafers being carried out defects detection technique, on described defect detection equipment
Sensitivity be automatically adjusted to meet in the range of process requirements.
The method of automatic reduction defects detection noise the most according to claim 1, it is characterised in that institute
State defect detection equipment according to the defect categorical data transferred, the sensitivity of described defects detection program to be carried out certainly
Dynamic renewal.
The method of automatic reduction defects detection noise the most according to claim 2, it is characterised in that every
The detection region being provided with several it is provided with on several chips, and each chip on individual described wafer.
The method of automatic reduction defects detection noise the most according to claim 3, it is characterised in that institute
State automatically updating of sensitivity to be controlled according to the zones of different classification on each described chip.
The method of automatic reduction defects detection noise the most according to claim 3, it is characterised in that root
The setting in described detection region is carried out according to the noise size produced on described chip.
The method of automatic reduction defects detection noise the most according to claim 3, it is characterised in that institute
State detection region and include high density memory block, dense logic district, low-density logic area and low-density peripheral circuit
District.
The method of automatic reduction defects detection noise the most according to claim 6, it is characterised in that institute
State defect detection equipment and described high density memory block and described dense logic district are carried out the sensitive of defects detection
Degree is 0～10%.
The method of automatic reduction defects detection noise the most according to claim 6, it is characterised in that institute
State defect detection equipment and described low-density logic area and described low-density peripheral circuit region are carried out defects detection
Sensitivity is 0～30%.
The method of automatic reduction defects detection noise the most according to claim 1, it is characterised in that institute
The quantity stating multiple wafer is 2～100.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101526485A (en) * | 2008-03-06 | 2009-09-09 | 奥林巴斯株式会社 | Inspection detecting method |
| CN102422405A (en) * | 2009-03-13 | 2012-04-18 | 恪纳腾公司 | Methods and systems for generating an inspection process for a wafer |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US7071011B2 (en) * | 2004-01-15 | 2006-07-04 | Powerchip Semiconductor Corp. | Method of defect review |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101526485A (en) * | 2008-03-06 | 2009-09-09 | 奥林巴斯株式会社 | Inspection detecting method |
| CN102422405A (en) * | 2009-03-13 | 2012-04-18 | 恪纳腾公司 | Methods and systems for generating an inspection process for a wafer |
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