CN103596358A - SMT addition high-density packaged multi-layer circuit board structure and manufacturing method thereof - Google Patents
SMT addition high-density packaged multi-layer circuit board structure and manufacturing method thereof Download PDFInfo
- Publication number
- CN103596358A CN103596358A CN201310648040.2A CN201310648040A CN103596358A CN 103596358 A CN103596358 A CN 103596358A CN 201310648040 A CN201310648040 A CN 201310648040A CN 103596358 A CN103596358 A CN 103596358A
- Authority
- CN
- China
- Prior art keywords
- support plate
- layer
- metal support
- photoresistance film
- circuit layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Manufacturing Of Printed Wiring (AREA)
- Electroplating Methods And Accessories (AREA)
Abstract
The invention relates to an SMT addition high-density packaged multi-layer circuit board structure and a manufacturing method of the SMT addition high-density packaged multi-layer circuit board structure. The SMT addition high-density packaged multi-layer circuit board structure comprises an inner circuit layer (1) and an outer circuit layer (3), wherein connecting copper columns (2) are arranged between the inner circuit layer (1) and the outer circuit layer (3), insulating materials (9) wrap the inner circuit layer (1) and the connecting copper columns (2), SMT copper columns (4) are arranged on the reverse side of the inner circuit layer (1), tin layers (5) are arranged on the surfaces of the SMT copper columns (4) respectively, elements (6) are mounted on the tin layers (5), the space surrounding the SMT copper columns (4), the tin layers (5) and the elements (6) is filled with epoxy resin (7), and light-sensing insulating materials (8) coat the surface and the periphery of the outer circuit layer (3). The SMT addition high-density packaged multi-layer circuit board structure and the manufacturing method of the SMT addition high-density packaged multi-layer circuit board structure have the advantages that due to the fact that a solid surface mounting welding zone is formed through the manufacturing method instead of a solder paste coating method, high-performance electrical connection is achieved on the basis of the high-density circuit design and manufacturing, and good reliability is ensured.
Description
Technical field
The present invention relates to a kind of SMT addition high-density packages multilayer circuit board structure and preparation method thereof, belong to semiconductor packaging field.
Background technology
The surface mount process of current high-density base board is mainly by part, to use steel mesh printing or injection coating tin cream at the wiring layer Pad place of substrate surface, then in tin cream region, carries out surperficial accurate placement element, finally carries out reflow soldering again.
Shown in figure 32, above-mentioned current high-density base board surface mount process has the following disadvantages and defect the multilayer circuit board structure of conventional brush tin cream technique:
1, the glass putty in tin cream or tin grain have certain size, have limited to a certain extent print gap, and the precision of printing depends on the size of metal ingredient in tin cream, and conventional ability can be accomplished 50um, are difficult to accomplish highdensity design and manufacture;
2, the tin paste layer after coating is liquid (softer) and thicker (general 70-80um), is unfavorable for the spatial stability of control surface mount components;
3, tin cream is the pasty masses that many kinds of substance is mixed into, and mobility is relatively poor, easily forms welding zone bubble after reflow soldering, has reduced electrical stability;
4, mount components is carried out after Reflow Soldering, and tin cream is softening and element collapses over tin paste layer, easily causes space between element and line layer too small and cause the unfilled problem of follow-up encapsulation;
5, high-density base board circuit region and frame have certain thickness drop, in the process of brush tin cream the placement of printed steel mesh with to remove operation more difficult, and easily cause the skew of printed steel mesh position and tin cream part inhomogeneous, thereby can reduce the electrical property of connection.
Summary of the invention
The object of the invention is to overcome above-mentioned deficiency, a kind of SMT addition high-density packages multilayer circuit board structure and preparation method thereof is provided, it is parcel plating copper post on substrate surface circuit, Tin plating on copper post again, replace solder paste coating to form solid-state surface mount welding zone, thereby on the basis of high-density line design and fabrication, realize high performance electric connection and good reliability assurance.
The object of the present invention is achieved like this: a kind of SMT addition high-density packages multilayer circuit board structure, it comprises internal layer circuit layer and outer-layer circuit layer, between described internal layer circuit layer and outer-layer circuit layer, be provided with and connect copper post, described internal layer circuit layer be connected copper post periphery and be coated with insulating material, the described internal layer circuit layer back side is provided with SMT copper post, described SMT copper post surface is provided with tin layer, on described tin layer, be pasted with element, described SMT copper post, tin layer and element periphery are filled with epoxy resin, described outer-layer circuit layer surface and periphery are coated with sensitization insulating material, described sensitization insulating material offers and plants ball region in the position in outer-layer circuit layer front, described planting in ball region is provided with anti oxidation layer.
Described internal layer circuit layer and tin layer surface are provided with anti oxidation layer.
A manufacture method for SMT addition high-density packages multilayer circuit board structure, described method comprises following processing step:
Step 1, get metal support plate
At metal support plate electroplating surface one deck copper material film;
Step 3, subsides photoresistance film
At the metal support plate front and the back side that complete preplating copper material film, stick respectively the photoresistance film that can carry out exposure imaging, described photoresistance film can adopt wet type photoresistance film or dry type photoresistance film;
Part figure photoresistance film is carried out graph exposure, develops and removes in the metal support plate front that utilizes exposure imaging equipment that step 3 is completed to subsides photoresistance film, to expose the positive follow-up graphics field that need to carry out the plating of internal layer circuit layer of metal support plate;
In step 4, in the region of the positive removal of metal support plate part photoresistance film, electroplate metallic circuit layer as internal layer circuit layer;
Step 6, removal photoresistance film
Remove the photoresistance film on metal support plate surface;
The photoresistance film that can carry out exposure imaging is sticked respectively at the front and the back side that in step 5, complete the metal support plate of internal layer circuit layer plating;
Part figure photoresistance film is carried out graph exposure, develops and removes in the metal support plate front that utilizes exposure imaging equipment that step 7 is completed to subsides photoresistance film, to expose the positive follow-up needs of metal support plate, connects the graphics field that copper post is electroplated;
Step 9, plate bonding copper post
In step 8, in the region of the positive removal of metal support plate part photoresistance film, electroplate metal level as the copper post that connects internal layer circuit layer and outer-layer circuit layer;
Remove the photoresistance film on metal support plate surface;
At the positive one deck insulating material that covers of metal support plate, object is in order to do the insulating barrier between internal layer circuit layer and outer-layer circuit layer, to do basis for follow-up plating outer-layer circuit layer simultaneously;
Step 12, insulating material surface attenuate
Mechanical reduction is carried out in insulating material surface, until expose, connect copper post;
Step 13, insulating material surface metalation
Metalized is carried out in insulating material surface, make its follow-up can plating in surface;
Step 14, subsides photoresistance film
Stick the photoresistance film that can carry out exposure imaging completing metallized metal support plate front and the back side;
Step 15, development are windowed
Utilize exposure imaging equipment that part figure photoresistance film is carried out to graph exposure, develops and removes in metal support plate front, to expose the positive follow-up graphics field that need to carry out the plating of outer-layer circuit layer of metal support plate;
In step 15, in the region of the positive removal of metal support plate part photoresistance film, electroplate metallic circuit layer as outer-layer circuit layer;
Remove the photoresistance film on metal support plate surface;
Fast-etching is carried out in metal support plate front, remove outer-layer circuit layer metal in addition;
Complete the metal support plate front surface coated sensitization insulating material of outer-layer circuit layer;
Utilize exposure imaging equipment that part figure photoresistance film is carried out to graph exposure, develops and removes in metal support plate front, the graphics field processing to expose the positive follow-up needs of metal support plate;
Remove metal support plate and form the wiring board that exposes internal layer circuit layer;
The photoresistance film that can carry out exposure imaging is sticked respectively at the wiring board front and the back side that after removal metal support plate, form;
Utilize exposure imaging equipment that graph exposure is carried out to, develops and remove part figure photoresistance film, the graphics field of electroplating SMT copper post to expose the follow-up needs in the wiring board back side in the wiring board back side;
In step 2 13, in the region of circuit backboard face removal part photoresistance film, electroplate SMT copper post, for follow-up surface mount is prepared;
In step 2 14, electroplate electrotinning on the SMT copper post forming, for follow-up surface label is pretended place mat;
Remove the photoresistance film of PCB surface;
The metal level that wiring board front and back is exposed carries out organic protection;
Zinc-plated region on circuit backboard face SMT copper post applies and helps wlding material;
At circuit backboard face, apply and help the SMT copper post element pasted on surface of wlding material and carry out reflow soldering;
Step 3 ten, epoxy resin plastic packaging
In step 2 19, complete mount components and by Reflow Soldering, realize the wiring board back side being electrically connected and carry out epoxy resin plastic packaging.
Compared with prior art, the present invention has following beneficial effect:
1, the present invention adopts direct local selective electroplating soldering-tin layer, and the precision of welding zone is not limited to, and 20um left and right can be accomplished by area size, can accomplish highdensity design and manufacture;
2, the welding zone that mounts of the present invention adopts electro-coppering post re-plating process of tin and straight forming, and it is solid-state that welding zone is, the spatial stability of element while having improved surface mount, thus improved electrical property;
3, plating welding zone tin content approaches and very belongs to pure tin, can effectively reduce the rear risk that produces welding zone bubble of paster welding, has improved reliability;
4, the design of the copper post of welding zone of the present invention has increased the gap between mount components and line layer, while greatly reducing follow-up encapsulation, produces and seals unfilled risk;
5, the present invention adopts plate surface to mount welding zone to replace paste solder printing, can avoid the puzzlement of base plate line region and seal ring thickness drop on high-density base board, simple to operate and can avoid the inhomogeneous problem of solder paste coating.
Accompanying drawing explanation
Fig. 1 ~ Figure 30 is each operation schematic diagram of a kind of SMT addition of the present invention high-density packages manufacturing method of multi-layer circuit board.
Figure 31 is the schematic diagram of a kind of SMT addition of the present invention high-density packages multilayer circuit board structure.
Figure 32 is the schematic diagram of the multilayer circuit board structure of conventional brush tin cream technique.
Wherein:
Internal layer circuit layer 1
Connect copper post 2
Outer-layer circuit layer 3
Element 6
Insulating material 9
Embodiment
A kind of SMT addition of the present invention high-density packages multilayer circuit board structure, it comprises internal layer circuit layer 1 and outer-layer circuit layer 3, between described internal layer circuit layer 1 and outer-layer circuit layer 3, be provided with and connect copper post 2, described internal layer circuit layer 1 be connected copper post 2 peripheries and be coated with insulating material 9, described internal layer circuit layer 1 back side is provided with SMT copper post 4, described SMT copper post 4 surfaces are provided with tin layer 5, on described tin layer 5, be pasted with element 6, described SMT copper post 4, tin layer 5 and element 6 peripheries are filled with epoxy resin 7, described outer-layer circuit layer 3 surface and periphery are coated with sensitization insulating material 8, described sensitization insulating material 8 offers and plants ball region 11 in the position in outer-layer circuit layer 3 front, described planting is provided with anti oxidation layer 10 in ball region 11.
Described internal layer circuit layer 1 and tin layer 5 surface are provided with anti oxidation layer 10.
Its manufacture method is as follows:
Step 1, get metal support plate
Referring to Fig. 1, get the metal support plate that a slice thickness is suitable, the material of metal support plate can convert according to function and the characteristic of chip, such as: copper material, iron material, ferronickel material or zinc-iron material etc.;
Referring to Fig. 2, at metal support plate electroplating surface one deck copper material film, object is to do basis for follow-up plating, and the mode of described plating can adopt chemical plating or metallide;
Step 3, subsides photoresistance film
Referring to Fig. 3, at the metal support plate front and the back side that complete preplating copper material film, stick respectively the photoresistance film that can carry out exposure imaging, described photoresistance film can adopt wet type photoresistance film or dry type photoresistance film;
Referring to Fig. 4, part figure photoresistance film is carried out graph exposure, develops and removes in the metal support plate front that utilizes exposure imaging equipment that step 3 is completed to subsides photoresistance film, to expose the positive follow-up graphics field that need to carry out the plating of internal layer circuit layer of metal support plate;
Referring to Fig. 5, in step 4, in the region of the positive removal of metal support plate part photoresistance film, electroplate metallic circuit layer as internal layer circuit layer;
Step 6, removal photoresistance film
Referring to Fig. 6, remove the photoresistance film on metal support plate surface, removal method adopts chemical medicinal liquid softening (if desired and adopt high pressure water jets to remove);
Referring to Fig. 7, the photoresistance film that can carry out exposure imaging is sticked respectively at the front and the back side that in step 5, complete the metal support plate of internal layer circuit layer plating;
Referring to Fig. 8, part figure photoresistance film is carried out graph exposure, develops and removes in the metal support plate front that utilizes exposure imaging equipment that step 7 is completed to subsides photoresistance film, to expose the positive follow-up needs of metal support plate, connects the graphics field that copper post is electroplated;
Step 9, plate bonding copper post
Referring to Fig. 9, in step 8, in the region of the positive removal of metal support plate part photoresistance film, electroplate metal level as the copper post that connects internal layer circuit layer and outer-layer circuit layer;
Referring to Figure 10, remove the photoresistance film on metal support plate surface, the method for removing photoresistance film adopts chemical medicinal liquid softening (if desired and adopt high pressure water jets to remove);
Referring to Figure 11, at the positive one deck insulating material that covers of metal support plate, object is in order to do the insulating barrier between internal layer circuit layer and outer-layer circuit layer, to do basis for follow-up plating outer-layer circuit layer simultaneously;
Step 12, insulating material surface attenuate
Referring to Figure 12, mechanical reduction is carried out in insulating material surface, until expose, connect copper post.Object is to be connected with follow-up outer-layer circuit layer in order to make to connect copper post, can increase the adhesion of subsequent chemistry copper simultaneously;
Step 13, insulating material surface metalation
Referring to Figure 13, metalized is carried out in insulating material surface, make its follow-up can plating in surface;
Step 14, subsides photoresistance film
Referring to Figure 14, stick the photoresistance film that can carry out exposure imaging completing metallized metal support plate front and the back side;
Step 15, development are windowed
Referring to Figure 15, utilize exposure imaging equipment that part figure photoresistance film is carried out to graph exposure, develops and removes in metal support plate front, to expose the positive follow-up graphics field that need to carry out the plating of outer-layer circuit layer of metal support plate;
Referring to Figure 16, in step 15, in the region of the positive removal of metal support plate part photoresistance film, electroplate metallic circuit layer as outer-layer circuit layer;
Referring to Figure 17, remove the photoresistance film on metal support plate surface, the method for removing photoresistance film adopts chemical medicinal liquid softening (if desired and adopt high pressure water jets to remove);
Referring to Figure 18, fast-etching is carried out in metal support plate front, remove outer-layer circuit layer metal in addition;
Referring to Figure 19, complete the metal support plate front surface coated sensitization insulating material of outer-layer circuit layer;
Referring to Figure 20, utilize exposure imaging equipment that part figure photoresistance film is carried out to graph exposure, develops and removes in metal support plate front, to expose the positive follow-up needs of metal support plate, process the graphics field of (planting ball);
Referring to Figure 21, to remove metal support plate and form the wiring board that exposes internal layer circuit layer, etching solution can adopt copper chloride or iron chloride;
Referring to Figure 22, the photoresistance film that can carry out exposure imaging is sticked respectively at the wiring board front and the back side that after removal metal support plate, form;
Referring to Figure 23, utilize exposure imaging equipment that graph exposure is carried out to, develops and remove part figure photoresistance film, the graphics field of electroplating SMT copper post to expose the follow-up needs in the wiring board back side in the wiring board back side;
Referring to Figure 24, in step 2 13, in the region of circuit backboard face removal part photoresistance film, electroplate SMT copper post, for follow-up surface mount is prepared;
Referring to Figure 25, in step 2 14, electroplate electrotinning on the SMT copper post forming, for follow-up surface label is pretended place mat;
Referring to Figure 26, remove the photoresistance film of PCB surface;
Referring to Figure 27, the metal level that wiring board front and back is exposed carries out organic protection;
Referring to Figure 28, the zinc-plated region on circuit backboard face SMT copper post applies and helps wlding material;
Referring to Figure 29, at circuit backboard face, apply and help the SMT copper post element pasted on surface of wlding material and carry out reflow soldering;
Step 3 ten, epoxy resin plastic packaging
Referring to Figure 30, in step 2 19, complete mount components and by Reflow Soldering, realize the wiring board back side being electrically connected and carry out epoxy resin plastic packaging.
Claims (3)
1. a SMT addition high-density packages multilayer circuit board structure, it is characterized in that: it comprises internal layer circuit layer (1) and outer-layer circuit layer (3), between described internal layer circuit layer (1) and outer-layer circuit layer (3), be provided with and connect copper post (2), described internal layer circuit layer (1) be connected copper post (2) periphery and be coated with insulating material (9), described internal layer circuit layer (1) back side is provided with SMT copper post (4), described SMT copper post (4) surface is provided with tin layer (5), on described tin layer (5), be pasted with element (6), described SMT copper post (4), tin layer (5) and element (6) periphery are filled with epoxy resin (7), described outer-layer circuit layer (3) surface and periphery are coated with sensitization insulating material (8), described sensitization insulating material (8) offers and plants ball region (11) in the positive position of outer-layer circuit layer (3), described planting is provided with anti oxidation layer (10) in ball region (11).
2. a kind of SMT addition high-density packages multilayer circuit board structure according to claim 1, is characterized in that: described internal layer circuit layer (1) and tin layer (5) surface are provided with anti oxidation layer (10).
3. a manufacture method for SMT addition high-density packages multilayer circuit board structure, is characterized in that described method comprises following processing step:
Step 1, get metal support plate
Step 2, metal support plate surface preplating copper material
At metal support plate electroplating surface one deck copper material film;
Step 3, subsides photoresistance film
At the metal support plate front and the back side that complete preplating copper material film, stick respectively the photoresistance film that can carry out exposure imaging;
Step 4, development are windowed
Part figure photoresistance film is carried out graph exposure, develops and removes in the metal support plate front that utilizes exposure imaging equipment that step 3 is completed to subsides photoresistance film, to expose the positive follow-up graphics field that need to carry out the plating of internal layer circuit layer of metal support plate;
Step 5, plating internal layer circuit layer
In step 4, in the region of the positive removal of metal support plate part photoresistance film, electroplate metallic circuit layer as internal layer circuit layer;
Step 6, removal photoresistance film
Remove the photoresistance film on metal support plate surface;
Step 7, subsides photoresistance film
The photoresistance film that can carry out exposure imaging is sticked respectively at the front and the back side that in step 5, complete the metal support plate of internal layer circuit layer plating;
Step 8, development are windowed
Part figure photoresistance film is carried out graph exposure, develops and removes in the metal support plate front that utilizes exposure imaging equipment that step 7 is completed to subsides photoresistance film, to expose the positive follow-up needs of metal support plate, connects the graphics field that copper post is electroplated;
Step 9, plate bonding copper post
In step 8, in the region of the positive removal of metal support plate part photoresistance film, electroplate metal level as the copper post that connects internal layer circuit layer and outer-layer circuit layer;
Step 10, removal photoresistance film
Remove the photoresistance film on metal support plate surface;
Step 11, covering insulating material layer
At the positive one deck insulating material that covers of metal support plate;
Step 12, insulating material surface attenuate
Mechanical reduction is carried out in insulating material surface, until expose, connect copper post;
Step 13, insulating material surface metalation
Metalized is carried out in insulating material surface, make its follow-up can plating in surface;
Step 14, subsides photoresistance film
Stick the photoresistance film that can carry out exposure imaging completing metallized metal support plate front and the back side;
Step 15, development are windowed
Utilize exposure imaging equipment that part figure photoresistance film is carried out to graph exposure, develops and removes in metal support plate front, to expose the positive follow-up graphics field that need to carry out the plating of outer-layer circuit layer of metal support plate;
Step 10 six, plating outer-layer circuit layer
In step 15, in the region of the positive removal of metal support plate part photoresistance film, electroplate metallic circuit layer as outer-layer circuit layer;
Step 10 seven, removal photoresistance film
Remove the photoresistance film on metal support plate surface;
Step 10 eight, fast-etching
Fast-etching is carried out in metal support plate front, remove outer-layer circuit layer metal in addition;
Step 10 nine, coating sensitization insulating material
Complete the metal support plate front surface coated sensitization insulating material of outer-layer circuit layer;
Step 2 ten, development are windowed
Utilize exposure imaging equipment that part figure photoresistance film is carried out to graph exposure, develops and removes in metal support plate front, the graphics field processing to expose the positive follow-up needs of metal support plate;
Step 2 11, removal metal support plate
Remove metal support plate and form the wiring board that exposes internal layer circuit layer;
Step 2 12, subsides photoresistance film
The photoresistance film that can carry out exposure imaging is sticked respectively at the wiring board front and the back side that after removal metal support plate, form;
Step 2 13, development are windowed
Utilize exposure imaging equipment that graph exposure is carried out to, develops and remove part figure photoresistance film, the graphics field of electroplating SMT copper post to expose the follow-up needs in the wiring board back side in the wiring board back side;
Step 2 14, plating SMT copper post
In step 2 13, in the region of circuit backboard face removal part photoresistance film, electroplate SMT copper post, for follow-up surface mount is prepared;
Step 2 15, electrotinning
In step 2 14, electroplate electrotinning on the SMT copper post forming, for follow-up surface label is pretended place mat;
Step 2 16, removal photoresistance film
Remove the photoresistance film of PCB surface;
Step 2 17, carry out the organic protection of metal
The metal level that wiring board front and back is exposed carries out organic protection;
Step 2 18, coating help wlding material
Zinc-plated region on circuit backboard face SMT copper post applies and helps wlding material;
Step 2 19, mount components Reflow Soldering
At circuit backboard face, apply and help the SMT copper post element pasted on surface of wlding material and carry out reflow soldering;
Step 3 ten, epoxy resin plastic packaging
In step 2 19, complete mount components and by Reflow Soldering, realize the wiring board back side being electrically connected and carry out epoxy resin plastic packaging.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310648040.2A CN103596358B (en) | 2013-12-04 | 2013-12-04 | SMT addition high-density packages multilayer circuit board structure and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310648040.2A CN103596358B (en) | 2013-12-04 | 2013-12-04 | SMT addition high-density packages multilayer circuit board structure and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103596358A true CN103596358A (en) | 2014-02-19 |
| CN103596358B CN103596358B (en) | 2016-11-23 |
Family
ID=50086285
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310648040.2A Active CN103596358B (en) | 2013-12-04 | 2013-12-04 | SMT addition high-density packages multilayer circuit board structure and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103596358B (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103874347A (en) * | 2014-03-28 | 2014-06-18 | 江苏长电科技股份有限公司 | Novel high-intensity high-performance multilayer substrate surface symmetrical structure and manufacturing method |
| CN106783794A (en) * | 2017-03-16 | 2017-05-31 | 江阴芯智联电子科技有限公司 | It is pre-packaged without wire electrodepositable lead-frame packages structure and its manufacture method |
| CN107403770A (en) * | 2016-08-29 | 2017-11-28 | 上海兆芯集成电路有限公司 | Electronic structure and electronic structure array |
| WO2022242065A1 (en) * | 2021-05-19 | 2022-11-24 | 惠州市金百泽电路科技有限公司 | Manufacturing method applied to coreless board of high-density interconnect circuit board |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1792126A (en) * | 2003-05-19 | 2006-06-21 | 大日本印刷株式会社 | Double-sided wiring board and manufacturing method of double-sided wiring board |
| TW200929388A (en) * | 2007-12-26 | 2009-07-01 | Stats Chippac Ltd | Semiconductor device and method of forming the device using sacrificial carrier |
| KR101100946B1 (en) * | 2006-12-13 | 2011-12-29 | 인텔 코포레이션 | Microelectronic device including bridging interconnect to top conductive layer of passive embedded structure and method of making same |
| CN203608451U (en) * | 2013-12-04 | 2014-05-21 | 江苏长电科技股份有限公司 | SMT addition high-density packaged multilayer circuit board structure |
-
2013
- 2013-12-04 CN CN201310648040.2A patent/CN103596358B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1792126A (en) * | 2003-05-19 | 2006-06-21 | 大日本印刷株式会社 | Double-sided wiring board and manufacturing method of double-sided wiring board |
| KR101100946B1 (en) * | 2006-12-13 | 2011-12-29 | 인텔 코포레이션 | Microelectronic device including bridging interconnect to top conductive layer of passive embedded structure and method of making same |
| TW200929388A (en) * | 2007-12-26 | 2009-07-01 | Stats Chippac Ltd | Semiconductor device and method of forming the device using sacrificial carrier |
| CN203608451U (en) * | 2013-12-04 | 2014-05-21 | 江苏长电科技股份有限公司 | SMT addition high-density packaged multilayer circuit board structure |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103874347A (en) * | 2014-03-28 | 2014-06-18 | 江苏长电科技股份有限公司 | Novel high-intensity high-performance multilayer substrate surface symmetrical structure and manufacturing method |
| CN107403770A (en) * | 2016-08-29 | 2017-11-28 | 上海兆芯集成电路有限公司 | Electronic structure and electronic structure array |
| CN106783794A (en) * | 2017-03-16 | 2017-05-31 | 江阴芯智联电子科技有限公司 | It is pre-packaged without wire electrodepositable lead-frame packages structure and its manufacture method |
| CN106783794B (en) * | 2017-03-16 | 2019-03-22 | 江阴芯智联电子科技有限公司 | Pre-packaged no conducting wire electrodepositable lead-frame packages structure and its manufacturing method |
| WO2022242065A1 (en) * | 2021-05-19 | 2022-11-24 | 惠州市金百泽电路科技有限公司 | Manufacturing method applied to coreless board of high-density interconnect circuit board |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103596358B (en) | 2016-11-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10074614B2 (en) | EMI/RFI shielding for semiconductor device packages | |
| CN102446882B (en) | Semiconductor PiP (package in package) system structure and manufacturing method thereof | |
| US10490478B2 (en) | Chip packaging and composite system board | |
| CN102543937B (en) | Flip chip on-chip package and manufacturing method thereof | |
| CN102354691B (en) | Quad flat non-lead (QFN) package with high density and manufacturing method | |
| CN202948918U (en) | Package substrate and package structure of semiconductor component | |
| CN102543907B (en) | Package and manufacture method for thermal enhanced quad flat no-lead flip chip | |
| US20160148861A1 (en) | First-packaged and later-etched three-dimensional flip-chip system-in-package structure and processing method therefor | |
| CN102339809B (en) | QFN (quad flat non-lead) package with multiple circles of pins and manufacturing method thereof | |
| TW201719851A (en) | An electromagnetic shielding package assembly and manufacturing method thereof | |
| CN103456645B (en) | First lose and seal three-dimensional systematic chip afterwards and just filling stack package structure and processing method | |
| CN102386106A (en) | Partially patterned lead frames and methods of making and using the same in semiconductor packaging | |
| US20140117553A1 (en) | Packaging substrate, method for manufacturing same, and chip packaging body having same | |
| CN103794587A (en) | Embedded type rewiring line packaging structure of chip with good heat dissipation performance and manufacturing method thereof | |
| CN103596358A (en) | SMT addition high-density packaged multi-layer circuit board structure and manufacturing method thereof | |
| CN102354689B (en) | Quad flat non-lead (QFN) package with leads arranged in plane array and manufacturing method | |
| KR20170002830A (en) | Electronic component module and manufacturing method threrof | |
| CN103165475B (en) | A kind of manufacture method of semiconductor packing device | |
| CN104299919A (en) | Coreless package structure and method for manufacturing the same | |
| CN103887256A (en) | High-cooling-performance chip-embedded type electromagnetic shielding encapsulating structure and manufacturing method thereof | |
| CN103607841A (en) | SMT subtraction high-density packaged multilayer circuit board structure and manufacturing method thereof | |
| CN203608451U (en) | SMT addition high-density packaged multilayer circuit board structure | |
| CN203608452U (en) | SMT subtraction high-density packaged multilayer circuit board structure | |
| CN203787410U (en) | High radiating chip embedded electromagnetic shielding packaging structure | |
| CN104091790A (en) | Semiconductor packaging substrate structure and manufacturing method of semiconductor packaging substrate structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |