CN103594568A - 半导体器件及其制作方法 - Google Patents
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Abstract
本发明公开了一半导体器件及其制作方法,其半导体器件,至少包括:发光外延叠层,具有上、下两个主表面;第一导电层,形成于所述发光外延叠层的第一表面上;第一封装层,包覆所述第一导电层;第二导电层,形成于所述发光外延叠层的第二表面上;第二封装层,包覆所述第二导电层;其中,所述第一、第二封装层保护所述半导体器件。本发明直接在芯片工艺端制作封装,可有效提高良率以及降低生产成本。
Description
技术领域
本发明涉及一种半导体器件及其制作方法,尤其是涉及一种无使用固晶胶、无衬底基材、无打线工艺和无支架使用的半导体器件及其制作方法。
背景技术
发光二极管(LED,Light Emitting Diode)由于具有寿命长、耗能低等优点,应用于各种领域,尤其随着其照明性能指标日益大幅提升,LED的应用越来越广泛,例如用于光学显示装置、交通号志、数据储存装置、通信装置及照明装置等。
传统LED器件的制作方法一般是先由上游厂商进行芯片工艺再由下游厂商进行封装工艺, 彼此工艺独立分开进行,具体是将LED芯粒透过透明胶或是银胶固晶于支架中,再经由打线与盖胶方式进行封装步骤。其具体结构如图1所示,主要设有一具凹槽A1的基座A,该凹槽A1内结合有一芯片B,该芯片B再通过一连结线C与另一支架D连结,最后再借助一透光层E的注塑成型,将基座A、芯片B、连结线C及另一支架D结合为一体,完成半导体器件的制作,步骤较为繁杂。
同时,上述传统的半导体器件接通电源时,由于芯片被结合于基座的凹杯中,该芯片周缘及底面所发射的光均被凹杯阻挡、反射,故该芯片仅发出正向光,于该发光二极管的背侧无法看到其所发出的光。
发明内容
本发明提供一种半导体器件及其制作方法,其直接在芯片工艺端制作封装,可有效提高良率以及降低生产成本。
根据本发明的第一个方面,半导体器件的制作方法,包括步骤:
1)提供一外延片,其具有生长衬底及形成于生长衬底之上的发光外延叠层;
2)在所述发光外延叠层的上表面上制作第一导电层;
3)在所述第一导电层之上包覆第一封装层;
4)移除生长衬底,露出所述发光外延叠层的下表面;
5)在所述发光外延叠层的下表面制作第二导电层;
6)在所述第二导电层上包覆第二封装层;
7)按半导体器件的尺寸,切割形成一系列半导体器件。
根据本发明的第二个方面:半导体器件,包括:
发光外延叠层,具有上、下两个主表面;
第一导电层,形成于所述发光外延叠层的第一表面上;
第一封装层,包覆所述第一导电层;
第二导电层,形成于所述发光外延叠层的第二表面上;
第二封装层,包覆所述第二导电层;
其中,所述第一、第二封装层保护所述半导体器件。
根据本发明的第三个方面,半导体器件,包括:
发光外延叠层,依次具有第一半导体层,有源层和第二半导体层;
至少一导电层,形成于所述发光外延叠层的第二半导体层之上;
至少两个电极结构,分别与所述导电层和第一半导体层连接;
封装层,包覆所述第一导电层及电极结构,但不包覆器件的外围侧壁,用于封装所述发光外延叠层。
根据本发明的第四个方面,半导体器件的制作方法,包括步骤:
1)提供一外延片,其具有生长衬底及形成于生长衬底之上的发光外延叠层,依次具有第一半导体层,有源层和第二半导体层;
2)在所述发光外延叠层的上表面上制作导电层;
3)分别在所述导电层和第一半导体层上制作电极结构;
4)制作封装层,其包覆所述第一导电层及电极结构,用于封装所述发光外延叠层;
5)按半导体器件的尺寸,切割形成一系列半导体器件。
根据本发明的第五个方面,半导体器件的制作方法,包括步骤:
1)提供一外延片,其具有生长衬底及形成于生长衬底之上的发光外延叠层;
2)根据芯片的尺寸在所述外延片表面上定义芯片区域和分离区域,去除分离区域的发光外延叠层露出生长衬底的表面,形成一系列彼此分离的发光外延叠层单元;
3)在所述各个发光外延叠层单元的上表面上制作第一导电层;
4)在所述第一导电层之上包覆第一封装层,并填充所述发光外延叠层单元之间的间隙;
5)移除生长衬底,露出所述发光外延叠层的下表面;
6)在所述发光外延叠层的下表面制作第二导电层;
7)在所述第二导电层之上包覆第二封装层;
8)沿着所述分离区域切割形成一系列半导体器件,所述第一、第二封装层保护所述半导体器件;
其中,所述第一、第二导电层至少其中一层具有透光性。
根据本发明的第六个方面,半导体装置,包括:基座,其具有一个安装槽,内部设有电路;半导体器件,包括:发光外延叠,具有上、下两个主表面;第一导电层,形成于所述发光外延叠层的第一表面上;第一封装层,包覆所述第一导电层;第二导电层,形成于所述发光外延叠层的第二表面上;第二封装层,包覆所述第二导电层;第一、第二电极,分别形成于所述第一、第二封装层的边缘区域,与所述第一、第二导电层形成欧姆接触,两者在外延叠层上的投影基本重叠;其中,所述第一、第二封装层保护所述半导体器件;所述安装槽的大小与所述半导体器件的尺寸匹配,所述半导体器件直立安装于所述安装槽内,具有第一、第二电极的一端与所述安装槽连接,并与所述内部电路连接。所述半导体器件与所述基座的安装槽形成插接,实现全方位出光。
根据本发明的第七个方面,发光装置,由基座和芯片构成,其中所述基座上设有至少一个安装槽,其内壁设有连接电路;所述芯片,具有侧壁及上、下两个主表面,包括:发光外延叠层,至少两个电极,分别形成于上、下主表面的边沿;所述芯片直立安装于所述安装槽内,其上、下主表面与所述基座相交,实现全方位出光。
具体地,所述发光外延叠层一般至少具有n型半导体层、有源层和p型半导体层,可发射红光、绿光、蓝光、紫外光等可见光谱。进一步地,在第一封装层或第二封装层中掺入光转换材料(如萤光粉)或扩散剂以改变LED芯粒光型或是形成白光LED芯粒。在一些实施例中,可在所述发光外延叠层的出光面上制作光萃取结构。在一些实施例中,所述发光外延叠层为单面出光,其中非出光面一侧具有反射结构。
所述导电层位于发光外延叠的上、下两个表面之上,用于与外延叠层形成欧姆接触。所述发光外延叠层的上、下两个表面至少一个为出光面,位于其上的导电层具有透光性。在一些实施例中,所述导电层可为电流扩展条设计或电流扩展层设计,当为电流扩展层设计时,一般选用透光材料,当为电流扩展条设计时可采用金属材料。
在所述半导体器件中,电极可以使用电镀或是化镀方式制作,位于半导体发光外延叠层的相异侧边,主要依照应用端设计而改变。
所述第一、第二封装层覆盖所所述第一、第二导电层,仅预留电极区,用于封装保护所述发光外延叠层结构。优选的,所述第一、第二封装层的厚度取1μm~1500μm。所述封装层可为平板形状,亦可为成透镜形状或其他所需光学应用的任意几何形状。在一些实施例中,可在第一、第二封装层外再黏着平板玻璃或高透光性塑料材料,强化保护层。优选地,所述玻璃或塑料材料可为光学透镜,如凸透镜或凹透镜。进一步地,可在光学透镜表成面上或内部涂布荧光粉或扩散剂。
本发明至少包括下面优点:
本发明的创新点在于:直接在芯粒工艺端整合芯粒制程与封装技术,在后续应用端完全取消封装概念,其至少具备以下有益效果:1)透过芯粒工艺与封装技术的整合,可设计出垂直芯粒应用,将有别于现在传统芯粒平躺式应用。2)因为芯粒与封装技术的整合,将有助于缩小芯粒封装的体积,可减少热流距离(材料热阻与接口热阻数量达到优选散热效果),并同时提升芯粒封装整合组件空气热对流效益。3)芯粒与封装技术的整合,可在芯片工艺端达到直接分档效果, 无须再经由传统封装技术的固晶、打线、盖胶、分档等工艺流程。4)芯粒与封装技术的整合,可缩短工艺流程以及减少物料使用(如硅衬底使用、厚金蒸镀、背金蒸镀等),如此可以大幅降低所需成本。5)所述发光器件配合基座形成直立式安装,实现全方位出光。
本发明的其它特征和优点将在随后的说明书中阐述,并且,部分地从说明书中变得显而易见,或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
附图用来提供对本发明的进一步理解,并且构成说明书的一部分,与本发明的实施例一起用于解释本发明,并不构成对本发明的限制。此外,附图数据是描述概要,不是按比例绘制。
图1是现有发光二极管的剖面示意图。
图2为本发明实施例1之半导体器件的剖面示意图。
图3显示了实施例1的第一个变形实施例。
图4显示了实施例1的第二个变形实施例。
图5显示了实施例1的第三个变形实施例。
图6~14是本发明实施例1制作发光二极管器件的剖面示意图。
图15是本发明实施例2之半导体器件的剖面示意图。
图16是本发明实施例3之半导体器件的剖面示意图。
图17是本发明实施例4之发光装置的剖面示意图。
具体实施方式
本发明的核心在于:在LED器件制作工艺中,直接在芯粒工艺端整合芯粒制程与封装技术,获得一种无固晶胶和封装支架的半导体器件。下面将结合附图及实施例来详细说明本发明的实施方式,借此对本发明如何应用技术手段来解决技术问题,并达成技术效果的实现过程能充分理解并据以实施。
实施例1
请参考图2,一种半导体器件,包括:发光外延叠层,上、下表面具有第一、第二导电层,在导电区上制作电极,并直接覆盖封装层,用于封装保护所述发光外延叠层。其中,发光外延叠层包含第一半导体层110、有源层120和第二半导体层130,在第一半导体层110和第二半导体表面上制作有光萃取结构(纹理化处理)。第一导电层210位于第一半导体层110的表面上,第二导电层220位于第二半导体层120的表面上,其均为透光性导电材料,如ITO、IZO、GZO、AZO、AGZO等。第一、第二电极410、420分别位于第一、第二导电层上,用于连接外部电源。第一封装层310完全覆盖第一导电层210,第二封装层320完全覆盖第二导电层220,从而保护发光外延叠层。
在本实施例中,半导体器件结构通过芯粒与封装工艺的结合,可达到微型化LED芯粒,此优点可于光学设计的应用上体现出来,如虚拟实境投影应用、微投影应用、全彩可折式电子纸或可折式面板背光源应用、全彩式智能型手表背光源应用、可照相式隐形眼镜、可扫描复印式隐形眼镜及照相机电子景观窗应用设计等高端市场应用。
前述半导体器件的制作方法其主要包括:外延生长形成外延片(wafer);图案外延片化以形成芯片分离区域;在各个芯片区域形成第一导电结构;制作第一电极;覆盖第一封装层;移除生长衬底;制作第二导电层;制作第二电极;覆盖第二封装层;切割形成具有封装结构的芯粒。下面结合附图6~14对前述半导体器件的制备方法做简单说明。
如图6所示,采用外延生长方法提供外延片100,其包括生长衬底001、n型半导体层110,有源层120和p型半导体层130。应当注意的是,外延片还可包括还其他外延材料层,如缓冲层、欧姆接触层、窗口层等。
如图7所示,根据芯片的尺寸,图案化外延片以形成芯片分离区域。
如图8所示,在每个芯片区域上形成ITO层作为第二导电层220。
如图9所示,在第二导电层220上制作第二电极420;并在第二导电层除电极区域的其它区域覆盖第二封装层320,其同时覆盖每个芯片区域之间的间隙,形成一平整面。封装层的厚度足够支撑外延片结构,用于保护外延层,一般取1μm~1500μm,在本实施例中,取1000μm。
如图10所示,移除生长衬底001,露出n型半导体层110的表面。
如图11所示,在露出n型半导体层110的表面上形成ITO层作为第一导电层210,其位置与第二导电层的位置对应。
如图12所示,在第一导电层210上制作第一电极410。
如图13所示,在第一导电层除电极区域的其它区域覆盖第一封装层310,其同时覆盖每个芯片区域之间的间隙,形成一平整面。
如图14所示,沿着6图所示的切割道切割形成一系列带封装结构的垂直LED半导体器件。
在上述制作方法中,在电极制作工艺后直接进行盖胶工艺,大幅减少繁琐的生产流程,降低生产成本。
变形例1
如图3所示,其中发光外延叠层的材料为氮化镓基材料,在封装层中掺入荧光粉500,用于激发白光。
变形例2
如图4所示,封装层320为镜面结构。
变形例3
区别于前面各个实施例的双面出光结构,本变形实施例为单面出光出结构,如图5所示,在第一封装层310与第一导电层210中还设有反射结构600。
实施例2
请参看附图15,生长衬底001为透光性材料,如Al2O3、AlN、GaP等。N型半导体层110、有源层120和P型半导体层130依次叠层于生长衬底上,导电层200形成于P型半导体层130上,第一电极410形成于N型半导体层110上,第二电极420形成于导电层200上,封装层300覆盖在整个导电层200上,并包裹第一、第二电极的侧壁,与第一、第二电极形成一个平整的表面。做作一个变型实施例,第一、第二电极可高出封装层300的顶面。其中封装层的材料可为硅胶。
实施例3
请参看附图16,区别于实施例1,在本实施例中,第二封装层320同时包覆了外延层的侧壁,从而更好的保护发光外延叠层。在制作方法上区别于实施例1的地方在于:先将外延层的发光外延叠层分割为一系列彼此相互分离的单元(可采用ICP蚀刻工艺),接着在各个单元的表面上制作第二导电层220,再接着制作第二电极420,然后在第二导电层220上覆盖第二封装层320,其填充所述各个外延单元之间的间隙,接着按实施例1的方法进行后序步骤从而获得一个具有侧壁保护的半导体器件。
实施例4
请参看附图17,一种发光装置,包括基座500和芯片,其中芯片采用实施例3所示结构,基座500具有一个安装槽,内部设有电路,安装槽的大小与芯片的尺寸匹配,该芯片直立安装于安装槽内,具有第一、第二电极的一端与所述安装槽连接,并与所述安装槽内侧的电接触点510、520连接,从而接通外部电源。
在本实施例,芯片采用插接方式直立安装于基座安装槽内,由于芯片仅一小部分位于基座的安装槽内,而芯片本身的各个面均可出光,从而实现全方位出光。
Claims (16)
1.半导体器件的制作方法,包括步骤:
1)提供一外延片,其具有生长衬底及形成于生长衬底之上的发光外延叠层;
2)在所述发光外延叠层的上表面上制作第一导电层;
3)在所述第一导电层之上包覆第一封装层;
4)移除生长衬底,露出所述发光外延叠层的下表面;
5)在所述发光外延叠层的下表面制作第二导电层;
6)在所述第二导电层之上包覆第二封装层;
7)按半导体器件的尺寸,切割形成一系列半导体器件。
2.根据权利要求1所述的半导体器件的制作方法,其特征在于:在完成步骤3)和步骤6)后,还分别包括制作电极步骤:分别在所述第一、第二封装层上定义电极位置并制作电极,其与所述导电层形成欧姆接触。
3.根据权利要求1所述的半导体器件的制作方法,其特征在于:在完成步骤2)和步骤5)后,先在所述第一、第二导电层表面上定义电极区,再进行步骤3)和步骤6),所述封装层不覆盖所述电极区,完成步骤3)和步骤6)后分别在所述第一、第二导电层的电极区制作电极,其与所述导电层形成欧姆接触。
4.根据权利要求2或3所述的半导体器件的制作方法,其特征在于:所述在第一、第二导电层上形成的电极位于所述半导体器件的边缘区域,两者在外延叠层上的投影基本重叠。
5.根据权利要求1所述的半导体器件的制作方法,其特征在于:所述提供的外延片发射波长为315~1600nm。
6.根据权利要求1所述的半导体器件的制作方法,其特征在于:所述步骤3)和步骤6)形成的第一、第二封装层的厚度为1μm ~ 1500μm。
7.半导体器件,包括:
发光外延叠层,具有上、下两个主表面;
第一导电层,形成于所述发光外延叠层的第一表面上;
第一封装层,包覆所述第一导电层;
第二导电层,形成于所述发光外延叠层的第二表面上;
第二封装层,包覆所述第二导电层;
其中,所述第一、第二封装层保护所述半导体器件。
8.根据权利要求7所述的半导体器件,其特征在于:还包括第一、第二电极,其分别形成于所述第一、第二封装层,与所述第一、第二导电层形成欧姆接触。
9.根据权利要求8所述的半导体器件,其特征在于:所述第一、第二电极位于所述半导体器件的边缘区域,两者在外延叠层上的投影基本重叠。
10.根据权利要求7所述的半导体器件,其特征在于:所述第一、第二导电层为电流扩展层或电流扩展条。
11.根据权利要求7所述的半导体器件,其特征在于:所述发光外延叠层的发射波长为315~1600nm。
12.根据权利要求8所述的半导体器件,其特征在于:所述第一、第二封装层中至少其一能够支撑所述发光外延叠层。
13.根据权利要求8所述的半导体器件,其特征在于:所述第一、第二封装层的厚度为1μm ~ 1500μm。
14.半导体装置,包括:
基座,其具有一个安装槽,内部设有电路;
半导体器件,包括:发光外延叠,具有上、下两个主表面;第一导电层,形成于所述发光外延叠层的第一表面上;第一封装层,包覆所述第一导电层;第二导电层,形成于所述发光外延叠层的第二表面上;第二封装层,包覆所述第二导电层;第一、第二电极,分别形成于所述第一、第二封装层的边缘区域,与所述第一、第二导电层形成欧姆接触,两者在外延叠层上的投影基本重叠;其中,所述第一、第二封装层保护所述半导体器件;
所述安装槽的大小与所述半导体器件的尺寸匹配,所述半导体器件直立安装于所述安装槽内,具有第一、第二电极的一端与所述安装槽连接,并与所述内部电路连接。
15.根据权利要求14所述的半导体装置,其特征在于:所述半导体器件与所述基座的安装槽形成插接。
16.根据权利要求14所述的半导体装置,其特征在于:所述半导体器件实现全方位出光。
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