CN103594450B - A kind of electrically programmable fuse structure of semiconductor device - Google Patents
A kind of electrically programmable fuse structure of semiconductor device Download PDFInfo
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- CN103594450B CN103594450B CN201210287397.8A CN201210287397A CN103594450B CN 103594450 B CN103594450 B CN 103594450B CN 201210287397 A CN201210287397 A CN 201210287397A CN 103594450 B CN103594450 B CN 103594450B
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Abstract
The present invention relates to a kind of electrically programmable fuse structure of semiconductor device, comprising: fuse element; The first end interconnected with described fuse element and the second end; The connecting portion shape triangular in shape of described first end and described the second end and described fuse element, and the obtuse angle that described in connecting portion place, the edge of first end and the second end edge and described fuse element is formed is 135 °, wherein said first end and the second end respectively have four rectangular contact holes, form the contact array of 2 × 2, for electrical connection.Fuse-wires structure of the present invention very easily can obtain high and consistent final resistance, thus avoid the adverse effect the infringement avoided between adjacent devices that rupture or condense, structure of the present invention is conducive to allowing lower program voltage, electric current and/or programming time.
Description
Technical field
The present invention relates to semiconductor applications, particularly, the present invention relates to a kind of electrically programmable fuse structure of semiconductor device.
Background technology
In the integrated circuit comprising CMOS, usually wishing can permanent storage information, and the latter forms the permanent connection of integrated circuit after fabrication.Usually the fuse of fusible connection or device can be selected to realize described object.Such as, fuse also may be used for redundant element of programming, to substitute same failed element.In addition, fuse can be used for storage chip mark or other such information, or for carrying out regulating circuit speed by the resistance of adjustment path.
A class in described fuse-wire device is programmed by laser or is blown, to disconnect after and passivation processed at semiconductor device, this type of fuse-wire device does not need laser accurately to aim on fuse-wire device, and required precision is very high, not then can cause the damage of adjacent devices; In addition, such fuse-wire device can not use together with many later technologies.
At present, that used is mostly electrically programmable fuse structures (ElectricallyProgrammableFuseStructure in the semiconductor device, E-fuse), the disposable electrically programmable fuse of E-fuse is generally applied due to its circuit provided and system design flexibility.Even also can programme to E-fuse after by ic chip package and installation in systems in which.E-fuse can also provide freely changing circuit design, and the latter solves in life of product the various problems that may occur.Less relative to ablative-type protective coating fuse E-fuse, thus there is current densities advantage.Although E-fuse has above-mentioned various advantages, but also have drawback, such as now E-fuse usually need the to be above standard voltage of supply voltage is programmed, but along with technical development operating voltage reduces rapidly, so the electrician obtained in the too high voltage meeting accentuation techniques of programming E-fuse is restricted, and the resistance of current E-fuse also can change, and brings a lot of problem to the application of E-fuse.
In order to make E-fuse better be more widely used in chip industry, the problem solved is needed to be the program voltage and the electric current that need to reduce E-fuse at present.
Summary of the invention
In summary of the invention part, introduce the concept of a series of reduced form, this will further describe in embodiment part.Summary of the invention part of the present invention does not also mean that the key feature and essential features that will attempt to limit technical scheme required for protection, does not more mean that the protection range attempting to determine technical scheme required for protection.
The present invention, in order to overcome current existing problems, provides a kind of electrically programmable fuse structure of semiconductor device, comprising:
Fuse element;
The first end interconnected with described fuse element and the second end;
The connecting portion shape triangular in shape of described first end and described the second end and described fuse element, and the obtuse angle that described in connecting portion place, the edge of first end and the second end edge and described fuse element is formed is 135 °, wherein said first end and the second end respectively have four rectangular contact holes, form the contact array of 2 × 2, for electrical connection.
As preferably, described fuse element comprises:
Insulating barrier, is positioned in Semiconductor substrate;
Gate oxide, is positioned on described insulating barrier;
Polysilicon layer, is positioned on described gate oxide;
Silicide layer, is positioned on described polysilicon layer;
Nitride cap layer, is positioned on described silicide layer.
As preferably, described insulating barrier is oxide skin(coating).
As preferably, described silicide layer is silicon cobalt substrate.
As preferably, described polysilicon layer is the doping of P type or N-type doping.
As preferably, be 60-100nm for connecting the width in the region of described first end and described the second end in described fuse element.
As preferably, for connecting 4-10 times that the length in the region of described first end and described the second end is described width in described fuse element.
As preferably, described first end is negative electrode or anode, and what described the second end was corresponding is anode or negative electrode.
In the un-programmed state, the resistance that described fuse connects is by gate oxide, polysilicon layer and the resistor coupled in parallel separately of silicide layer above form, the initial resistance provided in an embodiment of the present invention is 80-150 ohm, generally preferably be less than 100 ohm, the fuse being less than existing suitable size can obtain resistance, then on conductive fuel join domain 101, current potential is applied by contact hole 104, described voltage is generally 0.9-2.5 volt, also can produce energy consumption on described fuse simultaneously, the energy consumption that fuse element connects adds the resistance that fuse connects.Polysilicon layer due to such as crystalline silicon does not have the defect of such as crystal boundary, therefore very effective realization can programme, thus makes E-fuse of the present invention very have efficiency yet, needs less area to support circuit thus.
Fuse-wires structure of the present invention very easily can obtain high and consistent final resistance, thus avoid the adverse effect the infringement avoided between adjacent devices that rupture or condense, structure of the present invention is conducive to allowing lower program voltage, electric current and/or programming time.
Accompanying drawing explanation
Following accompanying drawing of the present invention in this as a part of the present invention for understanding the present invention.Shown in the drawings of embodiments of the invention and description thereof, be used for explaining device of the present invention and principle.In the accompanying drawings,
Fig. 1 is the vertical view of electrically programmable fuse described in the present invention;
Fig. 2 is electrically programmable fuse sectional view of the present invention.
Embodiment
In the following description, a large amount of concrete details is given to provide more thorough understanding of the invention.But, it is obvious to the skilled person that the present invention can be implemented without the need to these details one or more.In other example, in order to avoid obscuring with the present invention, technical characteristics more well known in the art are not described.
In order to thoroughly understand the present invention, by following description, detailed description is proposed, so that the electrically programmable fuse structure of semiconductor device of the present invention to be described.Obviously, the specific details that the technical staff that execution of the present invention is not limited to semiconductor applications has the knack of.Preferred embodiment of the present invention is described in detail as follows, but except these are described in detail, the present invention can also have other execution modes.
Should give it is noted that term used here is only to describe specific embodiment, and be not intended to restricted root according to exemplary embodiment of the present invention.As used herein, unless the context clearly indicates otherwise, otherwise singulative be also intended to comprise plural form.In addition, it is to be further understood that, " comprise " when using term in this manual and/or " comprising " time, it indicates exists described feature, entirety, step, operation, element and/or assembly, but does not get rid of existence or additional other features one or more, entirety, step, operation, element, assembly and/or their combination.
Now, describe in more detail with reference to the accompanying drawings according to exemplary embodiment of the present invention.But these exemplary embodiments can multiple different form be implemented, and should not be interpreted as being only limited to the embodiments set forth herein.Should be understood that, providing these embodiments to be of the present inventionly disclose thorough and complete to make, and the design of these exemplary embodiments fully being conveyed to those of ordinary skill in the art.In the accompanying drawings, for the sake of clarity, exaggerate the thickness in layer and region, and use the element that identical Reference numeral represents identical, thus will omit description of them.
The invention provides a kind of electrically programmable fuse structure of semiconductor device, comprising:
Fuse element;
The first end interconnected with described fuse element and the second end;
The connecting portion shape triangular in shape of described first end and described the second end and described fuse element, and the obtuse angle that described in connecting portion place, the edge of first end and the second end edge and described fuse element is formed is 135 °, wherein said first end and the second end respectively have four rectangular contact holes, form the contact array of 2 × 2, for electrical connection.
Particularly, as shown in Figure 1, described electrically programmable fuse structure comprises first end 102 and the second end 103, and is connected by described fuse element 101; In wherein said first end 102 and the second end 103, there is multiple contact hole 104, described contact hole is used for being electrically connected with the polysilicon bottom described first end 102 and the second end 103, wherein said contact hole regularly arranged formation contact hole array, such as, there are in first end 102 shown in Fig. 1 and the second end 103 two row's rectangular contact holes, often arrange two, form the contact hole array of 2 × 2; Described setting is only exemplary, and the present invention is not limited only to described setting.As preferably, due on described first end 102 and the second end 103 owing to arranging multiple contact hole, therefore, the width of described first end 102 and the second end 103 is greater than described fuse element.
As preferably, described first end and described the second end and described fuse element connecting portion shape triangular in shape in the present invention, and be rectangle away from one end of fuse element, conveniently understand and described first end and the second end can be regarded as a rectangle and add a triangle and the figure that formed, wherein said leg-of-mutton one section is connected with described fuse element, and at described first end, the place that the second end contacts with described fuse element, the obtuse angle that the edge of described first end and the second end edge and described fuse element is formed is 135 °, as shown in fig. 1.
As preferably, wherein said first end can be anode, then described the second end is negative electrode, and correspondingly, if described first end is negative electrode, then described the second end is anode.
In FIG, region for connecting described first end and described the second end in described fuse element becomes join domain, the region I marked in figure is join domain, the width of described join domain is 60-100nm, be preferably 80-90nm, the length of described join domain can be 4-10 times of described width, is preferably 6-8 doubly in the present invention.
Fig. 2 is electrically programmable fuse sectional view of the present invention, and described fuse element comprises: insulating barrier 201, is positioned in Semiconductor substrate; Gate oxide 206 is positioned on described insulating barrier 201; Polysilicon layer 204, is positioned on described gate oxide 206; Silicide layer 205, is positioned on described polysilicon layer; Nitride cap layer 202, is positioned on described silicide layer.
Particularly, as shown in Figure 2, be arranged in bottom for Semiconductor substrate (described figure does not indicate), described Semiconductor substrate can be stacked SiGe (S-SiGeOI), germanium on insulator SiClx (SiGeOI) and germanium on insulator (GeOI) etc. on stacked silicon (SSOI), insulator on silicon, silicon-on-insulator (SOI), insulator.As preferably, an insulating barrier can also be set under described Semiconductor substrate.
Described fuse element also comprises the insulating barrier 201 be positioned in Semiconductor substrate, described insulating barrier 201 can be oxide insulating layer, described oxide insulating layer can be shallow trench isolation oxide, the formation of described shallow trench isolation oxide can select this area common method, so no longer elaborate at this.
Be positioned at above this insulating barrier 201 can for gate oxide 206, described gate oxide can be silicon dioxide layer, can by method formation such as deposition or high-temperature oxydations.
Be positioned at above gate oxide 206 for polysilicon layer 204, described polysilicon layer can be the doping of P type or N-type doping, the dopant of boron or arsenic is such as utilized to inject crystalline silicon, particularly, boron can be injected in the side of crystalline silicon, inject arsenic at opposite side, other modes can also be selected, be not limited to this embodiment.
Be positioned at above described polysilicon layer for silicide layer 205, be silicon cobalt substrate as preferred described silicide layer.
Described fuse element also comprises nitride cap layer, is positioned on described silicide layer.
As preferably, in described fuse element, the sidewall of crystalline semiconductor body is substantially filled medium and surrounds in the present invention, described filled media does not preferably apply extra-stress substantially on described crystalline semiconductor theme, also preferably filled media minimize dopant from crystalline semiconductor body to outdiffusion, be preferably nitride, such as silicon nitride etc. in the present invention.
At the silicon substrate that described substrate of the present invention can be 300 microns, the thickness of described insulating barrier 201 can be in 50-300 nanometer range, the thickness of described gate oxide can be 20-100nm, the thickness of described polysilicon layer 204 is preferably 50-100 nanometer, and the thickness being positioned at the nitride cap layer 202 on described insulating barrier is preferably 30-100 nanometer.
In the un-programmed state, the resistance that described fuse connects is by gate oxide, polysilicon layer and the resistor coupled in parallel separately of silicide layer above form, the initial resistance provided in an embodiment of the present invention is 80-150 ohm, generally preferably be less than 100 ohm, the fuse being less than existing suitable size can obtain resistance, then on conductive fuel join domain 101, current potential is applied by contact hole 104, described voltage is generally 0.9-2.5 volt, also can produce energy consumption on described fuse simultaneously, the energy consumption that fuse element connects adds the resistance that fuse connects.Polysilicon layer due to such as crystalline silicon does not have the defect of such as crystal boundary, therefore very effective realization can programme, thus makes E-fuse of the present invention very have efficiency yet, needs less area to support circuit thus.
Fuse-wires structure of the present invention very easily can obtain high and consistent final resistance, thus avoid the adverse effect the infringement avoided between adjacent devices that rupture or condense, structure of the present invention is conducive to allowing lower program voltage, electric current and/or programming time.
The present invention is illustrated by above-described embodiment, but should be understood that, above-described embodiment just for the object of illustrating and illustrate, and is not intended to the present invention to be limited in described scope of embodiments.In addition it will be appreciated by persons skilled in the art that the present invention is not limited to above-described embodiment, more kinds of variants and modifications can also be made according to instruction of the present invention, within these variants and modifications all drop on the present invention's scope required for protection.Protection scope of the present invention defined by the appended claims and equivalent scope thereof.
Claims (7)
1. an electrically programmable fuse structure for semiconductor device, comprising:
Fuse element;
The first end interconnected with described fuse element and the second end;
The connecting portion shape triangular in shape of described first end and described the second end and described fuse element, and the obtuse angle that described in connecting portion place, the edge of first end and the second end edge and described fuse element is formed is 135 °, wherein said first end and the second end respectively have four rectangular contact holes, form the contact array of 2 × 2, for electrical connection
Wherein, for connecting 4-10 times that the length in the region of described first end and described the second end is width in described fuse element, the initial resistance that described electrically programmable fuse structure provides is 80-150 ohm.
2. electrically programmable fuse structure according to claim 1, is characterized in that, described fuse element comprises:
Insulating barrier, is positioned in Semiconductor substrate;
Gate oxide, is positioned on described insulating barrier;
Polysilicon layer, is positioned on described gate oxide;
Silicide layer, is positioned on described polysilicon layer;
Nitride cap layer, is positioned on described silicide layer.
3. electrically programmable fuse structure according to claim 2, is characterized in that, described insulating barrier is oxide skin(coating).
4. electrically programmable fuse structure according to claim 2, is characterized in that, described silicide layer is silicon cobalt substrate.
5. electrically programmable fuse structure according to claim 2, is characterized in that, described polysilicon layer is the doping of P type or N-type doping.
6. electrically programmable fuse structure according to claim 1, is characterized in that, is 60-100nm for connecting the width in the region of described first end and described the second end in described fuse element.
7. electrically programmable fuse structure according to claim 1, is characterized in that, described first end is negative electrode or anode, and what described the second end was corresponding is anode or negative electrode.
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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TW518735B (en) * | 2000-05-30 | 2003-01-21 | Infineon Technologies Corp | Enhanced fuses by the local degradation of the fuse link |
US6933591B1 (en) * | 2003-10-16 | 2005-08-23 | Altera Corporation | Electrically-programmable integrated circuit fuses and sensing circuits |
CN101034697A (en) * | 2006-03-09 | 2007-09-12 | 国际商业机器公司 | Electrically programmable fuse structures with narrowed width regions configured to enhance current crowding and methods of fabrication thereof |
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US6624499B2 (en) * | 2002-02-28 | 2003-09-23 | Infineon Technologies Ag | System for programming fuse structure by electromigration of silicide enhanced by creating temperature gradient |
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Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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TW518735B (en) * | 2000-05-30 | 2003-01-21 | Infineon Technologies Corp | Enhanced fuses by the local degradation of the fuse link |
US6933591B1 (en) * | 2003-10-16 | 2005-08-23 | Altera Corporation | Electrically-programmable integrated circuit fuses and sensing circuits |
CN101034697A (en) * | 2006-03-09 | 2007-09-12 | 国际商业机器公司 | Electrically programmable fuse structures with narrowed width regions configured to enhance current crowding and methods of fabrication thereof |
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