CN103559168B - Method and device for continuously determining large point amplitude probability distribution - Google Patents
Method and device for continuously determining large point amplitude probability distribution Download PDFInfo
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- CN103559168B CN103559168B CN201310513817.4A CN201310513817A CN103559168B CN 103559168 B CN103559168 B CN 103559168B CN 201310513817 A CN201310513817 A CN 201310513817A CN 103559168 B CN103559168 B CN 103559168B
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Abstract
The invention provides a method and a device for continuously calculating large point amplitude probability distribution. The device comprises a CPLD (complex programmable logic device) or FPGA (field programmable gate array) control unit, an A/D (analog-to-digital) sampling unit, a switch bus, an SRAM (static random access memory), a double-port RAM (random access memory) and a host CPU (central processing unit) which are mutually connected and communicated, the A/D sampling unit is used for acquiring intermediate frequency signals and transmitting the intermediate frequency signals to the switch bus, the frequency of the intermediate frequency signals is converted by a receiver or a frequency spectrograph, the intermediate frequency signals pass an anti-aliasing filter, the switch bus is used for transmitting the intermediate frequency signals to the SRAM, the SRAM is used for storing and updating the intermediate frequency signals in a preset mode, and the host CPU is used for reading data of the double-port RAM and the SRAM and simultaneously updating probability statistical values within the whole amplitude range on a screen. By the aid of the scheme, the average power of the signals can be accurately calculated in real time, and measurement of continuous APD (amplitude probability distribution) and calculation of the average power can be realized after the device is connected with the intermediate frequency of the receiver or the frequency spectrograph.
Description
Technical field
The invention belongs to amplitude probability distribution computing technique field, more particularly, to one kind continuously determine big points amplitude
The method and apparatus of probability distribution.
Background technology
Current APD computational methods are all after user sets certain points, and instrument collection is counted enough, calculates once
APD result, points if necessary are relatively more, then test result needs to wait and refreshes once for a long time, is difficult to observe APD
Consecutive variations and characteristic rule, and the signal of which kind of probability distribution is maximum to communication systems leverage.
Therefore, prior art existing defects, need to improve.
Content of the invention
The technical problem to be solved is for the deficiencies in the prior art, provides one kind to continuously determine big points width
The method and apparatus of degree probability distribution.
Technical scheme is as follows：
A kind of device continuously determining big amplitude probability distribution of counting, wherein, is adopted by CPLD or control system, A/D
Sample unit, bus switches, static memory SRAM, dual port RAM and host CPU are connected with each other and mutually communication forms；Described A/D
Sampling unit be used for gather receiver or frequency spectrograph frequency conversion after and the intermediate-freuqncy signal after frequency overlapped-resistable filter is sent to switch
Bus；Described bus switches are used for for described intermediate-freuqncy signal being sent to static memory SRAM；Described static memory SRAM uses
In being stored using predetermined way and update described intermediate-freuqncy signal；Described dual port RAM is used for storing the wink of all amplitude probability distribution
When result of calculation make host CPU and CPLD or the conflict free access of control system；Described CPLD or control system are used
Amplitude probability distribution in the read-write controlling described static memory SRAM and described dual port RAM, and whole amplitude range
Statistical computation；Described host CPU is used for reading described dual port RAM and the data of described static memory SRAM, updates whole simultaneously
Probability statistics value in individual amplitude range, and the mean power of the probability in whole amplitude range is calculated according to preordering method.
The described device continuously determining big amplitude probability distribution of counting, wherein, described static memory SRAM adopts
Predetermined way is often to be stored in a data, then delete the data earliest time in data that has been stored in.
The described device continuously determining big amplitude probability distribution of counting, wherein, in described CPLD or control system
The clock that processes be 6-12 times of sampling clock.
The described device continuously determining big amplitude probability distribution of counting, wherein, described CPLD or control system by
Worker state machine and register composition, described register includes always counting register, middle value register, SRAM circle queue
Read address pointer register and write address pointer register；Described worker state machine is used for completing the under the driving processing clock
Conversion between one state and the second state；Described first state, using currently new sampled data as the address of described dual port RAM
Pointer, reads in described dual port RAM the data of address location and Jia 1 and write address location in described dual port RAM again；Judge to read ground
If the value of the value initial value 0 of location pointer register and write address pointer register adds 1 and the value of total points register whether phase
Same, it is not carry out reading the read-write operation of address pointer register and the read operation of SRAM circle queue, otherwise read static state and deposit
Read the value of address pointer register indication in reservoir SRAM in middle value register, then address pointer register value will be read to add 1
And the value complementation to total points register gives reading address pointer register, write address pointer adds 1 to total points register simultaneously
Complementation, and complementation value is assigned to write address pointer register, new sampled data is write the quiet of write address pointer register indication
In the unit of state memory SRAM；Described second state, judges whether the value reading address pointer register is more than 0, otherwise no grasps
Make, be to export the value of middle value register on the address bus of dual port RAM, read the value of dual port RAM, and subtract 1 and write again
Enter in dual port RAM.
The described device continuously determining big amplitude probability distribution of counting, wherein, described static memory SRAM and twoport
The working method of RAM is write-after-read, and the calculating completing a point controlled within 3 process clock cycle.
The described device continuously determining big amplitude probability distribution of counting, wherein, in the whole amplitude range of described calculating
The computing formula of the preordering method of the mean power of probability is：
OrWherein, mean power is Pav；N is
Total statistics points；Ci is the statistics number of i point；I is points index.
A kind of method continuously determining big points amplitude probability distribution continuously determines, and wherein, comprises the following steps：Set total
Count as n, new sampled value is Ai, and after number of samples is more than n, Ai value indication internal storage location statistics number adds 1, A (i+n) value institute
Refer to internal storage location statistics number and subtract 1, obtain the statistics number corresponding to the range value of continuous n sampled point, host CPU is from twoport
RAM reads the statistics number of each Ai amplitude point again divided by total points n, just obtains the value of the amplitude probability distribution of continuous n point.
The described method continuously determining big points amplitude probability distribution continuously determines, wherein, a little bigger according to continuously determining
The value of number amplitude probability distribution calculates the mean power of continuous amplitude probability distribution.
The described method continuously determining big points amplitude probability distribution continuously determines, wherein, the meter of described mean power
Calculating formula is：
OrWherein, mean power is Pav；N is
Total statistics points；Ci is the statistics number of i point；I is points index.
Using such scheme, 1, be capable of the continuously survey calculation to amplitude probability distribution, that is, gather sampling point
After number reaches user's set point number, a point of often sampling is it is possible to complete the amplitude probability distribution of whole user's set point number
The calculating and update display of statistics.Even if so user is unfamiliar with the relevant Changing Pattern of signal it is also possible to setting is enough
Big user's points, thus observe the statistics of continuous-stable.2nd, the method for the present invention can accurately calculate in real time
The mean power of signal, after this device is connected to receiver or the intermediate frequency of frequency spectrograph, you can to realize the measurement of continuous APD and average
The calculating of power.3rd, can be applied in spectrum analyzer or receiver, realize the calculating of quickly continuous amplitude probability distribution,
And the real-time mean power of measurement signal, it is very suitable for observing the digital communication department to different systems for the harassing and wrecking source of different qualities
The impact of system, sets up the relation of amplitude probability distribution and the indexs such as the bit error rate, and cost of implementation is cheap.
Brief description
Fig. 1 continuously determines the structural representation of the device of big points amplitude probability distribution for the present invention.
Fig. 2 is that the circle queue of SRAM in the present invention accesses schematic diagram.
Fig. 3 continuously determines a kind of device embodiment structural representation of big amplitude probability distribution of counting for the present invention.
Specific embodiment
Below in conjunction with the drawings and specific embodiments, the present invention is described in detail.
Embodiment 1
As shown in figure 1, this invention device by CPLD (or FPGA) as control computing unit 104, A/D sampling unit 101,
Bus switch 102, static memory SRAM103, dual port RAM 105 form.Intermediate-freuqncy signal warp after receiver or frequency spectrograph frequency conversion
After crossing frequency overlapped-resistable filter, enter A/D sampling unit 101, the data of sampling enters the SRAM103 that FPGA104 controller is specified
In memory cell, SRAM103 is often stored in a data, then reads and lose an oldest data.FPGA104 is with current
New sampled data, as the allocation index of dual port RAM 105, adds again and again by the data read-out in dual port RAM 105 and on this basis
Write in this address, then using the data reading in SRAM103 as dual port RAM 105 allocation index, by the number in dual port RAM 105
Write in dual port RAM 105 address again and again according to reading and subtracting on this basis.Each range value of so intermediate-freuqncy signal has one
Statistics, completes, while an intermediate-freuqncy signal of often sampling, the probability statistics specifying points, host CPU 106 can be from twoport
Sequentially read all amplification value in RAM105 and carry out display renewal.
The process clock of the sampling clock of A/D sampling unit 101 and module is defeated by the clock generation module of instrument or equipment
Enter.Reset signal is controlled by master cpu 106, starts to calculate front reset whole device for amplitude probability distribution.
Sampled data for ensureing A/D sampling unit 101 output is processed in real time, processes clock and is generally sampling clock
More than 6 times, because the accessing time sequence of SRAM103 generally requires 2 to 3 clock cycle and just can complete, the read-write of dual port RAM 105
Access is also required to 2-3 cycle.It is made up of worker state machine and register inside CPLD104, including SRAM static memory 103
Read-write and DRAM dual port RAM 105 read-write, and in whole amplitude range amplitude probability distribution statistical computation, mainly post
Storage includes always counting register, middle value register, SRAM circle queue as shown in Fig. 2 showing reading address pointer in Fig. 2
Register and the position of write address pointer register.CPLD internal work flow process, is mainly processing clock by internal state machine
The conversion of two principal states is completed under driving:
In state 1, using currently new sampled data as the address pointer of dual port RAM, read this address in dual port RAM single
The content of unit simultaneously Jia 1 and is write this unit again；If judging to read the value initial value 0 of address pointer register and write address pointer adding 1
It is not equal to the value to total register of counting, then do not carry out reading the operation of address pointer register and the read operation of SRAM, otherwise read
Go out to read the value of address pointer register indication in SRAM in the middle value register of FPGA, then reading address pointer register value
Plus 1 and the value complementation of total points register is given and read address pointer register, write address pointer adds 1 and total points are deposited simultaneously
Device complementation, and complementation value is assigned to write address pointer register, the data write write address pointer register indication of new sampling
Sram cell in.
In state 2, judge whether the value reading address pointer register is more than 0, subsequently grasp if no other less than 0 this state
Make, otherwise, the value of middle value register is exported on the address bus of DRAM dual port RAM, read the value of dual port RAM, and handle
This value subtracts 1 and is then written in this address of dual port RAM.
All RAM operate due to being write-after-read, can be controlled by FPGA and complete within 3 cycles.
Host CPU can update the probability statistics in whole amplitude range by reading DRAM dual port RAM content on screen
Value it is possible to the relevant trigger condition based on statistical probability is arranged on main frame, because this device is that to continuously determine amplitude general
Rate is distributed, and therefore can trigger in real time.The mean power based on probability can be calculated simultaneously.
The method continuously determining amplitude probability distribution is：Set and always count as n, new sampled value is Ai, when number of samples surpasses
After crossing n, Ai value indication internal storage location statistics number adds 1, and A (i+n) value indication internal storage location statistics number subtracts 1, this results in
The statistics number corresponding to range value of continuous n sampled point, industrial computer module CPU reads each Ai amplitude point from dual port RAM
Statistics number again divided by total points n, just obtained the value of the amplitude probability distribution of continuous n point.
The computational methods of two kinds of mean powers of statistics：From the beginning of 0 address location of dual port RAM, until AD bit wide is m's
Highest 2m- 1 highest address location, linear averaging power isN is total statistics points, and Ci is i point
Statistics number, i is points index.Logarithmic mean performance number isCalculate.
After user changes the hardware parameter such as centre frequency, directly transmit reset signal by controlling FPGA, by SRAM and double
All statistical contents of mouth RAM reset.
Embodiment two
On the basis of above-described embodiment, such as in certain model microwave spectrometer, original amplitude probability distribution needs logical
Calculate an amplitude probability distribution value after crossing continuous sampling n point again, achieve continuous amplitude probability distribution after this invention and calculate
Calculating with mean power.
As shown in figure 3, for example, if sampling clock and if sampling data rate are 4MHz to specific design, and AD adopts
Sample unit 201 is 40MHz with the converter AD9647 (16) of 16, IF process clock, is completed according to user's request maximum
1000000 points of amplitude probability distribution, therefore 1M word cell of SRAM203 capacity are just permissible, so employing CY7C1061AV33
(1M*16), AD sampling unit 201 is 16, needs the counting unit of 64K 32, and therefore DRAM205 employs 1
IDT70V659 (128K*36), CPLD204 EPM1270F256C3.Bus switches 202 are by CPLD204 control, bus switches
202 connect then by new sampled data feeding SRAM203, and bus switches 202 disconnect, then the data reading SRAM203 enters row operation
Write SRAM203 afterwards again, bus switches 202 are mainly used in preventing the data/address bus with SRAM 203 for the data/address bus of sampled data
Produce competition or disturb.
It is 10000 that user passes through instrument panel input probability statistics points.The internal each state of instrument software setting CPLD204
Register, internal each register resets, and SRAM203 and DRAM205 that reset.When AD sampling unit 201 exports a sampled value
The internal total register of counting of CPLD204 adds 1 it is assumed that this value is 0x7724 afterwards, and CPLD204 internal state machine enters state 1, reads
The value of 0x7724 indication address location this value is added 1 be written back this unit in dual port RAM 205；Judge that reading address pointer deposits
If the value initial value 0 of device and write address pointer add 1 being not equal to value 10000 to total register of counting, then do not carry out reading address
The operation of pointer register and the read operation of SRAM203, the value otherwise reading reading address pointer register indication in SRAM203 arrives
In the middle value register of FPGA204, then address pointer register value adds 1 and the value complementation to total points register gives reading
Read address pointer register, write address pointer adds 1 to the register complementation of total points simultaneously, and complementation value is assigned to write address pointer
Register, writes new sampled data 0x7724 in the sram cell of write address pointer register indication.
In state 2, judge whether the value reading address pointer register is more than 0, subsequently grasp if no other less than 0 this state
Make, otherwise, the value of middle value register is exported on the address bus of DRAM dual port RAM, read the value of dual port RAM, and handle
This value subtracts 1 and is then written in this address of dual port RAM.
Using formulaOrAverage work(can be calculated in real time
Rate.
Host CPU 206 is that ETX industrial computer module CPU is passed through to read the content that address 0xFFFF is arrived in DRAM dual port RAM address 0,
Probability statistics value in whole amplitude range is updated on screen it is possible to setting is about touching based on statistical probability on main frame
Clockwork spring part, because this device is to continuously determine amplitude probability distribution, therefore can be used for triggering in real time.
Continuously determine the algorithm statement of amplitude probability distribution：Set and always count as n, new sampled value is Ai, works as number of samples
After n, Ai value indication internal storage location statistics number adds 1, and A (i+n) value indication internal storage location statistics number subtracts 1, calculates amplitude
When probability distribution, as long as the corresponding statistics number of each Ai value is the corresponding amplitude of this range value divided by total points n
Probability distribution.
After user changes the hardware parameter such as centre frequency, directly transmit reset signal by controlling FPGA, by SRAM and double
All statistical contents of mouth RAM reset.
Embodiment three
On the basis of above-described embodiment, a kind of device continuously determining big amplitude probability distribution of counting of the present invention, such as Fig. 1
Shown, wherein, by CPLD or control system 104, A/D sampling unit 101, bus switches 102, static memory
SRAM103, dual port RAM 105 and host CPU 106 are connected with each other and mutually communication forms；Described A/D sampling unit 101 is used for adopting
Collection receiver or frequency spectrograph frequency conversion after and the intermediate-freuqncy signal after frequency overlapped-resistable filter is sent to bus switches 102；Described open
Close bus 102 to be used for for described intermediate-freuqncy signal being sent to static memory SRAM103；Described static memory SRAM103 is used for
Store and update described intermediate-freuqncy signal using predetermined way；Described dual port RAM 105 is used for storing the wink of all amplitude probability distribution
When result of calculation make host CPU 106 and CPLD or the conflict free access of control system 104；Described CPLD or FPGA controls
Unit 104 is used for the read-write of described static memory SRAM103 and described dual port RAM 105, and amplitude in whole amplitude range
The statistical computation of probability distribution；Described host CPU 106 is used for reading described dual port RAM 105 and described static memory
The data of SRAM103, updates the probability statistics value in whole amplitude range simultaneously, and calculates whole amplitude model according to preordering method
The mean power of the probability in enclosing.
Furthermore, the predetermined way that described static memory SRAM103 adopts is often to be stored in a data, then by
Delete through being stored in the earliest data of time in data.
Furthermore, processing in described CPLD or control system 104 clock is sampling clock 6-12 times.
Furthermore, described CPLD or control system 104 are made up of worker state machine and register, described deposit
Device include always counting register, middle value register, the reading address pointer register of SRAM circle queue and write address pointer is posted
Storage；Described worker state machine is used for completing the conversion between first state and the second state under the driving processing clock；Institute
State first state, currently new sampled data, as the address pointer of described dual port RAM, is read address in described dual port RAM 105
The data of unit simultaneously Jia 1 and is write address location in described dual port RAM 105 again；If judging that the value reading address pointer register is first
Whether the value of initial value 0 and write address pointer register adds 1 identical with the value of total points register, is, does not carry out reading address pointer
The read-write operation of register and the read operation of SRAM circle queue, otherwise read reading address pointer in static memory SRAM and deposit
The value of device indication is in middle value register, then adds 1 and the value complementation to total register of counting by reading address pointer register value
Give and read address pointer register, write address pointer adds 1 to the register complementation of total points, and complementation value is assigned to write address simultaneously
Pointer register, in the unit of the static memory SRAM103 new sampled data being write write address pointer register indication；Institute
State the second state, judge whether the value reading address pointer register is more than 0, otherwise no operate, be then by middle value register
It is worth and exports the value that dual port RAM is read on the address bus of dual port RAM, and subtract 1 and be then written in dual port RAM.
Furthermore, the working method of described static memory SRAM103 and dual port RAM 105 is write-after-read, completes
The calculating of one point can be controlled in 3 and processes within the clock cycle.
Furthermore, the described computing formula calculating the preordering method of the mean power of probability in whole amplitude range
For：
OrWherein, mean power is Pav；N is
Total statistics points；Ci is the statistics number of i point；I is points index.
Example IV
On the basis of above-described embodiment, a kind of method continuously determining big amplitude probability distribution of counting, wherein, including with
Lower step：Set and always count as n, new sampled value is Ai, after number of samples is more than n, Ai value indication internal storage location statistics number
Plus 1, A (i+n) value indication internal storage location statistics number subtracts 1, obtained the statistics time corresponding to the range value of continuous n sampled point
Number, host CPU reads the statistics number of each Ai amplitude point again divided by total points n from dual port RAM, just obtains the amplitude of continuous n point
The value of probability distribution.
The described method continuously determining big amplitude probability distribution of counting, wherein, according to continuously determining, big points amplitude is general
The value of rate distribution calculates the mean power of continuous amplitude probability distribution.
The described method continuously determining big amplitude probability distribution of counting, wherein, the computing formula of described mean power is：
OrWherein, mean power is Pav；N is
Total statistics points；Ci is the statistics number of i point；I is points index.
Using such scheme, 1, be capable of the continuously survey calculation to amplitude probability distribution, that is, gather sampling point
After number reaches user's set point number, a point of often sampling is it is possible to complete the amplitude probability distribution of whole user's set point number
The calculating and update display of statistics.Even if so user is unfamiliar with the relevant Changing Pattern of signal it is also possible to setting is enough
Big user's points, thus observe the statistics of continuous-stable.2nd, the method for the present invention can accurately calculate in real time
The mean power of signal, after this device is connected to receiver or the intermediate frequency of frequency spectrograph, you can to realize the measurement of continuous APD and average
The calculating of power.3rd, can be applied in spectrum analyzer or receiver, realize the calculating of quickly continuous amplitude probability distribution,
And the real-time mean power of measurement signal, it is very suitable for observing the digital communication department to different systems for the harassing and wrecking source of different qualities
The impact of system, sets up the relation of amplitude probability distribution and the indexs such as the bit error rate, and cost of implementation is cheap.
It should be appreciated that for those of ordinary skills, can be improved according to the above description or be converted,
And all these modifications and variations all should belong to the protection domain of claims of the present invention.
Claims (4)
1. a kind of device continuously determining big points amplitude probability distribution is it is characterised in that by CPLD or control system, A/
D sampling unit, bus switches, static memory SRAM, dual port RAM and host CPU are connected with each other and mutually communication forms；Described
A/D sampling unit be used for gather receiver or frequency spectrograph frequency conversion after and the intermediate-freuqncy signal after frequency overlapped-resistable filter be sent to out
Close bus；Described bus switches are used for for described intermediate-freuqncy signal being sent to static memory SRAM；Described static memory SRAM
For being stored using predetermined way and updating described intermediate-freuqncy signal；Described dual port RAM is used for storing all amplitude probability distribution
Instantaneous result of calculation simultaneously makes host CPU and CPLD or the conflict free access of control system；Described CPLD or FPGA controls single
Unit is used for controlling the read-write of described static memory SRAM and described dual port RAM, and in whole amplitude range, amplitude probability divides
The statistical computation of cloth；Described host CPU is used for reading described dual port RAM and the data of described static memory SRAM, more simultaneously
The newly probability statistics value in whole amplitude range, and the average work(of the probability in whole amplitude range is calculated according to preordering method
Rate；Process clock in described CPLD or control system is 6-12 times of sampling clock；Described CPLD or FPGA controls single
Unit is made up of worker state machine and register, and described register includes always count register, middle value register, SRAM annular team
The reading address pointer register of row and write address pointer register；Described worker state machine is used for complete under the driving processing clock
Become the conversion between first state and the second state；Described first state, using currently new sampled data as described dual port RAM
Address pointer, reads in described dual port RAM the data of address location and Jia 1 and write address location in described dual port RAM again；Judge
If the value of the value initial value 0 and write address pointer register of reading address pointer register adds 1 with the value of total points register being
No identical, it is not carry out reading the read-write operation of address pointer register and the read operation of SRAM circle queue, otherwise read quiet
Read the value of address pointer register indication in state memory SRAM in middle value register, then address pointer register value will be read
Plus 1 and the value complementation of total points register is given and read address pointer register, write address pointer adds 1 and total points are deposited simultaneously
Device complementation, and complementation value is assigned to write address pointer register, new sampled data is write write address pointer register indication
In the unit of static memory SRAM；Described second state, judges whether the value reading address pointer register is more than 0, otherwise no
Operation, is to export the value of middle value register on the address bus of dual port RAM, reads the value of dual port RAM, and subtracts 1 again
It is written in dual port RAM.
2. the device continuously determining big points amplitude probability distribution as claimed in claim 1 is it is characterised in that described static state is deposited
The predetermined way that reservoir SRAM adopts is often to be stored in a data, then delete the data earliest time in data that has been stored in.
3. the device continuously determining big points amplitude probability distribution as claimed in claim 1 is it is characterised in that described static state is deposited
The working method of reservoir SRAM and dual port RAM be write-after-read, complete a point calculating control 3 process the clock cycle it
Interior.
4. the device continuously determining big points amplitude probability distribution as claimed in claim 1 is it is characterised in that described calculating is whole
The computing formula of the preordering method of the mean power of the probability in individual amplitude range is：OrWherein, mean power is Pav；N is total statistics points；CiStatistics time for i point
Number；I is points index.
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| CN101881797A (en) * | 2010-06-25 | 2010-11-10 | 中国舰船研究设计中心 | Amplitude probability distribution recorder based on universal instrument |
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| CN101324646A (en) * | 2008-07-25 | 2008-12-17 | 北京交通大学 | Amplitude probability distribution statistical parameter measuring instrument |
| CN101881797A (en) * | 2010-06-25 | 2010-11-10 | 中国舰船研究设计中心 | Amplitude probability distribution recorder based on universal instrument |
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