CN103532560A - Digital correlator and digital complete-polarization microwave radiometer - Google Patents

Abstract

The invention relates to a digital correlator. The digital correlator comprises a sampling module, a multiplexing module, a correlation calculation module, a synchronous sampling clock module and a synchronous control module, wherein the sampling module is realized by adopting an analog-digital converter with the sampling rate being equal to or higher than 5GHz; the multiplexing module, the correlation calculation module and the synchronous control module are realized on an FPGA chip with the main frequency being higher than 400MHz; different sampling units in the sampling module are used for carrying out high-speed sampling on external input signals respectively and obtaining two paths of digital signals which are input into the correlation calculation module after being multiplexed by the multiplexing module; the correlation calculation module is used for carrying out speed reduction and correlation calculation on inputted digital signals; the synchronous sampling clock module is used for ensuring consistent phase of sampling clocks reaching the different sampling units in the sampling module, and the synchronous control module is used for controlling synchronous working among the different sampling units in the sampling module.

Description

A kind of digital correlator and digital complete polarization microwave radiometer

Technical field

The present invention relates to microwave field, particularly a kind of digital correlator and digital complete polarization microwave radiometer.

Background technology

Complete polarization microwave radiometer is on the basis of traditional microwave radiometer, further extracted the Stokes polarization information of observed object, it is the study hotspot of the countries and regions such as the middle and later periods nineties 19th century a kind of novel microwave remote sensor ，Ye Shi U.S. of just growing up, Europe in the world.Complete polarization microwave radiometer can also obtain the parameters such as Cloud water content, moisture content and sea surface temperature when obtaining at short notice global large area wind field result, the gentle time of Yu Haiyang is studied suitable favourable, be conducive to improve the accuracy of atmosphere and marine forecasting pattern simultaneously.In complete polarization microwave radiometer, the complete polarization microwave radiometer of research ，Dui China of the core component digital correlator of data processing manufacture oneself has important meaning.Element in the Stokes vector of revising is usingd bright temperature K as unit, is shown below:

$T_B=\left(\begin{array}{c}{T}_v\\ T_h\\ T_3\\ T_4\end{array}\right)=\frac{{\mathrm{\λ}}^2}{{\mathrm{\κ}}_B\×\mathrm{\η}}\left(\begin{array}{c}\left({\left|E_v\right|}^2\right)\\ \left({\left|E_h\right|}^2\right)\\ 2\mathrm{Re}\left(E_v{E_h}^{*}\right)\\ 2\mathrm{Im}\left(E_v{E_h}^{*}\right)\end{array}\right)---\left(1\right)$

In formula, λ is wavelength, and η is Medium impedence, and k is Boltzmann constant.Parameter T _vand T _h, be vertical and the bright temperature of horizontal polarization, they be exactly the bright temperature of total radiation; Other two parameter T ₃and T ₄the information that has comprised radiation field polarization characteristic; E _v, E _hthe electric field strength of vertical and horizontal polarization.

Numeral complete polarization microwave radiometer refers to and adopts numerical calculation method to try to achieve the complete polarization microwave radiometer of stokes parameter.Fig. 1 is the system architecture diagram of digital complete polarization microwave radiometer receiver, comprising: dual polarized antenna, superheterodyne receiver, quadrature detector and High Speed Digital Correlator; Horizontal polarization and the perpendicular polarization two paths of signals that wherein superheterodyne receiver receives dual polarized antenna amplifies, filtering; Through amplifying, filtered two paths of signals also in the superheterodyne receiver of two channels by with local oscillator mixing, become intermediate-freuqncy signal; Quadrature detector is demodulated to completely orthogonal a pair of I, Q signal by intermediate-freuqncy signal, the corresponding four tunnel orthogonal signalling of two-way receive channel; Zhe Si road orthogonal signalling are relevant through combination in described High Speed Digital Correlator, four bright temperature of polarization that just can obtain measuring.

Digital correlator is processed the limited ability of bandwidth in ADC sample rate and high-speed data reduction of speed technology.At present, intermediate-freuqncy signal in Ka wave band and above complete polarization microwave radiometer connects quadrature demodulator (being the quadrature detector in Fig. 1) after needing, signal bandwidth is reduced to half of intermediate frequency, to adapt to the sample rate of digital correlator, but the orthogonal transform that quadrature demodulator is realized simultaneously also can be introduced noise the input of digital correlator, thereby produces undesirable relative offset.Quadrature demodulator with local oscillator has very high noise temperature, can produce very large contribution to down-conversion noise.The error of bringing for reducing quadrature demodulator, complete polarization microwave radiometer receiver local oscillator and intermediate frequency port when hardware is realized need to realize very high isolation, and local oscillator and 90 ° of converters are realized higher isolation.Can reduce like this down-conversion local oscillator thermal noise of medium frequency output end, but also strengthen difficulty and the cost of microwave circuit simultaneously, this is current technical problem urgently to be resolved hurrily.

In order to solve this technical problem, those skilled in the art solve in the following way: the sample rate, the reduction data rate that improve digital correlator, adopt the digital quadrature transformation method to obtain the noise jamming that orthogonal signalling are avoided analogy method, further and complete correlation computations.

The mode that realizes in the prior art digital correlator has two kinds.The first is with electronic circuit, to complete digital correlation to calculate, and by multiplication unit, cumulative unit and numerical control unit, builds system, the PSR digital microwave radiometer of NASA for example, it adopt 3 rank quantize 2 relevant, bandwidth is 1GHz.The defect of this technology is: it is bulky that electronic circuit is built total system, and power consumption surpasses hectowatt, and sample rate is subject to the restriction of subsequent combination circuit larger.

The second is to adopt FPGA to complete digital correlation to calculate.Along with the high speed development of integrated circuit, by FPGA, complete correlation computations and Data Control is very ripe.Develop at present multiple digital correlator both at home and abroad, HSCC High Speed Digital Correlator (the bandwidth 500MHz that for example NASA develops, 2 quantifications), this digital correlator is applied in international GEM engineering, or based on the FPGA digital correlator (bandwidth 200MHz adopts 8 quantifications) that the signal after mixing is amplified deals with to C-band signal.

Its bandwidth of above-mentioned digital correlator realizing in prior art is all confined in 2GHz, and the intermediate-frequency bandwidth of more than Ka wave band complete polarization microwave radiometer is all equal to or higher than 2GHz, digital correlator of the prior art cannot meet the needs of this type of complete polarization microwave radiometer.Along with the increase of complete polarization microwave radiometer front-end intermediate frequency bandwidth, the development of wideband digital correlator is very necessary.

Summary of the invention

The object of the invention is to overcome the needs that digital correlator of the prior art cannot meet the complete polarization microwave radiometer that intermediate-frequency bandwidth is higher, thereby a kind of digital correlator that can directly gather 2GHz or bandwidth signal more than 2GHz is provided.

To achieve these goals, the invention provides a kind of digital correlator, comprising: sampling module, multiplexing module, correlation computations module, synchronized sampling clock module and synchronization control module; Wherein, the analog to digital converter that described sampling module adopts sample rate to be equal to or higher than 5GHz is realized, and described multiplexing module, correlation computations module and synchronization control module realize on the fpga chip higher than 400MHz in a dominant frequency;

Different sampling units in described sampling module are done respectively high-speed sampling to external input signal, obtain two ways of digital signals, described two ways of digital signals through multiplexing module do multiplexed after the described correlation computations module of input, described correlation computations module is done reduction of speed and correlation computations to the digital signal of input; Synchronized sampling clock module is consistent for guaranteeing to arrive the phase place of sampling clock of the different sampling units of sampling module, and synchronization control module is for controlling the synchronous working between the different sampling units of sampling module.

In technique scheme, described sampling module comprises two sampling units, each sampling unit is an analog to digital converter, and two analog to digital converters are connected respectively to described fpga chip and by described synchronized sampling clock module, the sampling time of two analog to digital converters are carried out to Synchronization Control.

In technique scheme, described analog to digital converter adopts the analog to digital converter that model is EV8AQ160.

In technique scheme, described synchronized sampling clock module adopts phase-locked loop ADF4360-7 and AD9514 to realize.

In technique scheme, described synchronization control module synchronously triggers the reseting pin of analog to digital converter in sampling module by the sequence circuit of FPGA inside, make its synchronous working; Described synchronization control module synchronously triggers AD9514 reseting pin by the sequence circuit of FPGA inside, guarantees the synchronous of output clock.

In technique scheme, described multiplexing module is realized multiplex operation at least one times; In multiplex operation each time, utilize the high-speed register of FPGA inside, adopt caching technology to carry out the multiplexed of 1:2 to input signal, and complete the two divided-frequency processing to input clock, obtain frequency-dividing clock, the signal that described frequency-dividing clock is corresponding multiplexed.

In technique scheme, the correlation computations that described correlation computations module completes comprises real-time auto-correlation and the cross-correlation calculation of two paths of signals; Described correlation computations module comprises quadrature device, multiplier, adder and accumulator; Described quadrature device produces corresponding orthogonal signalling for the output signal of multiplexing module, two quadrature signal after variation are made with respectively the phase multiplication of symbol according to formula (1) by multiplier, then in adder, be added, finally by accumulator, do integration;

$T_B=\left(\begin{array}{c}{T}_v\\ T_h\\ T_3\\ T_4\end{array}\right)=\frac{{\mathrm{\λ}}^2}{{\mathrm{\κ}}_B\×\mathrm{\η}}\left(\begin{array}{c}\left({\left|E_v\right|}^2\right)\\ \left({\left|E_h\right|}^2\right)\\ 2\mathrm{Re}\left(E_v{E_h}^{*}\right)\\ 2\mathrm{Im}\left(E_v{E_h}^{*}\right)\end{array}\right)---\left(1\right)$

In formula, λ is wavelength, and η is Medium impedence, and k is Boltzmann constant; Parameter T _vand T _hthe bright temperature of vertical and horizontal polarization, parameter T ₃and T ₄the information that has comprised radiation field polarization characteristic; E _v, E _hthe electric field strength of vertical and horizontal polarization.

In technique scheme, described quadrature device produces corresponding orthogonal signalling for the output signal of multiplexing module and adopts Hilbert to change or the filtering of multiplying each other of digital quadrature local oscillator realizes.

In technique scheme, described fpga chip adopts Vertex5 family chip to realize.

The present invention also provides a kind of digital complete polarization microwave radiometer, comprises dual polarized antenna, superheterodyne receiver and described digital correlator;

Described dual polarized antenna receives the two paths of signals of horizontal polarization and perpendicular polarization, received two paths of signals amplifies in described superheterodyne receiver, filtering and mixing, obtain two paths of signals, described two paths of signals in described digital correlator first the different sampling units in sampling module do respectively high-speed sampling, obtain two ways of digital signals, described two ways of digital signals through multiplexing module do multiplexed after the described correlation computations module of input, described correlation computations module is done reduction of speed and correlation computations to the digital signal of input, four bright temperature of polarization that obtain measuring, synchronized sampling clock module is consistent for guaranteeing to arrive the phase place of sampling clock of the different sampling units of sampling module, and synchronization control module is for controlling the synchronous working between the different sampling units of sampling module.

The invention has the advantages that:

Digital complete polarization microwave radiometer of the present invention can be realized speed up to the binary channels sampling of 5GHz, directly gathers 2GHz or bandwidth signal more than 2GHz;

Digital complete polarization microwave radiometer of the present invention, without quadrature demodulator, is realized correlation computations in FPGA, thermal noise and the phase deviation of avoiding quadrature demodulator to bring;

Digital complete polarization microwave radiometer of the present invention adopts repeatedly multiplexed mode to solve a difficult problem for signal reduction of speed, adopts FPGA to solve the problem of high speed correlation computations.

Accompanying drawing explanation

Fig. 1 is the system architecture diagram of digital complete polarization microwave radiometer receiver of the prior art;

Fig. 2 is digital complete polarization microwave radiometer of the present invention structure chart in one embodiment;

Fig. 3 is the functional block diagram of the digital correlator in digital complete polarization microwave radiometer of the present invention;

Fig. 4 is the functional block diagram of EV8AQ160;

Fig. 5 is 5GHz sample rate digital correlator reduction of speed flow chart.

Embodiment

Now the invention will be further described by reference to the accompanying drawings.

With reference to figure 2, in one embodiment, digital complete polarization microwave radiometer of the present invention comprises dual polarized antenna, superheterodyne receiver and digital correlator, as shown in Figure 3, digital correlator wherein comprises sampling module, multiplexing module, correlation computations module, synchronized sampling clock module and synchronization control module, described dual polarized antenna receives the two paths of signals of horizontal polarization and perpendicular polarization, received two paths of signals amplifies in described superheterodyne receiver, filtering and mixing, obtain two paths of signals, first described two paths of signals does high-speed sampling by sampling module in described digital correlator, obtain two ways of digital signals, described two ways of digital signals through multiplexing module do multiplexed after the described correlation computations module of input, described correlation computations module is done reduction of speed and correlation computations to the digital signal of input, four bright temperature of polarization that obtain measuring, this result outputs to outside computer, synchronized sampling clock module is consistent for guaranteeing to arrive the phase place of sampling clock of the different sampling units of sampling module, and synchronization control module is for controlling the synchronous working between the different sampling units of sampling module.

Below digital complete polarization microwave radiometer of the present invention is described further.

Described digital correlator main ultrahigh speed analog-to-digital conversion (ADC) and fpga chip of adopting on hardware realized.Specifically, the sampling module in described digital correlator has adopted super high-speed A/D C, and described super high-speed A/D C is the ADC that on market, any a sample rate is equal to or higher than 5GHz, has adopted in the present embodiment EV8AQ160.The super high-speed A/D C that described sampling module adopts has two, the two-way intermediate-freuqncy signal that correspondence is inputted respectively, as shown in Figure 3, these two super high-speed A/D C are connected respectively to fpga chip, and by described synchronized sampling clock module, the sampling time of two super high-speed A/D C are carried out to Synchronization Control.By the use to above-mentioned super high-speed A/D C, described sampling module can be realized speed up to the binary channels sampling of 5GHz, directly gathers 2GHz bandwidth signal.

Fig. 4 is the functional block diagram of EV8AQ160, and as can be seen from the figure, the external SPI serial ports of EV8AQ160 can configure the sampling of this chip Wei Yi road, sample rate 5GHz, and 8bit quantizes; Output clock adopts ddr mode, in rising edge clock and trailing edge transmission data.1:8demux is to being sampled data in inside, so output data speed is 625MHz, clock rate is 312.5MHz, and input clock is 1.25GHz.Input clock amplitude range is wider, from-9dBm to 2dBm.Data are output as standard LVDS pattern, and built-in chip type reset signal synchronously triggers this reset signal by FPGA between multi-plate chip.This chip is exported spill over simultaneously, when input no to scale, and output high level.

Synchronized sampling clock module, for guaranteeing that two high-speed ADCs of sampling module are strictly synchronous up to the sampling clock of 1250MHz, reaches the requirement of amplitude-phase consistency.In the present embodiment, synchronized sampling clock module adopts phase-locked loop ADF4360-7 and AD9514 to realize.The phase-locked loop frequency synthesizer chip that ADF4360-7 ShiADI company releases, reference frequency output is from 350MHz to 1800MHz.After 1.25GHz clock is produced by ADF4360-7, by AD9514, separate two-way homophase differential clocks.AD9514 has the feature of the high degree of integration of little encapsulation, without a plurality of resolution elements, by configuring its pin, can select output clock pattern and clock phase, and highest frequency is to 1600MHz.

Synchronization control module, multiplexing module and correlation computations module all realize in FPGA.In the present embodiment, FPGA adopts the Vertex5 family chip that xilinx produces.Its adopts 65nm technique, compares with the FPGA of last generation 90nm technique, and speed improves 30%, and logical capacity increases by 65%, dynamic power reduction 35%, IO mouth can receive the LVDS input signal of the highest 1.25GHz, dominant frequency is all higher than 450MHz.Synchronization control module completes in FPGA, synchronously triggers the reseting pin of two ADC in sampling module by the sequence circuit of FPGA inside, makes its synchronous working.Synchronization control module is adopted to use the same method and is triggered AD9514 reseting pin, guarantees the synchronous of output clock.

The signal synchronised clock that is sampled that enters FPGA is ddr mode, speed 312.5MHz.The highest global clock speed that FPGA accepts is 550MHz, thus the speed of input signal be reduced to FPGA can range of receiving in.When the data of sampling module collection enter after FPGA, as shown in Figure 5, first by described multiplexing module, utilized the high-speed register of FPGA inside, adopt caching technology to carry out the multiplexed of 1:2 to input signal, the sampled value that accumulates two time points outputs to correlation computations module again, described multiplexing module also will complete the two divided-frequency of input clock is processed simultaneously, obtains frequency-dividing clock, the signal that described frequency-dividing clock is corresponding multiplexed.The DCM clock driver circuit that described two divided-frequency is processed in Virtex5 chip completes, and DCM clock driver circuit can make the output of global clock reach non-jitter delay.Synchronous frequency division and the multiplexed synchronism of guaranteeing FPGA internal data transfer, completed the final reduction of speed of high speed signal.Described multiplexing module can be more than once to the multiplex operation of input signal, after a multiplex operation finishes, it is multiplexed that described multiplexing module adopts other high-speed register continuation in FPGA to do the result that last time multiplex operation generates, further to reduce the speed of signal.Above-mentioned multiplex operation can reach the object with resource throw-over degree, is beneficial to FPGA and completes the operations such as orthogonal transform, digital multiply integration.

The correlation computations that correlation computations module completes comprises real-time auto-correlation and the cross-correlation calculation of two paths of signals.Described correlation computations module comprises quadrature device, multiplier, adder and accumulator.Quadrature device produces corresponding orthogonal signalling for the output signal of multiplexing module, can have two kinds of implementation methods: filtering that employing Hilbert changes or digital quadrature local oscillator multiplies each other.Two quadrature signal after variation are made respectively the phase multiplication of symbol according to the related algorithm of formula (1) by multiplier, then in adder, be added, and finally by accumulator, make the integration of 100ms.In the present embodiment, multiplier is realized by the IP kernel calling in FPGA, and Vertex5 chip has 192 DSP computing units, and maximum speed reaches 450MHz, and 64 DSP multiplier units of actual needs, speed, lower than 200MHz, meets application.Subtracter is realized by VHDL language.By VHDL, programme and realize adder and the wide accumulator of 64bit equally.Accumulation result directly uploads to host computer by FPGA internal state machine.

FPGA inside is done frequency division to global clock and is processed, and produces transfer clock, and can adjust according to actual needs.Digital correlator communication interface comprises serial ports and USB mouth.Serial ports comprises Rs485 and two kinds of patterns of Rs232.Rs232 chip can be selected chip MAX3232, and it has two couples of signal driver, is all the transmission of CMOS level, and digital correlator adopts wherein a pair of driver.Rs485 adopts and drives chip SP3491.It has a pair of differential driving and respective enable pin, and maximum transmission distance is 4000 feet (approximately 1219 meters), and peak transfer rate is 10M/s.Enable pin is controlled by FPGA, all input and output all with FPGA communication.Adopt FT232 chip to realize the conversion of Rs422 serial ports or Rs232 serial ports and USB mouth.

It is more than the description to digital complete polarization microwave radiometer of the present invention.Compare with the of the prior art digital complete polarization microwave radiometer shown in Fig. 1, digital complete polarization microwave radiometer of the present invention can be realized speed up to the binary channels sampling of 5GHz, directly gathers 2GHz or bandwidth signal more than 2GHz; Digital complete polarization microwave radiometer of the present invention, without quadrature demodulator, is realized correlation computations in FPGA, thermal noise and the phase deviation of avoiding quadrature demodulator to bring; Digital complete polarization microwave radiometer of the present invention adopts repeatedly multiplexed mode to solve a difficult problem for signal reduction of speed, adopts FPGA to solve the problem of high speed correlation computations.

It should be noted last that, above embodiment is only unrestricted in order to technical scheme of the present invention to be described.Although the present invention is had been described in detail with reference to embodiment, those of ordinary skill in the art is to be understood that, technical scheme of the present invention is modified or is equal to replacement, do not depart from the spirit and scope of technical solution of the present invention, it all should be encompassed in the middle of claim scope of the present invention.

Claims (10)

1. a digital correlator, is characterized in that, comprising: sampling module, multiplexing module, correlation computations module, synchronized sampling clock module and synchronization control module; Wherein, the analog to digital converter that described sampling module adopts sample rate to be equal to or higher than 5GHz is realized, and described multiplexing module, correlation computations module and synchronization control module realize on the fpga chip higher than 400MHz in a dominant frequency;

Different sampling units in described sampling module are done respectively high-speed sampling to external input signal, obtain two ways of digital signals, described two ways of digital signals through multiplexing module do multiplexed after the described correlation computations module of input, described correlation computations module is done reduction of speed and correlation computations to the digital signal of input; Synchronized sampling clock module is consistent for guaranteeing to arrive the phase place of sampling clock of the different sampling units of sampling module, and synchronization control module is for controlling the synchronous working between the different sampling units of sampling module.

2. digital correlator according to claim 1, it is characterized in that, described sampling module comprises two sampling units, each sampling unit is an analog to digital converter, and two analog to digital converters are connected respectively to described fpga chip and by described synchronized sampling clock module, the sampling time of two analog to digital converters are carried out to Synchronization Control.

3. digital correlator according to claim 1, is characterized in that, described analog to digital converter adopts the analog to digital converter that model is EV8AQ160.

4. digital correlator according to claim 1, is characterized in that, described synchronized sampling clock module adopts phase-locked loop ADF4360-7 and AD9514 to realize.

5. digital correlator according to claim 1, is characterized in that, described synchronization control module synchronously triggers the reseting pin of analog to digital converter in sampling module by the sequence circuit of FPGA inside, make its synchronous working; Described synchronization control module synchronously triggers AD9514 reseting pin by the sequence circuit of FPGA inside, guarantees the synchronous of output clock.

6. digital correlator according to claim 1, is characterized in that, described multiplexing module is realized multiplex operation at least one times; In multiplex operation each time, utilize the high-speed register of FPGA inside, adopt caching technology to carry out the multiplexed of 1:2 to input signal, and complete the two divided-frequency processing to input clock, obtain frequency-dividing clock, the signal that described frequency-dividing clock is corresponding multiplexed.

7. digital correlator according to claim 1, is characterized in that, the correlation computations that described correlation computations module completes comprises real-time auto-correlation and the cross-correlation calculation of two paths of signals; Described correlation computations module comprises quadrature device, multiplier, adder and accumulator; Described quadrature device produces corresponding orthogonal signalling for the output signal of multiplexing module, two quadrature signal after variation are made with respectively the phase multiplication of symbol according to formula (1) by multiplier, then in adder, be added, finally by accumulator, do integration;

$T_B=\left(\begin{array}{c}{T}_v\\ T_h\\ T_3\\ T_4\end{array}\right)=\frac{{\mathrm{\λ}}^2}{{\mathrm{\κ}}_B\×\mathrm{\η}}\left(\begin{array}{c}\left({\left|E_v\right|}^2\right)\\ \left({\left|E_h\right|}^2\right)\\ 2\mathrm{Re}\left(E_v{E_h}^{*}\right)\\ 2\mathrm{Im}\left(E_v{E_h}^{*}\right)\end{array}\right)---\left(1\right)$

In formula, λ is wavelength, and η is Medium impedence, and k is Boltzmann constant; Parameter T _vand T _hthe bright temperature of vertical and horizontal polarization, parameter T ₃and T ₄the information that has comprised radiation field polarization characteristic; E _v, E _hthe electric field strength of vertical and horizontal polarization.

8. digital correlator according to claim 7, is characterized in that, described quadrature device produces corresponding orthogonal signalling for the output signal of multiplexing module and adopts Hilbert to change or the filtering of multiplying each other of digital quadrature local oscillator realizes.

9. digital correlator according to claim 1, is characterized in that, described fpga chip adopts Vertex5 family chip to realize.

10. a digital complete polarization microwave radiometer, is characterized in that, comprises dual polarized antenna, superheterodyne receiver and the digital correlator based on one of claim 1-9 Suo Shu;

Described dual polarized antenna receives the two paths of signals of horizontal polarization and perpendicular polarization, received two paths of signals amplifies in described superheterodyne receiver, filtering and mixing, obtain two paths of signals, described two paths of signals in described digital correlator first the different sampling units in sampling module do respectively high-speed sampling, obtain two ways of digital signals, described two ways of digital signals through multiplexing module do multiplexed after the described correlation computations module of input, described correlation computations module is done reduction of speed and correlation computations to the digital signal of input, four bright temperature of polarization that obtain measuring, synchronized sampling clock module is consistent for guaranteeing to arrive the phase place of sampling clock of the different sampling units of sampling module, and synchronization control module is for controlling the synchronous working between the different sampling units of sampling module.

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