CN103532560B - A kind of digital correlator and digital complete polarization microwave radiometer - Google Patents
A kind of digital correlator and digital complete polarization microwave radiometer Download PDFInfo
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Abstract
The present invention relates to a kind of digital correlator, including：Sampling module, multiplexing module, correlation computations module, synchronized sampling clock module and synchronization control module；Wherein, the analog-digital converter that the sampling module is equal to or higher than 5GHz using sample rate is realized, and the multiplexing module, correlation computations module and synchronization control module are realized on fpga chip of the dominant frequency higher than 400MHz；Different sampling units in sampling module do high-speed sampling respectively to external input signal, obtain two ways of digital signals, the multiplexed module of the two ways of digital signals is input into described correlation computations module after multiplexing, and the correlation computations module does reduction of speed and correlation computations to the data signal being input into；The phase place that synchronized sampling clock module is used for guaranteeing to reach the sampling clock of different sampling units in sampling module is consistent, and synchronization control module is used for controlling the synchronous working in sampling module between different sampling units.
Description
Technical field
The present invention relates to microwave field, more particularly to a kind of digital correlator and digital complete polarization microwave
Meter.
Background technology
Complete polarization microwave radiometer is extracted the Stokes of observed object on the basis of traditional microwave radiometer, further
Polarization information, is the middle and later periods nineties 19th century just grows up in the world a kind of new microwave remote sensor, and the U.S.,
The study hotspot of the countries and regions such as Europe.Complete polarization microwave radiometer obtains global large area wind field result at short notice
While the parameters such as Cloud water content, moisture content and sea surface temperature can also be obtained, time research gentle to Yu Haiyang is suitable
Favorably, while being conducive to improving the accuracy of air and marine forecasting pattern.The core of data processing in complete polarization microwave radiometer
The research of heart part numbers correlator, manufacturing the complete polarization microwave radiometer of oneself to China has important meaning.Revise
Element in Stokes vector is shown below using bright temperature K as unit：
In formula, λ is wavelength, and η is Medium impedence, κBIt is Boltzmann constant.Parameter TvAnd Th, it is vertically and horizontally to polarize
Bright temperature, they and be exactly the bright temperature of total radiation；Other two parameters T3And T4Contain the information of radiation field polarization characteristic；Ev,
EhIt is the electric-field intensity for vertically and horizontally polarizing.
Digital complete polarization microwave radiometer refers to try to achieve the complete polarization microwave spoke of stokes parameter using numerical calculation method
Penetrate meter.Fig. 1 is the system architecture diagram of digital complete polarization microwave radiometer receiver, including：Dual polarized antenna, superheterodyne reception
Machine, quadrature detector and High Speed Digital Correlator；The horizontal polarization that wherein superhet is received to dual polarized antenna and
Vertical polarization two paths of signals is amplified, filters；Amplified, filtered two paths of signals is also in the superheterodyne reception of two channels
By being mixed with local oscillator in machine, become intermediate-freuqncy signal；Intermediate-freuqncy signal is demodulated to completely orthogonal a pair of I, Q letter by quadrature detector
Number, two-way receives channel and corresponds to four tunnel orthogonal signalling；This four tunnels orthogonal signalling is through combination in the High Speed Digital Correlator
Related, it is possible to obtain the bright temperature of to be measured four polarization.
The limited ability of digital correlator process bandwidth is in ADC sample rate and high-speed data reduction of speed technology.At present, Ka wave band
And the intermediate-freuqncy signal in above complete polarization microwave radiometer needs to be followed by quadrature demodulator (i.e. quadrature detector in Fig. 1),
Signal bandwidth is reduced to the half of intermediate frequency, to adapt to the sample rate of digital correlator, but while what quadrature demodulator was realized
Orthogonal transformation also can introduce noise the input of digital correlator, so as to produce undesirable relative offset.With local oscillator just
Hand over demodulator to have very high noise temperature, very big contribution can be produced to down coversion noise.Bring for reducing quadrature demodulator
Error, complete polarization microwave radiometer receiver local oscillator and intermediate frequency port when hardware is realized need to realize very high isolation, this
Shake with 90 ° of converters and realize higher isolation.Can so reduce the down coversion local oscillator thermal noise of medium frequency output end, but while
Difficulty and the cost of microwave circuit is increased, this is technical problem urgently to be resolved hurrily at present.
In order to solve this technical problem, those skilled in the art solve in the following way：Improve digital correlator
Sample rate, reduction data rate, obtain, using the digital quadrature transformation method, the noise jamming that orthogonal signalling avoid analogy method, enter
One step simultaneously completes correlation computations.
The mode for realizing digital correlator in the prior art has two kinds.The first is to complete digital correlation with electronic circuit
Calculate, i.e., system is built by multiplication unit, summing elements and numerical control unit, the PSR digital microwave radiometer of such as NASA, it
Quantify to be 2 correlations using 3 ranks, carry a width of 1GHz.The defect of the technology is：It is huge that electronic circuit builds total system volume
Greatly, power consumption exceed hectowatt, and sample rate limited by subsequent combination circuit larger.
It is for second that digital correlation calculating is completed using FPGA.With the high speed development of integrated circuit, completed by FPGA
The control of correlation computations data is highly developed.Multiple digital correlators are developed at present both at home and abroad, and such as NASA is developed
HSCC High Speed Digital Correlator (bandwidth 500MHz, 2 quantizations), the digital correlator is applied in international GEM engineering, or is based on
The digital correlator that signal of the FPGA to C-band signal after mixing is amplified deals with (measured using 8 by bandwidth 200MHz
Change).
Within its bandwidth of above-mentioned digital correlator that is realized in prior art is all confined to 2GHz, and more than Ka wave band
The intermediate-frequency bandwidth of complete polarization microwave radiometer is equal to or higher than 2GHz, digital correlator of the prior art cannot meet such
The needs of complete polarization microwave radiometer.With the increase of complete polarization microwave radiometer front-end intermediate frequency bandwidth, wideband digital correlator
Development very necessary.
Content of the invention
It is an object of the invention to overcoming digital correlator of the prior art meet the higher full pole of intermediate-frequency bandwidth
Change the needs of microwave radiometer, so as to provide a kind of digital correlation of the bandwidth signal that can directly gather 2GHz or more than 2GHz
Device.
To achieve these goals, the invention provides a kind of digital correlator, including：Sampling module, multiplexing mould
Block, correlation computations module, synchronized sampling clock module and synchronization control module；Wherein, the sampling module adopts sample rate
Analog-digital converter equal to or higher than 5GHz is realized, the multiplexing module, correlation computations module and synchronization control module
Realize on fpga chip of the dominant frequency higher than 400MHz；
Different sampling units in the sampling module do high-speed sampling respectively to external input signal, obtain two railway digitals
Signal, the multiplexed module of the two ways of digital signals are input into described correlation computations module, the phase after multiplexing
Close computing module and reduction of speed and correlation computations are done to the data signal being input into；Synchronized sampling clock module is used for guaranteeing to reach sampling mould
In block, the phase place of the sampling clock of different sampling units is consistent, and synchronization control module is used for controlling different samplings in sampling module single
Synchronous working between unit.
In technique scheme, the sampling module includes two sampling units, and each sampling unit is an analog-to-digital conversion
Device, two analog-digital converters are connected respectively to the fpga chip and by the synchronized sampling clock module to two analog-to-digital conversion
The sampling time of device synchronizes control.
In technique scheme, the analog-digital converter is using the analog-digital converter of model EV8AQ160.
In technique scheme, the synchronized sampling clock module is realized using phaselocked loop ADF4360-7 and AD9514.
In technique scheme, the synchronization control module synchronously triggers sampling module by the sequence circuit inside FPGA
The reseting pin of middle analog-digital converter so as to work asynchronously；The synchronization control module is same by the sequence circuit inside FPGA
Step triggering AD9514 reseting pin, it is ensured that the synchronization of output clock.
In technique scheme, the multiplexing module realizes multiplex operation at least one times；In multichannel each time
In multiplexing operation, using the high-speed register inside FPGA, 1 is carried out to input signal using caching technology：2 multiplexing,
And the two divided-frequency process to input clock is completed, and frequency-dividing clock is obtained, the frequency-dividing clock corresponds to the signal of multiplexing.
In technique scheme, the correlation computations completed by the correlation computations module include the real-time from phase of two paths of signals
Close and cross-correlation calculation；The correlation computations module includes orthogonal device, multiplier, adder and accumulator；The orthogonal device pin
Output signal to multiplexing module produces corresponding orthogonal signalling, and two quadrature signal after change are according to formula (1) point
The multiplication operation of symbol is not done by multiplier, is then added in adder, is integrated finally by accumulator；
In formula, λ is wavelength, and η is Medium impedence, κBIt is Boltzmann constant；Parameter TvAnd ThVertically and horizontally polarize
Bright temperature, parameter T3And T4Contain the information of radiation field polarization characteristic；Ev, EhIt is the electric-field intensity for vertically and horizontally polarizing.
In technique scheme, the orthogonal device passes through to change using Hilbert or digital quadrature local oscillator is multiplied filtering in fact
Now the output signal for multiplexing module produces corresponding orthogonal signalling.
In technique scheme, the fpga chip is realized using Vertex5 family chip.
Present invention also offers a kind of numeral complete polarization microwave radiometer, including dual polarized antenna, superhet and
Described digital correlator；
The dual polarized antenna receives the two paths of signals of horizontal polarization and vertical polarization, and received two paths of signals exists
Amplify in the superhet, filter and be mixed, two paths of signals is obtained, the two paths of signals is in the digital correlator
In do high-speed sampling respectively by the different sampling units in sampling module first, obtain two-way digital medium-frequency signal, the two-way
The multiplexed module of digital medium-frequency signal is input into described correlation computations module, the correlation computations module after multiplexing
Digital medium-frequency signal to being input into does reduction of speed and correlation computations, obtains the bright temperature of to be measured four polarization；Synchronized sampling clock
The phase place that module is used for guaranteeing to reach the sampling clock of different sampling units in sampling module is consistent, and synchronization control module is used for controlling
Synchronous working in sampling module processed between different sampling units.
It is an advantage of the current invention that：
The digital complete polarization microwave radiometer of the present invention can realize the binary channels sampling that speed is up to 5GHz, directly gather
The bandwidth signal of 2GHz or more than 2GHz；
The digital complete polarization microwave radiometer of the present invention realizes correlation computations without the need for quadrature demodulator in FPGA, it is to avoid
Thermal noise and phase deviation that quadrature demodulator brings；
The digital complete polarization microwave radiometer of the present invention solves the difficulty of signal reduction of speed by the way of repeatedly multiplexing
Topic, solves the problems, such as high speed correlation computations using FPGA.
Description of the drawings
Fig. 1 is the system architecture diagram of numeral complete polarization microwave radiometer receiver of the prior art；
Fig. 2 is the digital complete polarization microwave radiometer structure chart in one embodiment of the present invention；
Fig. 3 is the functional block diagram of the digital correlator in the digital complete polarization microwave radiometer of the present invention；
Fig. 4 is the functional block diagram of EV8AQ160；
Fig. 5 is 5GHz sample rate digital correlator reduction of speed flow chart.
Specific embodiment
In conjunction with accompanying drawing, the invention will be further described.
With reference to Fig. 2, in one embodiment, the digital complete polarization microwave radiometer of the present invention includes dual polarized antenna, surpasses
Heterodyne reciver and digital correlator；As shown in figure 3, digital correlator therein includes sampling module, multiplexing module, phase
Close computing module, synchronized sampling clock module and synchronization control module；The dual polarized antenna receives horizontal polarization and hangs down
The two paths of signals of straight polarization, received two paths of signals amplify in the superhet, filter and are mixed, obtain
Two paths of signals, the two paths of signals do high-speed sampling by sampling module in the digital correlator first, obtain two railway digitals
Intermediate-freuqncy signal, the multiplexed module of the two-way digital medium-frequency signal are input into described correlation computations mould after multiplexing
Block, the correlation computations module do reduction of speed and correlation computations to the digital medium-frequency signal being input into, and obtain to be measured four pole
Change bright temperature, this result output is to outside computer；Synchronized sampling clock module is used for guaranteeing to reach difference in sampling module
The phase place of the sampling clock of sampling unit is consistent, and synchronization control module is same between different sampling units in sampling module for controlling
Step work.
Digital complete polarization microwave radiometer to the present invention is described further below.
The digital correlator is mainly realized with fpga chip using ultrahigh speed analog-to-digital conversion (ADC) on hardware.Specifically
Say, the sampling module in the digital correlator employs super high-speed A/D C, super high-speed A/D C be market on any a
Sample rate is equal to or higher than the ADC of 5GHz, employs EV8AQ160 in the present embodiment.The superelevation adopted by the sampling module
Fast ADC has two, respectively the two-way intermediate-freuqncy signal of corresponding input, as shown in figure 3, the two super high-speed A/D C are connected respectively to
Fpga chip, and control is synchronized to the sampling time of two super high-speed A/D C by the synchronized sampling clock module.By right
The use of above-mentioned super high-speed A/D C, the sampling module can realize the binary channels sampling that speed is up to 5GHz, directly gather 2GHz
Bandwidth signal.
Fig. 4 is the functional block diagram of EV8AQ160, it can be seen that the external SPI serial ports of EV8AQ160 can configure this
Chip is sampled for a road, sample rate 5GHz, and 8bit quantifies；Output clock adopts ddr mode, i.e., in rising edge clock and trailing edge
Transmission data.Inside does 1 to being sampled data：8demux, so output data speed is 625MHz, clock rate is
312.5MHz, input clock are 1.25GHz.Input clock amplitude range is wider, from -9dBm to 2dBm.Data output is standard
LVDS mode, built-in chip type reset signal, the synchronization between multi-plate chip trigger this reset signal by FPGA.The chip is same
When export spill over, when be input into no to scale when, export high level.
Synchronized sampling clock module is used for guaranteeing that two high-speed ADCs in sampling module are up to the sampling clock of 1250MHz
Stringent synchronization, reaches the requirement of amplitude-phase consistency.In the present embodiment, synchronized sampling clock module adopts phaselocked loop ADF4360-
7 and AD9514 realize.ADF4360-7 be ADI company release phase-locked loop frequency synthesizer chip, reference frequency output from
350MHz to 1800MHz.After 1.25GHz clock is produced by ADF4360-7, two-way homophase differential clocks are separated by AD9514.
AD9514 has the characteristics that the high degree of integration of small package, without the need for multiple resolution elements, when can select output by configuring its pin
Clock pattern and clock phase, highest frequency to 1600MHz.
Synchronization control module, multiplexing module and correlation computations module are realized all in FPGA.In the present embodiment,
FPGA is using the Vertex5 family chip of xilinx production.It adopts 65nm technique, the FPGA phase with prior-generation 90nm technique
Than speed improves 30%, and logical capacity increases by 65%, and dynamic power consumption reduces 35%, and I/O port can receive highest 1.25GHz
LVDS input signal, dominant frequency are above 450MHz.Synchronization control module is completed in FPGA, by the sequence circuit inside FPGA
The reseting pin of two panels ADC in synchronous triggering sampling module so as to work asynchronously.Synchronization control module is touched using same method
Send out AD9514 reseting pin, it is ensured that the synchronization of output clock.
Enter FPGA is sampled signal synchronised clock for ddr mode, speed 312.5MHz.The highest that FPGA receives is global
Clock rate is 550MHz, thus the speed of input signal have already decreased to FPGA can be in range of receiving.When sampling module is gathered
Data enter FPGA after, as shown in figure 5, first by the multiplexing module using the high-speed register inside FPGA, adopting
1 is carried out to input signal with caching technology：2 multiplexing, that is, the sampled value for accumulating two time points export correlometer again
Module being calculated, while the multiplexing module will also complete the two divided-frequency to input clock processing, frequency-dividing clock is obtained, described point
Frequency clock corresponds to the signal of multiplexing.DCM clock driver circuit at the two divided-frequency in reason Virtex5 chip is completed,
DCM clock driver circuit can make the output of global clock reach non-jitter delay.Synchronous frequency dividing and multiplexing ensure that
The synchronism of FPGA internal data transfer, completes the final reduction of speed of high speed signal.The multiplexing module is to input signal
Multiplex operation can more than once, i.e., after a multiplex operation terminates, the multiplexing module is adopted
Other high-speed registers in FPGA continue to multiplex the result generated by previous multiplex operation, to drop further
The speed of low signal.Above-mentioned multiplex operation can reach the purpose with resource throw-over degree, beneficial to FPGA complete orthogonal transformation,
The operations such as numeral multiplication integration.
The correlation computations completed by correlation computations module include the real-time auto-correlation of two paths of signals and cross-correlation calculation.Described
Correlation computations module includes orthogonal device, multiplier, adder and accumulator.Orthogonal device is for the output signal of multiplexing module
Corresponding orthogonal signalling are produced, can have two kinds of implementation methods：Changed using Hilbert or digital quadrature local oscillator is multiplied and filters.
Two quadrature signal after change make, by multiplier, the multiplication operation for having symbol respectively according to the related algorithm of formula (1), so
It is added in adder afterwards, makees the integration of 100ms finally by accumulator.In the present embodiment, multiplier is by calling in FPGA
IP kernel realize, Vertex5 chip has 192 DSP computing units, and maximum speed reaches 450MHz, and is actually needed 64 DSP
Multiplier unit, speed are less than 200MHz, meet application.Subtracter is then realized by VHDL language.Program again by VHDL
Realize adder and 64bit width accumulator.Accumulation result is uploaded directly into host computer by FPGA internal state machine.
Scaling down processing is done inside FPGA to global clock, is produced transmission clock, and can be adjusted according to actual needs.Digital phase
Device communication interface is closed comprising serial ports and USB port.Serial ports includes Rs485 and Rs232 both of which.Rs232 chip may be selected chip
MAX3232, its have two couples of signal driver, are all the transmission of CMOS level, and digital correlator using one pair of which driver is
Can.Rs485 adopts driving chip SP3491.It has a pair of differential driving and corresponding enable pin, and maximum transmission distance is 4000
Foot (about 1219 meters), peak transfer rate are 10M/s.Enable pin is controlled by FPGA, the equal and FPGA of all input and output
Communication.The conversion of Rs422 serial ports or Rs232 serial ports and USB port is realized using FT232 chip.
It is more than the description of the digital complete polarization microwave radiometer to the present invention.With of the prior art shown in Fig. 1
Digital complete polarization microwave radiometer is compared, and the digital complete polarization microwave radiometer of the present invention can be realized speed and be up to the double of 5GHz
Channel sample, directly gathers the bandwidth signal of 2GHz or more than 2GHz；The digital complete polarization microwave radiometer of the present invention is without the need for just
Demodulator is handed over, and correlation computations is realized in FPGA, it is to avoid thermal noise and phase deviation that quadrature demodulator brings；The number of the present invention
Word complete polarization microwave radiometer solves a difficult problem for signal reduction of speed by the way of repeatedly multiplexing, and solves height using FPGA
The problem of fast correlation computations.
It should be noted last that, above example is only in order to illustrate technical scheme and unrestricted.Although ginseng
The present invention is described in detail according to embodiment, it will be understood by those within the art that, the technical side to the present invention
Case is modified or equivalent, and without departure from the spirit and scope of technical solution of the present invention, which all should be covered in the present invention
Right in the middle of.
Claims (10)
1. a kind of digital correlator, it is characterised in that include：Sampling module, multiplexing module, correlation computations module, synchronization
Sampling clock module and synchronization control module；Wherein, the sampling module is equal to or higher than the modulus of 5GHz using sample rate
Converter is realized, and the multiplexing module, correlation computations module and synchronization control module are in a dominant frequency higher than 400MHz's
Realize on fpga chip；
Different sampling units in the sampling module do high-speed sampling respectively to external input signal, obtain two-way digital intermediate frequency
Signal, the multiplexed module of the two-way digital medium-frequency signal are input into described correlation computations module, institute after multiplexing
State correlation computations module and reduction of speed and correlation computations are done to the digital medium-frequency signal being input into；Synchronized sampling clock module is used for guaranteeing
The phase place for reaching the sampling clock of different sampling units in sampling module is consistent, and synchronization control module is used for controlling in sampling module not
With the synchronous working between sampling unit.
2. digital correlator according to claim 1, it is characterised in that the sampling module includes two sampling units,
Each sampling unit is an analog-digital converter, and two analog-digital converters are connected respectively to the fpga chip and are adopted by the synchronization
Sample clock module synchronizes control to the sampling time of two analog-digital converters.
3. digital correlator according to claim 1, it is characterised in that the analog-digital converter adopts model
The analog-digital converter of EV8AQ160.
4. digital correlator according to claim 1, it is characterised in that the synchronized sampling clock module adopts phaselocked loop
ADF4360-7 and AD9514 is realized.
5. digital correlator according to claim 1, it is characterised in that the synchronization control module by FPGA inside
Sequence circuit synchronously triggers the reseting pin of analog-digital converter in sampling module so as to work asynchronously；The synchronization control module
AD9514 reseting pin is synchronously triggered by the sequence circuit inside FPGA, it is ensured that the synchronization of output clock.
6. digital correlator according to claim 1, it is characterised in that the multiplexing module is realized many at least one times
Road multiplexing operation；In multiplex operation each time, using the high-speed register inside FPGA, using caching technology to input
Signal carries out 1：2 multiplexing, and the two divided-frequency process to input clock is completed, frequency-dividing clock is obtained, the frequency-dividing clock
The signal of corresponding multiplexing.
7. digital correlator according to claim 1, it is characterised in that the correlometer completed by the correlation computations module
Calculating includes real-time auto-correlation and the cross-correlation calculation of two paths of signals；The correlation computations module includes orthogonal device, multiplier, addition
Device and accumulator；The orthogonal device produces corresponding orthogonal signalling, two after change for the output signal of multiplexing module
Quadrature signal does the multiplication operation of symbol respectively according to formula (1) by multiplier, is then added in adder, finally leads to
Cross accumulator to integrate；
In formula, λ is wavelength, and η is Medium impedence, κBIt is Boltzmann constant；Parameter TvAnd ThIt is vertically and horizontally polarize bright
Temperature, parameter T3And T4Contain the information of radiation field polarization characteristic；Ev, EhIt is the electric-field intensity for vertically and horizontally polarizing.
8. digital correlator according to claim 7, it is characterised in that the orthogonal device passes through to change using Hilbert
Or digital quadrature local oscillator is multiplied to filter and realizes producing corresponding orthogonal signalling for the output signal of multiplexing module.
9. digital correlator according to claim 1, it is characterised in that the fpga chip is using Vertex5 series core
Piece is realized.
10. a kind of numeral complete polarization microwave radiometer, it is characterised in that including dual polarized antenna, superhet and be based on
Digital correlator described in one of claim 1-9；
The dual polarized antenna receives the two paths of signals of horizontal polarization and vertical polarization, and received two paths of signals is described
Amplify in superhet, filter and be mixed, two paths of signals is obtained, the two paths of signals is first in the digital correlator
First high-speed sampling is done respectively by the different sampling units in sampling module, obtain two-way digital medium-frequency signal, two railway digital
The multiplexed module of intermediate-freuqncy signal is input into described correlation computations module after multiplexing, the correlation computations module is to defeated
The digital medium-frequency signal for entering does reduction of speed and correlation computations, obtains the bright temperature of to be measured four polarization；Synchronized sampling clock module
Consistent for guaranteeing the phase place for reaching the sampling clock of different sampling units in sampling module, synchronization control module is adopted for control
Synchronous working in egf block between different sampling units.
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| CN103532560A (en) | 2014-01-22 |
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