CN103531708A - 具有包含设计界面的人工反铁磁耦合多层的垂直磁化线的畴壁运动方法 - Google Patents
具有包含设计界面的人工反铁磁耦合多层的垂直磁化线的畴壁运动方法 Download PDFInfo
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- CN103531708A CN103531708A CN201310283722.8A CN201310283722A CN103531708A CN 103531708 A CN103531708 A CN 103531708A CN 201310283722 A CN201310283722 A CN 201310283722A CN 103531708 A CN103531708 A CN 103531708A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N50/00—Galvanomagnetic devices
- H10N50/80—Constructional details
- H10N50/85—Magnetic active materials
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F10/00—Thin magnetic films, e.g. of one-domain structure
- H01F10/32—Spin-exchange-coupled multilayers, e.g. nanostructured superlattices
- H01F10/3218—Exchange coupling of magnetic films via an antiferromagnetic interface
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F10/00—Thin magnetic films, e.g. of one-domain structure
- H01F10/32—Spin-exchange-coupled multilayers, e.g. nanostructured superlattices
- H01F10/324—Exchange coupling of magnetic film pairs via a very thin non-magnetic spacer, e.g. by exchange with conduction electrons of the spacer
- H01F10/3286—Spin-exchange coupled multilayers having at least one layer with perpendicular magnetic anisotropy
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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- H10N50/00—Galvanomagnetic devices
- H10N50/01—Manufacture or treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F1/00—Magnets or magnetic bodies characterised by the magnetic materials therefor; Selection of materials for their magnetic properties
- H01F1/0036—Magnets or magnetic bodies characterised by the magnetic materials therefor; Selection of materials for their magnetic properties showing low dimensional magnetism, i.e. spin rearrangements due to a restriction of dimensions, e.g. showing giant magnetoresistivity
- H01F1/0072—Magnets or magnetic bodies characterised by the magnetic materials therefor; Selection of materials for their magnetic properties showing low dimensional magnetism, i.e. spin rearrangements due to a restriction of dimensions, e.g. showing giant magnetoresistivity one dimensional, i.e. linear or dendritic nanostructures
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N50/00—Galvanomagnetic devices
- H10N50/10—Magnetoresistive devices
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- Crystallography & Structural Chemistry (AREA)
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Application Number | Priority Date | Filing Date | Title |
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US13/543,090 | 2012-07-06 | ||
US13/543,090 US8687415B2 (en) | 2012-07-06 | 2012-07-06 | Domain wall motion in perpendicularly magnetized wires having artificial antiferromagnetically coupled multilayers with engineered interfaces |
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CN103531708A true CN103531708A (zh) | 2014-01-22 |
CN103531708B CN103531708B (zh) | 2016-08-17 |
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CN201310283722.8A Expired - Fee Related CN103531708B (zh) | 2012-07-06 | 2013-07-08 | 具有包含设计界面的人工反铁磁耦合多层的垂直磁化线的畴壁运动方法 |
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CN (1) | CN103531708B (zh) |
Cited By (4)
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---|---|---|---|---|
CN104993046A (zh) * | 2015-06-25 | 2015-10-21 | 华中科技大学 | 一种磁隧道结单元及其制备方法 |
CN106711321A (zh) * | 2016-12-31 | 2017-05-24 | 复旦大学 | 一种自旋波波片 |
CN107195774A (zh) * | 2016-03-15 | 2017-09-22 | 赖志煌 | 自旋轨道扭力式磁性随存储存器及其写入方法 |
CN108062960A (zh) * | 2016-11-09 | 2018-05-22 | Imec 非营利协会 | 内联磁畴壁注入 |
Families Citing this family (83)
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US9583212B2 (en) | 2014-08-22 | 2017-02-28 | International Business Machines Corporation | Domain wall injector device using fringing fields aided by spin transfer torque |
SG11201700861XA (en) * | 2014-09-25 | 2017-03-30 | Agency Science Tech & Res | Magnetic element and method of fabrication thereof |
US9728712B2 (en) | 2015-04-21 | 2017-08-08 | Spin Transfer Technologies, Inc. | Spin transfer torque structure for MRAM devices having a spin current injection capping layer |
US10468590B2 (en) * | 2015-04-21 | 2019-11-05 | Spin Memory, Inc. | High annealing temperature perpendicular magnetic anisotropy structure for magnetic random access memory |
US9853206B2 (en) | 2015-06-16 | 2017-12-26 | Spin Transfer Technologies, Inc. | Precessional spin current structure for MRAM |
US9537088B1 (en) * | 2015-07-13 | 2017-01-03 | Micron Technology, Inc. | Magnetic tunnel junctions |
US9773974B2 (en) | 2015-07-30 | 2017-09-26 | Spin Transfer Technologies, Inc. | Polishing stop layer(s) for processing arrays of semiconductor elements |
US10163479B2 (en) | 2015-08-14 | 2018-12-25 | Spin Transfer Technologies, Inc. | Method and apparatus for bipolar memory write-verify |
US9741926B1 (en) | 2016-01-28 | 2017-08-22 | Spin Transfer Technologies, Inc. | Memory cell having magnetic tunnel junction and thermal stability enhancement layer |
US10396274B2 (en) * | 2016-03-08 | 2019-08-27 | Tohoku University | Spin electronics element and method of manufacturing thereof |
US10475988B2 (en) | 2016-07-27 | 2019-11-12 | National University Of Singapore | High efficiency spin torque switching using a ferrimagnet |
US10818331B2 (en) | 2016-09-27 | 2020-10-27 | Spin Memory, Inc. | Multi-chip module for MRAM devices with levels of dynamic redundancy registers |
US10437491B2 (en) | 2016-09-27 | 2019-10-08 | Spin Memory, Inc. | Method of processing incomplete memory operations in a memory device during a power up sequence and a power down sequence using a dynamic redundancy register |
US11119936B2 (en) | 2016-09-27 | 2021-09-14 | Spin Memory, Inc. | Error cache system with coarse and fine segments for power optimization |
US10628316B2 (en) | 2016-09-27 | 2020-04-21 | Spin Memory, Inc. | Memory device with a plurality of memory banks where each memory bank is associated with a corresponding memory instruction pipeline and a dynamic redundancy register |
US11119910B2 (en) | 2016-09-27 | 2021-09-14 | Spin Memory, Inc. | Heuristics for selecting subsegments for entry in and entry out operations in an error cache system with coarse and fine grain segments |
US11151042B2 (en) | 2016-09-27 | 2021-10-19 | Integrated Silicon Solution, (Cayman) Inc. | Error cache segmentation for power reduction |
US10360964B2 (en) | 2016-09-27 | 2019-07-23 | Spin Memory, Inc. | Method of writing contents in memory during a power up sequence using a dynamic redundancy register in a memory device |
US10366774B2 (en) | 2016-09-27 | 2019-07-30 | Spin Memory, Inc. | Device with dynamic redundancy registers |
US10446210B2 (en) | 2016-09-27 | 2019-10-15 | Spin Memory, Inc. | Memory instruction pipeline with a pre-read stage for a write operation for reducing power consumption in a memory device that uses dynamic redundancy registers |
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US10672976B2 (en) | 2017-02-28 | 2020-06-02 | Spin Memory, Inc. | Precessional spin current structure with high in-plane magnetization for MRAM |
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US10032978B1 (en) | 2017-06-27 | 2018-07-24 | Spin Transfer Technologies, Inc. | MRAM with reduced stray magnetic fields |
US10481976B2 (en) | 2017-10-24 | 2019-11-19 | Spin Memory, Inc. | Forcing bits as bad to widen the window between the distributions of acceptable high and low resistive bits thereby lowering the margin and increasing the speed of the sense amplifiers |
US10656994B2 (en) | 2017-10-24 | 2020-05-19 | Spin Memory, Inc. | Over-voltage write operation of tunnel magnet-resistance (“TMR”) memory device and correcting failure bits therefrom by using on-the-fly bit failure detection and bit redundancy remapping techniques |
US10489245B2 (en) | 2017-10-24 | 2019-11-26 | Spin Memory, Inc. | Forcing stuck bits, waterfall bits, shunt bits and low TMR bits to short during testing and using on-the-fly bit failure detection and bit redundancy remapping techniques to correct them |
US10529439B2 (en) | 2017-10-24 | 2020-01-07 | Spin Memory, Inc. | On-the-fly bit failure detection and bit redundancy remapping techniques to correct for fixed bit defects |
US10734052B2 (en) | 2017-10-24 | 2020-08-04 | Purdue Research Foundation | Buffered spin-torque sensing device for global interconnect circuits |
US10679685B2 (en) | 2017-12-27 | 2020-06-09 | Spin Memory, Inc. | Shared bit line array architecture for magnetoresistive memory |
US10360962B1 (en) | 2017-12-28 | 2019-07-23 | Spin Memory, Inc. | Memory array with individually trimmable sense amplifiers |
US10891997B2 (en) | 2017-12-28 | 2021-01-12 | Spin Memory, Inc. | Memory array with horizontal source line and a virtual source line |
US10811594B2 (en) | 2017-12-28 | 2020-10-20 | Spin Memory, Inc. | Process for hard mask development for MRAM pillar formation using photolithography |
US10395712B2 (en) | 2017-12-28 | 2019-08-27 | Spin Memory, Inc. | Memory array with horizontal source line and sacrificial bitline per virtual source |
US10424726B2 (en) | 2017-12-28 | 2019-09-24 | Spin Memory, Inc. | Process for improving photoresist pillar adhesion during MRAM fabrication |
US10395711B2 (en) | 2017-12-28 | 2019-08-27 | Spin Memory, Inc. | Perpendicular source and bit lines for an MRAM array |
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US10367139B2 (en) | 2017-12-29 | 2019-07-30 | Spin Memory, Inc. | Methods of manufacturing magnetic tunnel junction devices |
US10784439B2 (en) | 2017-12-29 | 2020-09-22 | Spin Memory, Inc. | Precessional spin current magnetic tunnel junction devices and methods of manufacture |
US10270027B1 (en) | 2017-12-29 | 2019-04-23 | Spin Memory, Inc. | Self-generating AC current assist in orthogonal STT-MRAM |
US10886330B2 (en) | 2017-12-29 | 2021-01-05 | Spin Memory, Inc. | Memory device having overlapping magnetic tunnel junctions in compliance with a reference pitch |
US10840436B2 (en) | 2017-12-29 | 2020-11-17 | Spin Memory, Inc. | Perpendicular magnetic anisotropy interface tunnel junction devices and methods of manufacture |
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US10614902B1 (en) * | 2018-10-04 | 2020-04-07 | Universität Duisburg-Essen | Tubular nanosized magnetic wires with 360° magnetic domain walls |
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Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104993046A (zh) * | 2015-06-25 | 2015-10-21 | 华中科技大学 | 一种磁隧道结单元及其制备方法 |
CN107195774A (zh) * | 2016-03-15 | 2017-09-22 | 赖志煌 | 自旋轨道扭力式磁性随存储存器及其写入方法 |
CN107195774B (zh) * | 2016-03-15 | 2019-07-19 | 赖志煌 | 自旋轨道扭力式磁性随存储存器及其写入方法 |
CN108062960A (zh) * | 2016-11-09 | 2018-05-22 | Imec 非营利协会 | 内联磁畴壁注入 |
CN108062960B (zh) * | 2016-11-09 | 2023-07-25 | Imec 非营利协会 | 内联磁畴壁注入 |
CN106711321A (zh) * | 2016-12-31 | 2017-05-24 | 复旦大学 | 一种自旋波波片 |
CN106711321B (zh) * | 2016-12-31 | 2019-05-31 | 复旦大学 | 一种自旋波波片 |
Also Published As
Publication number | Publication date |
---|---|
US20140009994A1 (en) | 2014-01-09 |
US8687415B2 (en) | 2014-04-01 |
CN103531708B (zh) | 2016-08-17 |
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