CN103515487A - Method for manufacturing ceramic package substrate used in light-emitting wafers - Google Patents
Method for manufacturing ceramic package substrate used in light-emitting wafers Download PDFInfo
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- CN103515487A CN103515487A CN201210206909.3A CN201210206909A CN103515487A CN 103515487 A CN103515487 A CN 103515487A CN 201210206909 A CN201210206909 A CN 201210206909A CN 103515487 A CN103515487 A CN 103515487A
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- packaging substrate
- ceramic packaging
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- 239000000758 substrate Substances 0.000 title claims abstract description 51
- 239000000919 ceramic Substances 0.000 title claims abstract description 46
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 25
- 238000000034 method Methods 0.000 title abstract description 27
- 235000012431 wafers Nutrition 0.000 title abstract 3
- 238000004806 packaging method and process Methods 0.000 claims abstract description 36
- 238000005530 etching Methods 0.000 claims abstract description 15
- 239000011248 coating agent Substances 0.000 claims abstract description 10
- 238000000576 coating method Methods 0.000 claims abstract description 10
- 238000001704 evaporation Methods 0.000 claims abstract description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 16
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 14
- 229910052802 copper Inorganic materials 0.000 claims description 14
- 239000010949 copper Substances 0.000 claims description 14
- 238000007747 plating Methods 0.000 claims description 10
- 229910000881 Cu alloy Inorganic materials 0.000 claims description 9
- 230000004888 barrier function Effects 0.000 claims description 9
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 7
- 239000010936 titanium Substances 0.000 claims description 7
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 6
- 229910045601 alloy Inorganic materials 0.000 claims description 6
- 239000000956 alloy Substances 0.000 claims description 6
- 239000011651 chromium Substances 0.000 claims description 6
- 239000003814 drug Substances 0.000 claims description 6
- 230000008020 evaporation Effects 0.000 claims description 6
- 238000000059 patterning Methods 0.000 claims description 5
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 4
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- 229910000599 Cr alloy Inorganic materials 0.000 claims description 3
- 229910000990 Ni alloy Inorganic materials 0.000 claims description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 3
- 229910001069 Ti alloy Inorganic materials 0.000 claims description 3
- 239000002253 acid Substances 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 229910052804 chromium Inorganic materials 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 239000010931 gold Substances 0.000 claims description 3
- MSNOMDLPLDYDME-UHFFFAOYSA-N gold nickel Chemical compound [Ni].[Au] MSNOMDLPLDYDME-UHFFFAOYSA-N 0.000 claims description 3
- 238000007654 immersion Methods 0.000 claims description 3
- 238000001459 lithography Methods 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000004332 silver Substances 0.000 claims description 3
- 238000001039 wet etching Methods 0.000 claims description 3
- 239000013043 chemical agent Substances 0.000 claims description 2
- 238000009713 electroplating Methods 0.000 abstract description 10
- 230000008569 process Effects 0.000 abstract description 4
- 229920002120 photoresistant polymer Polymers 0.000 abstract 3
- 230000000694 effects Effects 0.000 description 4
- 238000007772 electroless plating Methods 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- 238000011161 development Methods 0.000 description 2
- 230000018109 developmental process Effects 0.000 description 2
- 238000005286 illumination Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 230000013011 mating Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 238000002203 pretreatment Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000002310 reflectometry Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
- H01L21/4807—Ceramic parts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
Abstract
The invention relates to a method for manufacturing a ceramic package substrate used in light-emitting wafers. The method comprises the following steps: forming through holes with the depth-to-width ratio being 4/1 to 10/1 on the ceramic package substrate, and forming a first conductive layer with an electric conduction function on the surface of the ceramic package substrate and the wall surfaces of the through holes by using a cathode arc evaporation method; forming a patterned dry film photoresist through processes such as photoresisting, exposing and developing; forming a second conducive layer on a portion, not covered by the photoresist, of the first conducive layer through a coating electroplating step and filling the through holes; removing the dry film photoresist; and etching to form a circuit layer to complete circuiting of the ceramic package substrate. Therefore, the ceramic package substrate can be directly used for packaging a light-emitting wafer.
Description
Technical field
The present invention, about a kind of ceramic packaging substrate, refer to that especially a kind of making has good heat radiating efficiency, and processing procedure is comparatively easy, and is can be applicable to the manufacture method of the ceramic packaging substrate of luminescent wafer.
Background technology
All the time, there is the exploitation that light-emitting diode is installed on to the illumination etc. of printed circuit board (PCB) (PCB).Especially, in recent years since, have output large, the needs of the illumination that brightness is high etc.; Along with High Power LED demand increases gradually, cause the heat that heat-radiating substrate will carry significantly to promote, make heat-radiating substrate be promoted to metallic core printed circuit board (PCB) (MCPCB) from old printed circuit board (PCB), yet, under a large amount of uses of High Power LED more, because not mating with the substrate heat coefficient of expansion, the dielectric layer of metallic core printed circuit board base board cause plate quick-fried and open circuit, and the problem of the not anti-high AC voltage of its existence, be to change gradually to adopt pottery as heat sink material in the recent period.
When utilizing general circuit processing procedure to apply in ceramic substrate; many large small-bore different through holes in the surface of ceramic substrate, have been covered with; especially apply the ceramic substrate of light-emitting diode; it has the through hole (ratio of the degree of depth of through hole or length and width or diameter) of high-aspect-ratio; these through holes are when carrying out sputter; usually cannot make the surface conducting completely of ceramic substrate; and often can be because formed pore or bubble in the process of electroplating, and cause eventually the formation that affects circuit.
As TaiWan, China patent announcement number No. 540279, patent name " is made the method for small-pore-diameter copper through hole " at ceramic substrate, it mainly first punchinges, bores a hole after the first pre-treatment steps such as electrical connection on a substrate, in substrate surface, with sputtering way, sequentially form titanium layer and copper layer, thereafter row is implemented the process of an electroplating chemical copper again, and after sticking dry film, expose, the step such as development, subsequently on line pattern copper facing to form copper wire, after completing, peel off dry film, sequentially nickel plating and gold-plated in copper wire, completes metallization process again.
Though this kind of habit has processing procedure can make circuit thin straight and have the advantages such as desirable heat-conducting effect concurrently, and small-bore through hole cannot conducting problem, the conducting that also can make completely by the step of electroplating chemical copper; Only, its processing procedure is comparatively numerous and diverse, needs " sputter ", " electroless plating chemical copper " and " electroplating copper facing ”Deng tri-road plated film steps just can complete.
Summary of the invention
In view of this, the present invention is providing a kind of making to have good heat radiating efficiency, and processing procedure is completeer easy, and can be applicable to the manufacture method of the ceramic packaging substrate of luminescent wafer, is its main purpose person.
For on reaching, take off object, in the present invention, Application in manufacture is in the ceramic packaging substrate of luminescent wafer, in this ceramic packaging substrate, form the perforation that depth-to-width ratio is 4/1 ~ 10/1, then in the wall of this ceramic packaging substrate surface and perforation, form the first conductive layer of tool electric action in cathodic arc evaporation mode; Through processing procedures such as photoresistance, exposure, developments, form patterning dry film photoresistance again; Then through electroplating plated film step, on the first conductive layer that does not have photoresistance to cover, form the second conductive layer and filling perforation; Then, remove dry film photoresistance, finally in etching, form line layer, to complete the circuit of ceramic packaging substrate, and can directly for luminescent wafer, encapsulate.
According to above-mentioned primary structure feature, after this plating plated film step, further include plating reflectance coating step, in this line layer surface, be coated with reflectance coating.
According to above-mentioned primary structure feature, in this etching step, further include insulating barrier step is set, in this ceramic packaging substrate surface, be formed with insulating barrier.
According to above-mentioned primary structure feature, between the first described conductive layer and this ceramic packaging substrate, can further be provided with one deck intermediary layer, and this intermediary layer can be titanium, chromium, nickel, copper, or the alloy of combinations thereof.
According to above-mentioned primary structure feature, the first described conductive layer can be copper, titanium/copper alloy, chromium/copper alloy, nickel/copper alloy, or the alloy of combinations thereof.
According to above-mentioned primary structure feature, can, according to the requirement of the second conductive layer thickness, select the thickness of corresponding dry film photoresistance.
According to above-mentioned primary structure feature, described stripping step is used strong base solution medicament mat horizontal striping line or immersion type striping groove to carry out striping.
According to above-mentioned primary structure feature, described etching step removes this first conductive layer and intermediary layer with wet etching by strong-acid type or strong base medicament.
According to above-mentioned primary structure feature, in this etching step, further include surfaction step, the metal level of its plated aluminum, silver, gold, nickel gold or NiPdAu on line layer, to improve surperficial scolding tin intensity and routing intensity, and then increases the stability of product and improves surperficial reflectivity.
According to above-mentioned primary structure feature, the depth-to-width ratio of described perforation take 4/1 ~ 8/1 as good.
Particularly, manufacture method of the present invention can produce following effect.
1., while solving generally with sputtering way plated film, if in the time of need being plated to predetermined thickness, the problem that its processing procedure time is longer, can reduce the processing procedure time by cathodic arc evaporation mode of the present invention.
2. the present invention can be applicable to small-bore, promotes laser piercing efficiency.
3. when electroplating plated film step, do not need thick coating film thickness, reduce the time of electroplating plated film.
4. do not need to use the processing procedure of electroless plating plated film.
Accompanying drawing explanation
Fig. 1 is the first embodiment schematic flow sheet of manufacture method in the present invention.
Fig. 2 A ~ G is the structural representation of manufacture method in the present invention.
Fig. 3 is the second embodiment schematic flow sheet of manufacture method in the present invention.
Fig. 4 is the 3rd embodiment schematic flow sheet of manufacture method in the present invention.
Fig. 5 is the 4th embodiment schematic flow sheet of manufacture method in the present invention.
Figure number explanation:
Ceramic packaging substrate step 101 is provided
Boring step 102
Cathodic arc evaporation step 103
Yellow light lithography image-forming step 104
Electroplate plated film step 105
Stripping step 106
Etching step 107
Plating reflectance coating step 108
The first conductive layer 31
The second conductive layer 33
Patterning dry film photoresistance 410
Embodiment
As shown in the first embodiment schematic flow sheet of Fig. 1 manufacture method of the present invention, the present invention at least comprises the following step.
Ceramic packaging substrate step 101 is provided.
Boring step 102, can utilize Laser drill to make this ceramic packaging substrate 20 form the perforation 21 that depth-to-width ratio is 4/1 ~ 10/1, and shown in Fig. 2 A, and the depth-to-width ratio of this perforation 21 take 4/1 ~ 8/1 as good.
Cathodic arc evaporation step 103, in this ceramic packaging substrate 20 surfaces and 21 the wall of boring a hole form the first conductive layer 31, this first conductive layer 31 can be copper, titanium/copper alloy, chromium/copper alloy, nickel/copper alloy, or the alloy of combinations thereof, shown in Fig. 2 B, and add last layer intermediary layer 32 between the first conductive layer 31 and ceramic packaging substrate 20, this intermediary layer can be titanium, chromium, nickel, copper, or the alloy of combinations thereof, especially when these the first conductive layer 31 materials are copper, can increase the tack of 20 of this first conductive layer 31 and ceramic packaging substrates.
Yellow light lithography image-forming step 104, use dry film photoresistance 41 to be covered on the first conductive layer 31, shown in Fig. 2 C, can be according to the second conductive layer thickness of different demands, select to be applicable to the thickness of dry film photoresistance, coordinate suitable heating roller temperature, pressure, laminating speed and dry film tension force, dry film photoresistance 41 is fitted on the first conductive layer 31 as electroplating mold, at appropriate temperature and humidity, coordinate suitable exposure energy, on the first conductive layer 31, via egative film 42, wish being formed to the second conductive layer partly covers, exposure, uncovered dry film photoresistance hardens, place after several minutes, via developing, remove again the dry film photoresistance through covering, patterning dry film photoresistance 410 beyond reserved line, shown in Fig. 2 D, with by this dry film photoresistance patterning.
Electroplate plated film step 105, utilize electroless plating mode to form the second conductive layer 33 on the first conductive layer 31 that does not have dry film photoresistance 410 to cover, shown in Fig. 2 E, and this perforation 21 is filled up to conducting, reach conducting wire is provided, can help heat conduction again.
Stripping step 106, its effect is mainly used to the dry film photoresistance of not wanting left after exposure imaging to remove, use chemical agent (for example strong base solution medicament), mat horizontal striping line or immersion type striping groove carry out striping, and the dry film photoresistance being covered on this first conductive layer 31 is removed, shown in Fig. 2 F.
Etching step 107, shown in Fig. 2 G, removes the first conductive layer and the intermediary layer etching that do not have the second conductive layer to cover, and forms line layer 34; During enforcement, this etching step is undertaken by strong-acid type or strong base medicament with wet etching.
The manufacture method of ceramic packaging substrate in the present invention, via above fabrication steps, can not only make ceramic packaging substrate metallization and form circuit, and can save to practise has repeatedly plated film step, only can complete circuit by " cathodic arc evaporation " and " plating plated film ", and be applied to light-emitting diode use, there is the perforation of high-aspect-ratio, still can there is preferably through-hole rate, guarantee the conducting of perforation, and then the stability of product is provided.
Moreover, as shown in Fig. 3 the second embodiment, in the rear plating reflectance coating step 108 that further includes of this plating plated film step 106, in this line layer surface, be coated with reflectance coating, to increase optical reflection effect, this plating reflectance coating step 108 can embodiment as shown in the figure in, after etching step 107, carry out; Also can, as shown in the first embodiment of Fig. 4, in electroplating between plated film step 106 and stripping step 106, carry out.
In addition, in above-described embodiment, also can further include insulating barrier step 109 is set in this etching step 107, as shown in the 3rd embodiment of Fig. 5, in this ceramic packaging substrate surface, be formed with insulating barrier, can prevent the harm of short circuit between scolding tin and conductor or external mechanical wounding, moisture etc., to keep good line conduction, insulating properties; And after insulating barrier step 109 is set, further include surfaction step 110, and the metal level of its plated aluminum, silver, gold, nickel gold or NiPdAu on line layer, to improve surperficial scolding tin intensity and routing intensity, and then the stability of increase product.
Claims (10)
1. Application in manufacture, in a ceramic packaging substrate for luminescent wafer, is characterized in that, at least comprises the following step:
One ceramic packaging substrate is provided;
Boring step, makes this ceramic packaging substrate form the perforation that depth-to-width ratio is 4/1 ~ 10/1;
Cathodic arc evaporation step, wall surperficial in this ceramic packaging substrate and perforation forms the first conductive layer;
Yellow light lithography image-forming step, is used dry film photoresistance to be covered on the first conductive layer, and by this dry film photoresistance patterning;
Electroplate plated film step, on the first conductive layer that does not have photoresistance to cover, form the second conductive layer, and this perforation is filled up to conducting;
Stripping step, is used chemical agent that the dry film photoresistance being covered on this first conductive layer is removed;
Etching step, removes the first conductive layer etching that does not have the second conductive layer to cover, and forms line layer.
2. Application in manufacture as claimed in claim 1, in the ceramic packaging substrate of luminescent wafer, is characterized in that, further includes plating reflectance coating step after this plating plated film step, in this line layer surface, is coated with reflectance coating.
3. Application in manufacture as claimed in claim 1 or 2, in the ceramic packaging substrate of luminescent wafer, is characterized in that, in this etching step, further includes insulating barrier step is set, and in this ceramic packaging substrate surface, is formed with insulating barrier.
4. Application in manufacture as claimed in claim 3 is in the ceramic packaging substrate of luminescent wafer, it is characterized in that, after being set, insulating barrier step further includes surfaction step, the metal level of its plated aluminum, silver, gold, nickel gold or NiPdAu on line layer, to improve surperficial scolding tin intensity and routing intensity, and then the stability of increase product.
5. Application in manufacture as claimed in claim 3, in the ceramic packaging substrate of luminescent wafer, is characterized in that, this first conductive layer can be copper, titanium/copper alloy, chromium/copper alloy, nickel/copper alloy, or the alloy of combinations thereof.
6. Application in manufacture as claimed in claim 3 is in the ceramic packaging substrate of luminescent wafer, it is characterized in that, between this first conductive layer and this ceramic packaging substrate, can further be provided with one deck intermediary layer, and this intermediary layer can be titanium, chromium, nickel, copper, or the alloy of combinations thereof.
7. Application in manufacture as claimed in claim 3, in the ceramic packaging substrate of luminescent wafer, is characterized in that, can, according to the requirement of the second conductive layer thickness, select the thickness of corresponding dry film photoresistance.
8. Application in manufacture as claimed in claim 3, in the ceramic packaging substrate of luminescent wafer, is characterized in that, this stripping step is used strong base solution or strong base medicament mat horizontal striping line or immersion type striping groove to carry out striping.
9. Application in manufacture as claimed in claim 3, in the ceramic packaging substrate of luminescent wafer, is characterized in that, this etching step removes this first conductive layer with wet etching by strong-acid type medicament.
10. Application in manufacture as claimed in claim 3, in the ceramic packaging substrate of luminescent wafer, is characterized in that, the depth-to-width ratio of this perforation take 4/1 ~ 8/1 as good.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210206909.3A CN103515487A (en) | 2012-06-21 | 2012-06-21 | Method for manufacturing ceramic package substrate used in light-emitting wafers |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210206909.3A CN103515487A (en) | 2012-06-21 | 2012-06-21 | Method for manufacturing ceramic package substrate used in light-emitting wafers |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN103515487A true CN103515487A (en) | 2014-01-15 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201210206909.3A Pending CN103515487A (en) | 2012-06-21 | 2012-06-21 | Method for manufacturing ceramic package substrate used in light-emitting wafers |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107197597A (en) * | 2017-05-23 | 2017-09-22 | 福建华清电子材料科技有限公司 | A kind of method that conductive channel is processed on ceramic substrate |
| WO2018102998A1 (en) * | 2016-12-07 | 2018-06-14 | 东莞市国瓷新材料科技有限公司 | Method for preparing ceramic package substrate with copper plating dams |
| CN110635017A (en) * | 2019-08-09 | 2019-12-31 | 惠州市志金电子科技有限公司 | Miniature backlight substrate packaging method |
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| US6541712B1 (en) * | 2001-12-04 | 2003-04-01 | Teradyhe, Inc. | High speed multi-layer printed circuit board via |
| TW593716B (en) * | 1998-10-08 | 2004-06-21 | Metal Ind Res & Dev Ct | Multilayered deposited metal film on surface of non-metallic substrate and method for producing the same |
| TW200943513A (en) * | 2008-04-15 | 2009-10-16 | Phoenix Prec Technology Corp | Package substrate and method for fabricating the same |
| CN101916751A (en) * | 2010-07-30 | 2010-12-15 | 日月光半导体制造股份有限公司 | Packaging structure and manufacture method thereof |
-
2012
- 2012-06-21 CN CN201210206909.3A patent/CN103515487A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW593716B (en) * | 1998-10-08 | 2004-06-21 | Metal Ind Res & Dev Ct | Multilayered deposited metal film on surface of non-metallic substrate and method for producing the same |
| US6541712B1 (en) * | 2001-12-04 | 2003-04-01 | Teradyhe, Inc. | High speed multi-layer printed circuit board via |
| TW200943513A (en) * | 2008-04-15 | 2009-10-16 | Phoenix Prec Technology Corp | Package substrate and method for fabricating the same |
| CN101916751A (en) * | 2010-07-30 | 2010-12-15 | 日月光半导体制造股份有限公司 | Packaging structure and manufacture method thereof |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018102998A1 (en) * | 2016-12-07 | 2018-06-14 | 东莞市国瓷新材料科技有限公司 | Method for preparing ceramic package substrate with copper plating dams |
| CN107197597A (en) * | 2017-05-23 | 2017-09-22 | 福建华清电子材料科技有限公司 | A kind of method that conductive channel is processed on ceramic substrate |
| CN110635017A (en) * | 2019-08-09 | 2019-12-31 | 惠州市志金电子科技有限公司 | Miniature backlight substrate packaging method |
| CN110635017B (en) * | 2019-08-09 | 2021-07-09 | 惠州市志金电子科技有限公司 | Miniature backlight substrate packaging method |
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Application publication date: 20140115 |