201251554 六、發明說明： 【發明所屬之技術領域】 本發明係關於一種陶瓷基板上製作銅電路，並增加電鍍效率，解決小 口徑導通孔之無法導通的問題。 【先前技術】 按，在全球暖化加劇、氣候變異及災害頻傳的衝擊下，能源價格屢屢 創新高，在在加深了對環保意識的重視與能源危機的壓力；同時，在照明 設備上也產生了重大的改變，使得發光二極體(LED，Light Emitting Diodes)之發展亦佔有舉足輕重之角色；由於發光二極體具有效率高、省電 能、壽命長、冷發光、反應速度快及色彩一致性高等眾多較傳統光源為佳 之優點’因此發光二極體用於照明設備係現今光電產業、照明產業發展的 重點，且逐漸地取代傳統光源的應用；由於以往大多使用較低功率的發光 二極體’ 一般電子業界常用的傳統硬、軟式印刷電路板足以滿足需求。為 因應照明之需求’發光二極體朝向更高功率的發展，而傳統的印刷電路板 係使用Epoxy或其他高分子材料作為絕緣基板層，而高分子材料之導熱與 散熱係數極低，導熱與散熱性能極差。雖然絕緣樹脂混入氧化鋁或氧化梦 等無機材料製成「絕緣導熱膠」可幫助導熱，但是散熱係數仍極低，無法 承載向功率發光二極體的熱能；而且，發光二極體的壽命、功能攸關其散 熱措施、散熱基板的良窳，是現行發光二極體發展應用上之關鍵性問題。 再按，爲有效解決傳統發光二極體封裝應用時散熱不良問題，遂有業 者使用氧化铭(Ah〇3)或氮化鋁等陶瓷材料作為絕緣基板層，由於該氧化銘 之導熱係數是Epoxy與高分子材料的40倍以上，是目前業界公認導熱與散 熱性能極佳的材料；同時，以往於氧化鋁或氮化鋁等陶瓷絕緣基板層完成 金屬化之銅電路薄膜製程含有氧化物或氮化物的雜質，為符合平整線路及 理想電性之要求，乃需採用高平整度的基板，故其製造成本較高；再者， 由於形成銅電路之塗料本身為顆粒狀，且含有其他雜質，同時在線路較薄 處具有較多的雜質’故其電傳導效率不佳，且散熱效果亦不理想。 3 201251554 再者，習用的基板在鍍銅前，基板的表面通常是佈滿了許多大小口徑 不同的導通孔，這些導通孔在行濺鍍時，常常無法使得基板的表面能夠完 全的導通，而且在減鍍的過程中則常會因為所形成的氣孔或是氣泡，而终 致影響線路的形成。 為此，請參照中華民國發明專利第「540279」號，該專利係提供一種 電路基板金屬化製程，其先對基板表面作直接濺鍍，再經由鍍化學銅的步 驟來去除於濺鍍過程中所形成的氣孔、氣泡及增加足夠厚度之銅電路，如 此將會增加生產成本及效率；同時，將有影響陶瓷基板散熱能力之問題存 在。 【發明内容】 發明人有鑑於上述製法於實施時之缺失，爰精心研究，再進一步發展 出本案一種在陶瓷基板上製作銅電路及填滿鍍銅導通孔的方法。 本發明之一目的乃在提供一種可使陶瓷基板經直接濺鍍後，續於該陶 驗金料獅表面積增加，以增加電 鍍效率及提高陶瓷基板散熱能力。 本發明之另一目的乃在提供一種減少一次之電鍍銅之程序，以節省工 時、降低生產成本。 本發明為達到上述目的所採用之技術手段，包括有： 步驟1.鑽孔、親：提供—喊基板，該喊基板具有上表面、下表 面及數個料孔’該等導通孔係以雷射鑽出，並貫通於該上表面與下表面， 該等導通孔呈沙漏狀；續於該基板表面喊鍍方式職 可為鈦金制、屬層、私化鈦金屬料； 金屬層 步驟2.電鐘銅.續進行電鍍鋼步驟以填滿過小口徑之導通孔 鍍銅； 步驟3.壓膜：續於該基板上貼附-層乾膜； 步驟4.曝光顯影.續進行曝光、顯影等步釋，以完成顯現鋼電路； 步驟5_似j肖以働彳方式去除銅電路外之金屬層； 201251554 步驟6·剝膜：續於完成後進行將乾膜剝除； 步驟7防铜氧化·續進行防銅氧化程序，可為有機防焊膜(0SP)、化錫、 化金化銀、電鍍銀錢鍍金；經前述步驟即完成金屬化製程。 為達到上述目的所採帛之另_技術手段係將上述之步驟加以變 化除包括前述之步驟i〜步驟4.外並於前述步驟後進行： 步驟5a.電軸；續概銅電路上鍍銅明加_路之銅層厚度； 步驟6a.電齡氧化^^續於完成增厚靖之銅電路上賴金或鑛錦 銀’以防止該銅電路上之鋼金屬氧化； 步驟7a· _ :續於完錢進行將乾膜剝除； 步驟8a.餘刻·續餘剥膜後利用侧絲銅電路外之金屬層，以完成銅 電路； 【實施方式】 請參照第la〜lg圖所示，其係本發明一種在陶瓷基板上製作銅電路及 填滿鑛銅導通孔的方法之實施方式，其製造方法包括有： 步驟1.鑽孔、賤銀：提供-陶竞基，細究基板j具有上表面u、 下表面12及數個導通孔13，該等導通孔13係呈沙漏狀，其係分別由該上 表面11及下表面12以雷射方式鑽出’並交會於該陶竞基板】内，且該導 通孔13係貫通該上表面11及下表面12 ;續於該基板表面以真空減鑛 (Sputtering)方式形成金屬層14(於本實施例為依序形成之鈦層及銅層，惟 熟悉該項技藝者仍可使用其他金屬，如鉻金屬層或鋁化鈦金屬層等），以利 於在該陶瓷基板1進行後續電鍍銅電路(如第la圖所示）； 步驟2.電鑛銅：續利用電錄銅方式於完成該金屬層14之表面再加上一 電鍍鋼層20 ’同時將該等導通孔13予以填滿；由於該等導通孔13係呈沙 漏狀，所以與電鍍金屬接觸的表面積增加，可有效提高該等導通孔13的内 壁面上形成導電層（如第lb圖所示），且此沙漏狀之導通孔有助於電鍍中、 所謂填孔的效率’進而提昇生產效率而增加產能；另’此導通孔因填滿金 屬’無氣泡或其它雜質，而可有效提高陶瓷基板散熱能力； 201251554 步驟3.壓膜：續於該陶瓷基板1上欲形成銅電路之一面貼附一層乾膜 (DRY FILM)30，於本實施例該乾膜係為一種感光型光阻膜，其係一種當受 紫外線照射後會產生的聚合反應之樹脂類，其功能係在聚合後當作蝕刻阻 劑，以保護該銅電路不被蚀刻掉(如第1c圖所示）； 步驟4.曝光、顯影：續進行曝光、顯影等步驟，以完成顯現銅電路； 其中’曝光係將銅電路製成正版的光罩後，先行定位及平貼於貼好乾膜3〇 的陶瓷基板1上’再經曝光機進行抽真空、壓板及紫外線照射而完成，其 中紫外線的照射將使該乾膜30產生聚合作用，而由於該光罩使用，其上的 銅電路50部份係紫外線所無法透射，因此，乾膜3〇上未被紫外線照射的 部份，將無法產生聚合作用；其中，「顯影」：至於顯影的原理則係利用顯 影液將未產生5^合的乾膜30部份去除，而以物理及化學剝除方式將銅電路 50以外的銅面顯現出來(如第ic圖及第圖所示）； 步驟5·蝕刻：續以蝕刻方式去除陶瓷基板丨表面銅電路5〇外之金屬 層，以完成該銅電路50(如第le圖所示）； 步驟6·剝膜：續於完成蝕刻程序後進行去除陶瓷基板丨表面殘留之乾膜 30(如第If圖所示）,· 步驟7.防銅氧化：續於去除陶瓷基板丨表面殘留之乾膜3〇之步驟後進 行防銅氧化層80程序，於本實施方式可以附著一有機防焊膜(㈣、化錫、 化金、化銀、化錄鈀金、電鍍金或電鍍銀等方式防止鋼電路5〇上之鋼面氧 化(如第lg圖所示）。 再請參照第2a~2h圖所示，其係本發明之另一實施方式，其製造方法 包括有：步驟1.鑽孔、濺鍵；步驟2.電鐘；步驟3_壓膜；步驟4·曝光、 顯影；步釋5a.電鑛銅；步驟6a.防銅氧化層；步驟7a.觸；步辑8&•蝕 刻等步驟’其中步驟1，步驟4.(如第2a〜2d圖所示)係與前述實施方式相 同，故在此不另贅述，其餘步驟分述如下： 步驟5a·電脑：續於前述步驟完成之該銅電路5〇上細以增加銅電 路之銅層厚度(如第2e圖所示）；201251554 VI. Description of the Invention: [Technical Field] The present invention relates to a copper circuit fabricated on a ceramic substrate, which increases plating efficiency and solves the problem that the small-diameter via hole cannot be turned on. [Previous technology] According to the impact of global warming, climate variability and frequent disasters, energy prices have repeatedly hit new highs, which has deepened the emphasis on environmental awareness and the pressure of energy crisis. At the same time, it also produces on lighting equipment. Significant changes have made the development of LEDs (Light Emitting Diodes) also play a pivotal role; because of the high efficiency, power saving, long life, cold illumination, fast response and color consistency of LEDs Higher than many traditional light sources are better advantages. Therefore, the use of light-emitting diodes in lighting equipment is the focus of today's optoelectronic industry and lighting industry, and gradually replaces the application of traditional light sources; most of the low-power LEDs have been used in the past. 'Generally used in the electronics industry, traditional hard and soft printed circuit boards are sufficient. In order to meet the needs of lighting, 'light-emitting diodes are moving towards higher power, while traditional printed circuit boards use Epoxy or other polymer materials as the insulating substrate layer, while the thermal conductivity and heat dissipation coefficient of polymer materials are extremely low, and thermal conductivity is The heat dissipation performance is extremely poor. Although the insulating resin is mixed with an inorganic material such as alumina or oxidized dream to form an "insulating thermal conductive adhesive" to help conduct heat conduction, the heat dissipation coefficient is still extremely low, and it is impossible to carry heat energy to the power light-emitting diode; moreover, the life of the light-emitting diode, The function of the heat-dissipating measures and the heat-dissipating substrate is a key issue in the development and application of the current light-emitting diode. Press again, in order to effectively solve the problem of poor heat dissipation in the traditional LED package application, the manufacturer uses the ceramic material such as Oxidation (Ah〇3) or aluminum nitride as the insulating substrate layer, because the thermal conductivity of the oxidation is Epoxy. More than 40 times that of polymer materials, it is recognized as an excellent material for heat conduction and heat dissipation. At the same time, the process of copper circuit film which has been metallized in a ceramic insulating substrate such as alumina or aluminum nitride contains oxide or nitrogen. The impurity of the compound is required to meet the requirements of the flat line and the ideal electrical property, and the substrate having a high flatness is required, so that the manufacturing cost is high; further, since the coating forming the copper circuit itself is granular and contains other impurities, At the same time, there are more impurities in the thinner part of the line, so the electrical conduction efficiency is not good, and the heat dissipation effect is not ideal. 3 201251554 Furthermore, before the copper substrate is used, the surface of the substrate is usually filled with a plurality of via holes having different diameters and diameters. When these sputtering holes are sputtered, the surface of the substrate is often unable to be completely turned on, and In the process of deplating, it is often caused by the formation of pores or bubbles, which ultimately affect the formation of the line. To this end, please refer to the Republic of China invention patent No. "540279", which provides a circuit substrate metallization process, which first directly sputters the surface of the substrate, and then removes the sputtering process by the step of plating copper. The formed pores, bubbles and copper circuits of sufficient thickness will increase the production cost and efficiency; at the same time, there will be problems affecting the heat dissipation capability of the ceramic substrate. SUMMARY OF THE INVENTION In view of the lack of implementation of the above-mentioned method, the inventors have carefully studied and further developed a method for fabricating a copper circuit on a ceramic substrate and filling a copper-plated via. SUMMARY OF THE INVENTION One object of the present invention is to provide an increase in the surface area of the ceramic gilt after direct sputtering of the ceramic substrate to increase the plating efficiency and improve the heat dissipation capability of the ceramic substrate. Another object of the present invention is to provide a procedure for reducing copper plating once to save man-hours and reduce production costs. The technical means adopted by the present invention to achieve the above object include: Step 1. Drilling, pro: providing - shouting the substrate, the shouting substrate has an upper surface, a lower surface and a plurality of holes" Drilling out and penetrating the upper surface and the lower surface, the through holes are hourglass-shaped; the surface of the substrate may be a titanium alloy, a genus layer, a private titanium material; the metal layer step 2 .Electric clock copper. Continue to carry out the step of plating steel to fill the through hole of copper plating with small diameter; Step 3. Pressing: Continue to attach the layer to the substrate; Step 4. Exposure and development. Continue exposure and development Waiting for step-by-step to complete the visualization of the steel circuit; Step 5_ removes the metal layer outside the copper circuit by means of 肖; 201251554 Step 6· Stripping: Continue to strip the dry film after completion; Step 7 Anti-copper Oxidation · Continued copper oxidation process, can be organic solder mask (0SP), tin, gold, silver, gold plating gold plating; through the above steps to complete the metallization process. Another technical means for achieving the above objectives is to change the above steps except for the steps i to 4. above and after the foregoing steps: Step 5a. Electric axis; continuous copper plating on copper circuit Mingjia _ road copper layer thickness; Step 6a. Electric age oxidation ^ ^ continued to increase the thickness of Jing copper circuit on Lai Jin or mine Jin Yin ' to prevent oxidation of the steel metal on the copper circuit; Step 7a · _ : Continued After the completion of the process, the dry film is stripped; Step 8a. Remaining and continuation of the stripping, the metal layer outside the side copper circuit is used to complete the copper circuit; [Embodiment] Please refer to the figure la~lg, The present invention relates to an embodiment of a method for fabricating a copper circuit and filling a via copper via hole on a ceramic substrate, and the manufacturing method thereof comprises the following steps: Step 1. Drilling, silver plating: providing - Tao Jingji, examining the substrate j having an upper surface u The lower surface 12 and the plurality of through holes 13 are in the form of an hourglass, which are respectively laser-drawn by the upper surface 11 and the lower surface 12 and intersected in the Tao competition substrate. And the via hole 13 penetrates the upper surface 11 and the lower surface 12; The surface of the plate is formed by a vacuum smear-forming method. The titanium layer and the copper layer are sequentially formed in this embodiment. However, those skilled in the art can still use other metals, such as a chrome metal layer or a titanium aluminide. a metal layer or the like) to facilitate subsequent electroplating of the copper circuit on the ceramic substrate 1 (as shown in FIG. 1a); Step 2. Electro-copper copper: continued to use the electro-optical copper method to complete the surface of the metal layer 14 An galvanized steel layer 20' is filled with the via holes 13 at the same time; since the via holes 13 are hourglass-shaped, the surface area in contact with the plated metal is increased, and the inner wall surface of the via holes 13 can be effectively formed. Conductive layer (as shown in Figure lb), and this hourglass-shaped via hole contributes to the efficiency of electroplating, so-called hole filling, which in turn increases production efficiency and increases productivity; the other 'this via hole is filled with metal' without bubbles Or other impurities, which can effectively improve the heat dissipation capability of the ceramic substrate; 201251554 Step 3. Pressing the film: Continue to form a dry film (DRY FILM) 30 on one side of the ceramic substrate 1 to form a copper circuit, which is dried in this embodiment. Membrane system is a photosensitive type A photoresist film which is a resin which is polymerized after being irradiated with ultraviolet rays, and functions as an etching resist after polymerization to protect the copper circuit from being etched away (as shown in FIG. 1c). Step 4. Exposure, development: Continue to perform exposure, development and other steps to complete the visualization of the copper circuit; wherein the 'exposure system makes the copper circuit into a genuine mask, first position and flatten the paste on the dry film 3〇 The ceramic substrate 1 is further subjected to vacuuming, pressing, and ultraviolet irradiation through an exposure machine, wherein ultraviolet irradiation causes the dry film 30 to be polymerized, and the copper circuit 50 on the photomask is used. Ultraviolet light is not transmitted. Therefore, the portion of the dry film that is not irradiated with ultraviolet rays will not be polymerized. Among them, "development": as for the principle of development, the developer will not produce a dry film. 30 parts are removed, and the copper surface other than the copper circuit 50 is visualized by physical and chemical stripping (as shown in the figure ic and the figure); Step 5: Etching: Continued etching to remove the ceramic substrate 丨 surface copper Circuit 5 a metal layer outside to complete the copper circuit 50 (as shown in FIG. 38); Step 6: Stripping: Continue to complete the etching process to remove the dry film 30 remaining on the surface of the ceramic substrate (as shown in Fig. If ), · Step 7. Anti-copper oxidation: Continue the procedure of removing the dry film 3〇 remaining on the surface of the ceramic substrate, and then perform the copper-proof oxide layer 80 procedure. In this embodiment, an organic solder resist film ((4), tin can be attached. , gold, silver, chemically recorded palladium, electroplated gold or electroplated silver to prevent oxidation of the steel surface on the steel circuit 5 (as shown in Figure lg). Referring to FIGS. 2a-2h, another embodiment of the present invention includes the following steps: 1. drilling, splashing; step 2. electric clock; step 3_ lamination; step 4 Exposure, development; step 5a. electro-mineral copper; step 6a. copper-proof oxide layer; step 7a. touch; step 8 & • etching, etc. 'Step 1 and step 4. (as shown in Figures 2a to 2d) The description is the same as the previous embodiment, and therefore, the rest of the steps are as follows: Step 5a·Computer: The copper circuit 5 is completed in the foregoing steps to increase the thickness of the copper layer of the copper circuit ( As shown in Figure 2e);
201251554 步驟6a.電驗氧化層··續於完成增厚鋪之_路5()表面上链锦， 以完成-舰層6G，該鍍麟6G之材料可域或鍍祕；該錢錄層 60上可後續製作一金層70 ’該金層70係爲符合高頻要求，即該鍍錦層6〇 係置於該綱路5G糾符合締要权後職叙金層7()間，以避免銅 電路50中之銅離子遷移(MIGRATING)(如第2f圖所示）； 步驟7a.剝膜：續於完成防氧化層後進行去除陶究基板i表面殘留 膜30(如第2g圖所示）； i 步驟8a.钮刻.續於上述剝膜後利用賴方式，去除陶竞基板i表面麵 電路50外之金屬層14,以完成該銅電路5〇(如第2h圖所示）。 經上述說明可充分顯露本發明除具備鋼面平整度佳.、具高導熱效率、 尚頻電氣特性、低損失及製作成本低等優點，更由於該陶竞基板1上之導 通孔13係呈沙漏狀，可使該導通孔13於電鍍銅時，與電鍍金屬接觸的表 面積增加，有效解決該導通孔13 口徑過小而造成無法導通的問題。 上列詳細說明或製程、步驟之具避流程係針對本發明之可行實施例之 具體說明，惟該實施例並非用以限制本發明之專利範圍，且各個步驟的執 行順序並非固定一成不變的，凡未脫離本發明技藝精神所為之等效實施或 變更，均應包含於本案之專利範圍中。 綜上所述’本發明係一種在陶究基板上製作銅電路及填滿鍍銅導通孔 的方法’在產業上具有很大之利用價值，可改良習用技術之缺點，在使用 上能增進效益及效率，充份符合發明專利之要件，為一合於實用之理想創 作’故申請人爰依專利法之規定’向鈞局提出發明專利申請，並懇請早 日賜准本案專利，至感德便。 【圖式簡單說明】 第la〜lg圖為本發明之實施方式製程示意圖。 第2a〜2h圖為本發明之另一實施方式之製程示意圖。 【主要元件符號說明】 201251554 陶瓷基板 1 上表面 11 下表面 12 導通孔 13 金屬層 14 電鍍銅層 20 乾膜 30 銅電路 50 鍍鎳層 60 金層 70 防銅氧化層 80 8201251554 Step 6a. Electrode Oxide Layer · Continued on the surface of the thickening shop _ Road 5 () on the surface of the brocade to complete the - ship 6G, the material of the lining 6G can be domain or plated; 60 can be subsequently produced a gold layer 70 'the gold layer 70 is in line with the high frequency requirements, that is, the gilded layer 6 〇 is placed between the 5G correction of the road, the post-employment gold layer 7 (), To avoid copper ion migration (MIGRATING) in the copper circuit 50 (as shown in Figure 2f); Step 7a. Stripping: Continue to remove the residual film 30 on the surface of the ceramic substrate i after completion of the oxidation preventing layer (as in Figure 2g) Illustrated); i Step 8a. Button engraving. Continued after the stripping method described above, the metal layer 14 outside the surface circuit 50 of the Tao competition substrate i is removed by using the Lai method to complete the copper circuit 5〇 (as shown in FIG. 2h) ). The above description can fully reveal that the invention has the advantages of good flatness of the steel surface, high thermal conductivity, good electrical characteristics, low loss and low production cost, and the through hole 13 on the ceramic substrate 1 is The hourglass shape can increase the surface area of the via hole 13 in contact with the plating metal when the copper is plated, thereby effectively solving the problem that the via hole 13 is too small to cause conduction. The detailed description of the above detailed description or the process and the steps of the steps are specific to the possible embodiments of the present invention, but the embodiments are not intended to limit the scope of the invention, and the order of execution of the steps is not fixed. Equivalent implementations or modifications that do not depart from the spirit of the invention are intended to be included in the scope of the invention. In summary, the present invention is a method for fabricating a copper circuit on a ceramic substrate and filling a copper-plated via hole, which has great industrial value, can improve the disadvantages of the conventional technology, and can improve the efficiency in use. And efficiency, fully in line with the requirements of the invention patent, for the ideal creation of a practical application, the applicant therefore filed an invention patent application with the stipulation of the Patent Law, and requested the patent of the case as soon as possible. . BRIEF DESCRIPTION OF THE DRAWINGS The first to lg drawings are schematic views of the process of the embodiment of the present invention. 2a to 2h are schematic views of a process of another embodiment of the present invention. [Main component symbol description] 201251554 Ceramic substrate 1 Upper surface 11 Lower surface 12 Via hole 13 Metal layer 14 Electroplated copper layer 20 Dry film 30 Copper circuit 50 Nickel plating layer 60 Gold layer 70 Copper oxide layer 80 8