CN103515198B - 连续形成两道深度不同的孔或槽的工艺方法 - Google Patents
连续形成两道深度不同的孔或槽的工艺方法 Download PDFInfo
- Publication number
- CN103515198B CN103515198B CN201210216576.2A CN201210216576A CN103515198B CN 103515198 B CN103515198 B CN 103515198B CN 201210216576 A CN201210216576 A CN 201210216576A CN 103515198 B CN103515198 B CN 103515198B
- Authority
- CN
- China
- Prior art keywords
- groove
- deep hole
- hole
- photoresist
- ground floor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 54
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 66
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 40
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 40
- 239000010703 silicon Substances 0.000 claims abstract description 40
- 238000005530 etching Methods 0.000 claims abstract description 8
- 238000001259 photo etching Methods 0.000 claims abstract description 5
- 230000007547 defect Effects 0.000 abstract description 5
- 238000001459 lithography Methods 0.000 abstract description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/3085—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by their behaviour during the process, e.g. soluble masks, redeposited masks
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Weting (AREA)
- Element Separation (AREA)
Abstract
Description
Claims (5)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201210216576.2A CN103515198B (zh) | 2012-06-27 | 2012-06-27 | 连续形成两道深度不同的孔或槽的工艺方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201210216576.2A CN103515198B (zh) | 2012-06-27 | 2012-06-27 | 连续形成两道深度不同的孔或槽的工艺方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103515198A CN103515198A (zh) | 2014-01-15 |
CN103515198B true CN103515198B (zh) | 2016-06-08 |
Family
ID=49897733
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201210216576.2A Active CN103515198B (zh) | 2012-06-27 | 2012-06-27 | 连续形成两道深度不同的孔或槽的工艺方法 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN103515198B (zh) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104465338B (zh) * | 2014-12-26 | 2017-02-22 | 力特半导体(无锡)有限公司 | 深沟槽多层光刻覆盖结构及其光刻覆盖方法 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5135891A (en) * | 1988-01-19 | 1992-08-04 | Mitsubishi Denki Kabushiki Kaisha | Method for forming film of uniform thickness on semiconductor substrate having concave portion |
TW567532B (en) * | 2000-04-25 | 2003-12-21 | Hannstar Display Corp | Method of concurrently defining holes with different etching depths |
CN101713915A (zh) * | 2008-10-06 | 2010-05-26 | 东部高科股份有限公司 | 三态掩膜以及用其制造半导体器件的方法 |
CN102082082A (zh) * | 2009-11-30 | 2011-06-01 | 上海华虹Nec电子有限公司 | 填充高深宽比沟槽的外延工艺方法 |
-
2012
- 2012-06-27 CN CN201210216576.2A patent/CN103515198B/zh active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5135891A (en) * | 1988-01-19 | 1992-08-04 | Mitsubishi Denki Kabushiki Kaisha | Method for forming film of uniform thickness on semiconductor substrate having concave portion |
TW567532B (en) * | 2000-04-25 | 2003-12-21 | Hannstar Display Corp | Method of concurrently defining holes with different etching depths |
CN101713915A (zh) * | 2008-10-06 | 2010-05-26 | 东部高科股份有限公司 | 三态掩膜以及用其制造半导体器件的方法 |
CN102082082A (zh) * | 2009-11-30 | 2011-06-01 | 上海华虹Nec电子有限公司 | 填充高深宽比沟槽的外延工艺方法 |
Also Published As
Publication number | Publication date |
---|---|
CN103515198A (zh) | 2014-01-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
ASS | Succession or assignment of patent right |
Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HUAHONG NEC ELECTRONICS CO LTD, SHANGHAI Effective date: 20140113 |
|
C41 | Transfer of patent application or patent right or utility model | ||
COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 201206 PUDONG NEW AREA, SHANGHAI TO: 201203 PUDONG NEW AREA, SHANGHAI |
|
TA01 | Transfer of patent application right |
Effective date of registration: 20140113 Address after: 201203 Shanghai city Zuchongzhi road Pudong New Area Zhangjiang hi tech Park No. 1399 Applicant after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201206, Shanghai, Pudong New Area, Sichuan Road, No. 1188 Bridge Applicant before: Shanghai Huahong NEC Electronics Co., Ltd. |
|
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |